NJW1504 PLL Synthesizer with I2C Bus for TV GENERAL DESCRIPTION PACKAGE OUTLINE The NJW1504 is a PLL frequency synthesizer especially designed for TV and VCR tuning systems and consists of PLL circuit and a prescaler which operates up to 1.0GHz, built into one chip. The NJW1504 is controlled through an I2C-bus. NJW1504V FEATURES Operating Voltage 5V Low Operating Current 15mA typ. @Vcc=5V Prescaler accepts frequencies up to 1GHz on chip Reference Signal Oscillator with peripheral of Xtal on chip 34V max. tuning voltage output Package Outline SSOP16 BLOCK DIAGRAM BAND SW 4bit GND I2C Bus Receiver 4bit Latch ADRS SDA SCL 15bit Latch Programmable Divider 15bit 1/8 HF IN Vcc1 5V Vcc3 BS0-BS3 PreAMP CP 8bit Latch Vcc2 OSCOUT AMPOUT Phase OUT AMP Phase Comp. 1/1024 1/512 (1/640) X’tal OSC XTAL Ref. Divider (Note) 2 Purchase of I C components of New Japan Radio Co.,Ltd or one of its sublicensed Associated Companies conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C standard specification as defined by Philips. Ver.2013-12-17 -1- NJW1504 ABSOLUTE MAXIMUM RATINGS (TA=25°C) Parameter Symbol Supply Voltage (Vcc1, 3) Vcc1, Vcc3 Supply Voltage (Vcc2) Vcc2 2 Input Voltage (except I C bus) Vi Output Voltage (except I2C bus) Vo I2C bus Input Voltage Viiic Power Dissipation PD Operating Temperature Range Topr Storage Temperature Range Tstg Ratings -0.3 to +6.5 -0.3 to +36.0 -0.3 to Vcc + 0.3 -0.3 to Vcc + 0.3 -0.3 to +6.5 300 -20 to +85 -40 to +125 Unit V V V V V mW °C °C RECOMMENDED OPERATING CONDITION Parameter Operating Voltage Operating Voltage X’tal Operating Range HF Input Frequency Clock Frequency Bus Free Time Data Hold Time SCL Low Hold Time SCL High Hold Time Set-up Time Data Hold Time Data Set-up Time Rise Time Fall Time Data Set-up Time (TA=25°C) Condition Symbol Vcc1,Vcc3 Vcc2 fxtal fHF fSCL tBUF tHDSTA tLOW tHIGH tSUSTA tHDDAT tSUDAT tR tF tSUSTO Vcc1, Vcc3 Vcc2 Input= -20dBm Refer to I2C bus Timing Chart Min. 4.5 0 3.15 80 0 4.7 2 4.7 2 4.7 0 250 4.0 Typ. 5 4 - Max. 5.5 34 4.05 1000 100 1000 300 - Unit V V MHz MHz kHz us us us us us us ns ns ns us SDA t BUF SCL t HIGH t LOW t HD;STA t SU;DAT t HD;STA t R t HD;DAT t F t SU;STA t SU;STO I2C bus Timing Chart VIHmin (0.7 Vcc1) and VILmax (0.3 Vcc1) Ver.2013-12-17 -2- NJW1504 ELECTRICAL CHARACTERISTICS Parameter Operating Current 1 Operating Current 2 AMP Input Current AMP Output Current AMP Gain Phase Comparator Output Current Phase Comparator Output Current Band Switch “L” Output Current “H” Output Current “L” Output Current “H” Output Current I2C bus “H” Input Current “L” Input Current “H” Input Voltage Range “L” Input Voltage Range ACK Sink Current Ver.2013-12-17 (Vcc1,3=5V,Vcc2=34V,TA=25°C) Condition fHF=100MHz AMPOUT: Low Level Phase OUT: High Imp (2.5V) ANP OUT: Low Level AMPOUT Input=5V f=1KHz Current Source Current Sink BS0=BS1=0.3V BS0=BS1=4.7V BS2=BS3=0.3V BS2=BS3=4.7V SCL, SDA Terminal ACK Output, SDA=0.4V Symbol Min. ICC 12 ICC2 IIN (-50) Typ. 15 1.6 0.1 Max. 21 (50) Unit mA mA nA IOUT - - -2.0 mA AV 40 50 60 dB Isourse 190 280 400 uA Isink -400 -280 -190 uA IOBS0-1L IOBS0-1H IOBS2-3L IOBS2-3H -2.0 11.0 -2.0 5.5 -1.0 15.0 -1.0 7.5 0.0 0.0 - mA mA mA mA IINH IINL VIH VIL VACK -5 -5 3.5 0 3.0 0 0 - 5 5 5.3 1.5 - uA uA V V mA -3- NJW1504 I2C bus Protocols The input information, which consists of chip address and next two or four byte data, is received by I2C bus receiver. The allowable I2C bus protocols are as follows. (1) STA CA CB BB STO (2) STA CA D1 D2 STO (3) STA CA CB BB D1 D2 STO (4) STA CA D1 D2 CB BB STO STA: Start Condition STO: Stop Condition CA: Chip Address CB: Control Byte BB: Band switch Byte D1: Divider Byte 1 D2: Divider Byte 2 For suitable circuit operation, 5-byte data should have chip address, 2-byte control data, band data, and 2-byte divider byte. Following chip address. 2-byte data is received. For distinction of each data, first and third data byte has a function bit. As function bit, divider byte has “1”and control/band data has “0”. SDA SCL 1-7 STA Ver.2013-12-17 ADDRESS 8 R/W 9 ACK 1-7 8 DATA 9 9 ACK ACK STO -4- NJW1504 Data Format Parameter Chip Address Divider Byte 1 Divider Byte 2 Control Byte Band switch Byte Symbol CA D1 D2 CB BB MSB 1 0 N7 1 × 1 N14 N6 CP × 0 N13 N5 T2 × 0 N12 N4 T1 × • Data specifications × : don’t care ;”0” or “1” CA1, CA0 : Programmable address bits ADRS Voltage CA1 Always valid 0 0 0 to 0.1 Vcc1 1 0.4 Vcc1 to 0.6 Vcc1 1 0.9 Vcc1 to Vcc1 0 N11 N3 T0 BS3 CA1 N10 N2 RD1 BS2 CA0 N9 N1 RD0 BS1 0 N8 N0 × BS0 LSB A A A A A CA0 1 0 0 1 BS0 to BS3 : Band switch buffers Control bits, BSn=1 then “ON” N0 to N14 : Control of Programmable divider bits, N14=MSBN0=LSB Dividing ratio : N=214 ×N14+213× N13+······ +21×N1+N0 Maximum division ratio 32767 Minimum division ratio 256 CP CP 1 0 T0 to T2 T0,T1,T2 T2 0 1 1 1 RD1,RD0 RD1 × 1 0 :Charge Pump Current Charge Pump Conditions Current 280uA Normal, Default 60uA Test :Test mode bits :Phase Comparator Output bits T1 T0 Phase Comparator, Band Switch 0 × Normal Output 0 1 Phase Comparator (High Impedance) 1 0 Phase Comparator (Sink) 1 1 Phase Comparator (Source) :Reference Divider bits RD2 Reference Divider 0 640 1 512 1 1024 Conditions Normal, Default Test Conditions Default (Note) Default : Power on reset Ver.2013-12-17 -5- NJW1504 TERMINAL CHARACTERISTICS No. Symbol Typ.DC Voltage (V) 1 HF 3.2 2 GND 0 3 GND 3 Vcc1 5 2 Power Supply Equivalent Circuit Function High Frequency Signal Input 1 4 4 Vcc3 Band Switch Power Supply 5 2 5,6 5 6 BS3 BS2 7 8 BS1 BS0 0 9 CP - Band Switch (Typ: 7.5mA) 0 7,8 Ver.2013-12-17 Band Switch (Typ: 15mA) 9 Charge Pump Output -6- NJW1504 No. Symbol Typ.DC Voltage (V) 10 AMPOUT - 11 Vcc2 34 12 OSCOUT 4.1 13 SCL - 14 SDA - 15 ADRS - 16 XTAL 3.3 Ver.2013-12-17 Equivalent Circuit 11 10 Function Amplifier Output Amplifier Power Supply 12 SCL Input (I2C bus) 13 SDA Input (I2C bus) 14 15 16 Reference Oscillator Output ADRS Input (I2C bus) Crystal Input -7- NJW1504 TYPICAL CHARACTERISTICS VCC1 Supply Current Curve 40.0 [mA] 35.0 30.0 Supply Current 25.0 20.0 15.0 10.0 5.0 0.0 0.0 1.0 2.0 3.0 4.0 5.0 VCC1 Supply Voltage 6.0 7.0 8.0 [V] BS0-BS1 Output Current Curve VCC1=VCC3=5.0V Output Current [mA] 50.0 40.0 30.0 20.0 10.0 0.0 3.0 3.5 4.0 Output Voltage 4.5 5.0 [V] BS3 Output Current Curve VCC1=VCC3=5.0V Output Current [mA] 25.0 20.0 15.0 10.0 5.0 0.0 3.0 3.5 4.0 Output Voltage Ver.2013-12-17 4.5 5.0 [V] -8- NJW1504 TEST CIRCUIT 18p 1000p SG -20dBm 50 NJW1504 1 HF ICC1 Vcc1 5V XTAL 16 2 GND ADRS 15 3 Vcc1 SDA 14 4 Vcc3 SCL 13 5 BS3 OSCOUT 12 6 BS2 COUNTER VADRS 5V 4MHz SDA 100 OSCOUT ICC2 Vcc2 11 Vcc2 34V 7 BS1 AMPOUT 10 8 BS0 SCL 316K CP 9 270 to DM to AC mater VS1 4.7V or 0.3V VS2 2.5V 2mV 1kHz VS3 5V [CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. Ver.2013-12-17 -9-