Data Sheet No. PD60208 Rev. E IR2175(S) & (PbF) LINEAR CURRENT SENSING IC Features Product Summary • • • • • • • • Floating channel up to +600V Monolithic integration Linear current feedback through shunt resistor Direct digital PWM output for easy interface Low IQBS allows the boot strap power supply Independent fast overcurrent trip signal High common mode noise immunity Input overvoltage protection for IGBT short circuit condition • Open Drain outputs • Also available LEAD-FREE Description VOFFSET 600Vmax IQBS 2mA Vin +/-260mVmax Gain temp.drift fo 130kHz (typ.) Overcurrent trip signal delay Overcurrent trip level The IR2175 is a monolithic current sensing IC designed for motor drive applications. It senses the motor phase current through an external shunt resistor, converts from analog to digital signal, and transfers the signal to the low side. IR’s proprietary high voltage isolation technology is implemented to enable the high bandwidth signal processing. The output format is discrete PWM to eliminate need for the A/D input interface for the IR2175. The dedicated overcurrent trip (OC) signal facilitates IGBT short circuit protection. The open-drain outputs make easy for any interface from 3.3V to 15V. S 20ppm/oC (typ.) 2µsec (typ) +/-260mV (typ.) Packages 8 Lead PDIP IR2175 8 Lead SOIC IR2175S Block Diagram Up to 600V 15V PWM Output VCC V+ VS PO IR2175 GND Overcurrent COM OC VB To Motor Phase (Refer to Lead Assignments for correct pin configuration). This/These diagram(s) show electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout. IR2175(S) & (PbF) Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM, all currents are defined positive into any lead. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Symbol Definition VS High side offset voltage Min. Max. -0.3 600 Units VBS High side floating supply voltage -0.3 25 VCC Low side and logic fixed supply voltage -0.3 25 VIN Maximum input voltage between VIN+ and VS -5 5 VPO Digital PWM output voltage COM -0.3 VCC +0.3 VOC Overcurrent output voltage COM -0.3 VCC +0.3 dV/dt PD RthJA Allowable offset voltage slew rate Package power dissipation @ TA ≤ +25°C Thermal resistance, junction to ambient — 50 8 lead SOIC — .625 8 lead PDIP — 1.0 8 lead SOIC — 200 8 lead PDIP — 125 150 TJ Junction temperature — TS Storage temperature -55 150 TL Lead temperature (soldering, 10 seconds) — 300 V V/ns W °C/W °C Note 1: Capacitors are required between VB and Vs when bootstrap power is used. The external power supply, when used, is required between VB and Vs pins. Recommended Operating Conditions The output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recommended conditions. Symbol 2 Definition VB High side floating supply voltage VS High side floating supply offset voltage Min. Max. VS +13.0 VS +20 0.3 600 Units VPO Digital PWM output voltage COM VCC VOC Overcurrent output voltage COM VCC VCC Low side and logic fixed supply voltage 9.5 20 VIN Input voltage between VIN+ and VS -260 +260 mV TA Ambient temperature -40 125 °C V www.irf.com IR2175(S) & (PbF) DC Electrical Characteristics VCC = VBS = 15V, and TA = 25o unless otherwise specified. Symbol Definition VIN Nominal input voltage range before saturation Min. Typ. Max. Units Test Conditions -260 — 260 — 260 — VIN+ _ VS VOC+ Overcurrent trip positive input voltage VOC- Overcurrent trip negative input voltage — -260 — VOS Input offset voltage -10 0 10 ∆V OS/ ∆T A Input offset voltage temperature drift G Gain (duty cycle % per VIN) mV VIN = 0V (Note 1) — 25 — µV/ C 155 160 165 %/V o max gain error=5% (Note 2) ∆G/ ∆T A Gain temperature drift o — 20 — ppm/ C ILK Offset supply leakage current — — 50 µA IQBS — 2 — IQCC Quiescent VBS supply current Quiescent VCC supply current — — 0.5 LIN Linearity (duty cycle deviation from ideal linearity — 0.5 1 % Linearity temperature drift — .005 — %/oC Digital PWM output sink current 20 — — VO = 1V 2 — — 10 — — VO = 0.1V VO = 1V 1 — — mA VB = VS = 600V VS = 0V curve) ∆VLIN/∆TA IOPO IOCC OC output sink current mA VO = 0.1V Note 1: ±10mV offset represents ±1.5% duty cycle fluctuation Note 2: Gain = (full range of duty cycle in %) / (full input voltage range). AC Electrical Characteristics VCC = VBS = 15V, and TA = 25o unless otherwise specified. Symbol Definition Propagation delay characteristics fo 100 130 180 kHz Temperature drift of carrier frequency — 500 — ppm/oC figure 1 VIN = 0 & 5V Dmin Minimum duty — 9 — % VIN+=-260mV, Dmax ∆ f/ ∆T A Carrier frequency output Min. Typ. Max. Units Test Conditions Maximum duty — 91 — % VIN+=+260mV BW fo bandwidth — 15 — kHz VIN+ = 100mVpk -pk sine wave, gain=-3dB PHS Phase shift at 1kHz — -10 — o VIN+ =100mVpk-pk sine wave tdoc Propagation delay time of OC 1 2 — twoc Low true pulse width of OC — 1.5 — www.irf.com µsec 3 IR2175(S) & (PbF) Timing Waveforms Duty=9% Vin+= -260mV Vs = 0V PO Duty=91% Vin+= +260mV Vs = 0V PO Carrier Frequency = 130kHz Figure 1 Output waveform Application Hint: Temperature drift of the output carrier frequency can be cancelled by measuring both a PWM period and the on-time of PWM (Duty) at the same time. Since both periods vary in the same direction, computing the ratio between these values at each PWM period gives consistent measurement of the current feedback over the temperature drift. 4 www.irf.com IR2175(S) & (PbF) Lead Definitions Symbol Description VCC Low side and logic supply voltage COM Low side logic ground VIN+ Positive sense input VB High side supply VS High side return PO Digital PWM output OC N.C. Overcurrent output (negative logic) No connection Lead Assignment 1 VC C VIN + 8 1 VC C VIN + 8 2 PO Vs 7 2 PO Vs 7 3 COM V B 6 3 COM 4 OC NC 5 4 OC 8 lead SOIC Also available LEAD-FREE (PbF) IR2175S www.irf.com V B 6 NC 5 8 lead PDIP Also available LEAD-FREE (PbF) IR2175 5 IR2175(S) & (PbF) Case Outlines 01-6014 01-3003 01 (MS-001AB) 8 Lead PDIP D DIM B 5 A FOOTPRINT 8 6 7 6 5 H E 1 6X 2 3 0.25 [.010] 4 e A 6.46 [.255] 3X 1.27 [.050] e1 0.25 [.010] A1 .0688 1.35 1.75 A1 .0040 .0098 0.10 0.25 b .013 .020 0.33 0.51 c .0075 .0098 0.19 0.25 D .189 .1968 4.80 5.00 .1574 3.80 4.00 E .1497 e .050 BASIC e1 MAX 1.27 BASIC .025 BASIC 0.635 BASIC H .2284 .2440 5.80 6.20 K .0099 .0196 0.25 0.50 L .016 .050 0.40 1.27 y 0° 8° 0° 8° y 0.10 [.004] 8X L 8X c 7 C A B NOTES: 1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994. 2. CONTROLLING DIMENSION: MILLIMETER 3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES]. 4. OUTLINE C ONFORMS TO JEDEC OUTLINE MS-012AA. 8 Lead SOIC 6 MIN .0532 K x 45° A C 8X b 8X 1.78 [.070] MILLIMETERS MAX A 8X 0.72 [.028] INCHES MIN 5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006]. 6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010]. 7 DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO A SUBSTRATE. 01-6027 01-0021 11 (MS-012AA) www.irf.com IR2175(S) & (PbF) LEADFREE PART MARKING INFORMATION IRxxxxxx Part number YWW? Date code Pin 1 Identifier ? P MARKING CODE Lead Free Released Non-Lead Free Released IR logo ?XXXX Lot Code (Prod mode - 4 digit SPN code) Assembly site code Per SCOP 200-002 ORDER INFORMATION Basic Part (Non-Lead Free) 8-Lead PDIP IR2175 order IR2175 8-Lead SOIC IR2175S order IR2175S Leadfree Part 8-Lead PDIP IR2175 order IR2175PbF 8-Lead SOIC IR2175S order IR2175SPbF Thisproduct has been designed and qualified for the industrial market. Qualification Standards can be found on IR’s Web Site http://www.irf.com Data and specifications subject to change without notice. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 9/6/2004 www.irf.com 7