PI6C557-05Q

PI6C557-05Q
PCIe® 2.0 Clock Generator with 4 HCSL Outputs
for Automotive Applications
Product Features
Description
ÎÎPCIe® 2.0 complaint
The PI6C557-05Q is a spread spectrum clock generator compliant to PCI Express® 2.0 and Ethernet requirements. The device
is used for PC or embedded systems to substantially reduce
Electromagnetic Interference (EMI).
→Phase jitter - 2.1ps RMS (typ)
ÎÎLVDS compatible outputs
ÎÎSupply voltage of 3.3V ±5%
The PI6C557-05Q provides four differential (HCSL) or LVDS
spread spectrum outputs. The PI6C557-05Q is configured to
select spread and clock selection. Using Pericom's patented
Phase-Locked Loop (PLL) techniques, the device takes a 25MHz
crystal input and produces four pairs of differential outputs
(HCSL) at 100MHz and 200MHz clock frequencies. It also provides spread selection of -0.5%, -1.0%, -1.5%, and no spread.
ÎÎ25MHz crystal or clock input frequency
ÎÎHCSL outputs, 0.7V Current mode differential pair
ÎÎJitter 40ps cycle-to-cycle (typ)
ÎÎSpread of -0.5%, -1.0%, -1.5%, and no spread
ÎÎAEC-Q100 qualified
ÎÎSpread Bypass option available
ÎÎSpread and frequency selection via external pins
ÎÎPackaging: (Pb-free and Green)
→20-pin, 173-mil wide TSSOP
Pin Configuration
Block Diagram
VDD
2
S[2:0]
3
Spread
Spectrum/
Output
clock
selection
OE
SS Circuitry
CLK0
CLK0
CLK1
CLK1
CLK2
CLK2
CLK3
CLK3
PLL
X1/CLK
25 MHz
Crystal
crystal
Driver
or clock X2
Pulling
Capacitors
PD
2
Rr(IREF)
GND
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VDDXD
1
20
CLK0
S0
2
19
CLK0
S1
3
18
CLK1
S2
4
17
CLK1
X1
5
16
GNDODA
X2
6
15
VDDODA
PD
7
14
CLK2
OE
8
13
CLK2
GNDXD
9
12
CLK3
10
11
CLK3
IREF
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PI6C557-05Q
Rev B
05/05/14
PI6C557-05Q
PCIe® 2.0 Clock Generator with 4 HCSL Outputs for Automotive Applications
Pin Description
Pin #
Pin Name
I/O Type Description
1
VDDXD
Power
Connect to a +3.3V source.
2
S0
Input
Spread Spectrum Select pin #0. See Spread Spectrum Selection table. Internal pull-up resistor.
3
S1
Input
Spread Spectrum Select pin #1. See Spread Spectrum Selection table. Internal pull-up resistor.
4
S2
Input
Spread Spectrum Select pin #2. See Spread Spectrum Selection table. Internal pull-up resistor.
5
X1
Input
Crystal connection.
6
X2
Output
Crystal connection.
7
PD
Input
Power down. Internal pull-up resistor.
8
OE
Input
Output enable. Tri-states output (High=enable outputs); Low=disable outputs). Internal pullup resistor.
9
GND
Power
Connect to digital circuit ground.
10
IREF
Output
Precision resistor attached to this pin is connected to the internal current reference.
11
CLK3
Output
Selectable 100/200 MHz Spread Spectrum differential compliment output clock 3.
12
CLK3
Output
Selectable 100/200 MHz Spread Spectrum differential true output clock 3.
13
CLK2
Output
Selectable 100/200 MHz Spread Spectrum differential compliment output clock 2.
14
CLK2
Output
Selectable 100/200 MHz Spread Spectrum differential true output clock 2.
15
VDDODA
Power
Connect to a +3.3V analog source.
16
GND
Power
Output and Analog circuit ground
17
CLK1
Output
Selectable 100/200 MHz Spread Spectrum differential compliment output clock 1.
18
CLK1
Output
Selectable 100/200 MHz Spread Spectrum differential true output clock 1.
19
CLK0
Output
Selectable 100/200 MHz Spread Spectrum differential compliment output clock 0.
20
CLK0
Output
Selectable 100/200 MHz Spread Spectrum differential true output clock 0.
Table 2: Spread Selection Table
S2
S1
S0
Spread %
Spread Type
Output Frequency
0
0
0
-0.5
Down
100
0
0
1
-1.0
Down
100
0
1
0
-1.5
Down
100
0
1
1
No Spread
Not Applicable
100
1
0
0
-0.5
Down
200
1
0
1
-1.0
Down
200
1
1
0
-1.5
Down
200
1
1
1
No Spread
Not Applicable
200
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PI6C557-05Q
Rev B
05/05/14
PI6C557-05Q
PCIe® 2.0 Clock Generator with 4 HCSL Outputs for Automotive Applications
Output Structures
Application Information
Decoupling Capacitors
Decoupling capacitors of 0.01μF or 0.1μF must be connected
between each VDD pin and the PCB ground plane and placed
as close to the VDD pin as possible.
IREF =2.3mA
6*IREF
PI6C557-05Q must be isolated from system power supply noise
to perform optimally.
Crystal
Use a 25MHz fundamental mode parallel resonant crystal with
less than 30PPM of error across temperature.
R R=475 Ω
See Output Termination
Sections
Current Source (Iref) Reference Resistor - RR
If board target trace impedance is 50-Ohm,
then RR = 475-Ohm providing an IREF of 2.32 mA. The output
current (IOH) is 6*IREF.
Output Termination
The PCI-Express differential clock outputs of the PI6C557-05Q
are open source drivers and require an external series resistor
and a resistor to ground. These resistor values and their allowable locations are shown in detail in the PCI-Express Layout
Guidelines section.
The PI6C557-05Q can be configured for LVDS compatible voltage levels. See the LVDS Compatible Layout Guidelines section.
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PI6C557-05Q
Rev B
05/05/14
PI6C557-05Q
PCIe® 2.0 Clock Generator with 4 HCSL Outputs for Automotive Applications
PCI-Express Layout Guidelines
Common Recommendations for Differential Routing
Dimension or Value
Unit
L1 length, route as non-coupled 50-Ohm trace.
0.5 max
inch
L2 length, route as non-coupled 50-Ohm trace.
0.2 max
inch
L3 length, route as non-coupled 50-Ohm trace.
0.2 max
inch
RS
33
Ohm
RT
49.9
Ohm
Differential Routing on a Single PCB
Dimension or Value
Unit
L4 length, route as coupled microstrip 100-Ohm differential trace.
2 min to 16 max
inch
L4 length, route as coupled stripline 100-Ohm differential trace.
1.8 min to 14.4 max
inch
Differential Routing to a PCI Express connector
Dimension or Value
Unit
L4 length, route as coupled microstrip 100-Ohm differential trace.
0.25 min to 14 max
inch
L4 length, route as coupled stripline 100-Ohm differential trace.
0.225 min to 12.6 max
inch
PCI-Express Device Routing
L1
RS
L1’
L2
L4
L4’
L2’
RS
PI6C557-05Q
Output
Clock
RT
L3’
RT
PCI-Express
Load or
Connector
L3
Typical PCI-Express (HCSL) Waveform
700 mV
0
tOR
500 ps
500 ps
tOF
0.52 V
0.175 V
0.52 V
0.175 V
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PI6C557-05Q
Rev B
05/05/14
PI6C557-05Q
PCIe® 2.0 Clock Generator with 4 HCSL Outputs for Automotive Applications
Application Information
LVDS Recommendations for Differential Routing
Dimension or Value
Unit
L1 length, route as non-coupled 50-Ohm trace.
0.5 max
inch
L2 length, route as non-coupled 50-Ohm trace.
0.2 max
inch
RP
100
Ohm
RQ
100
Ohm
RT
150
Ohm
L3 length, route as 100Ω differential trace.
L3 length, route as 100Ω differential trace.
LVDS Device Routing
L1
L3
RQ
L3’
L1’
RT
PI6C557-05Q
Clock
Output
RP
RT
L2’
LVDS
Device
Load
L2
Typical LVDS Waveform
1325 mV
1000 mV
tOR
500 ps
500 ps
1250 mV
1150 mV
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tOF
1250 mV
1150 mV
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PI6C557-05Q
Rev B
05/05/14
PI6C557-05Q
PCIe® 2.0 Clock Generator with 4 HCSL Outputs for Automotive Applications
Electrical Specifications
Maximum Ratings
Supply Voltage to Ground Potential.......................................................... 5.5V
All Inputs and Outputs...................................................... -0.5V to VDD+0.5V
Ambient Operating Temperature................................................. -40 to +85°C
Storage Temperature.................................................................. -65 to +150°C
Junction Temperature .............................................................................150°C
Soldering Temperature ...........................................................................260°C
Note:
Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is
a stress rating only and functional operation of the device
at these or any other conditions above those indicated in
the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect reliability.
ESD Protection (Input) .................................................... 2000 V min (HBM)
Recommended Operation Conditions
Parameter
Min.
Ambient Operating Temperature
Power Supply Voltage (measured in respect to GND)
Typ.
Max.
Unit
-40
+85
°C
3.135
3.465
V
DC Characteristics (VDD = 3.3V ±5%, TA = -40°C to +85oC)
Symbol
VDD
VIH
Parameter
Conditions
Supply Voltage
Input High
Voltage(1)
Voltage(1)
Min.
Typ.
Max.
Unit
3.135
3.3
3.465
V
2.0
VDD +0.3
V
GND -0.3
0.8
V
-5
5
µA
VIL
Input Low
IIL
Input Leakage Current
0 < Vin < VDD
IDD
Operating Supply Current
R L = 50Ω, CL = 2pF @100MHz
105
120
mA
OE = LOW
40
50
mA
No load PD = LOW
60
100
µA
IDDOE
IDDPD
Without input pull-up
and pull-downs
CIN
Input Capacitance
Input pin capacitance
7
pF
COUT
Output Capacitance
Output pin capacitance
6
pF
LPIN
Pin Inductance
ROUT
Output Resistance
5
3.0
CLK Outputs
nH
kΩ
Note:
1. Single edge is monotonic when transitioning through region.
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PI6C557-05Q
Rev B
05/05/14
PI6C557-05Q
PCIe® 2.0 Clock Generator with 4 HCSL Outputs for Automotive Applications
AC Characteristics (VDD = 3.3V ±5%, TA = -40°C to +85°C)
Symbol
Parameter
Conditions
Min.
Typ.
Max.
25
FIN
Input Frequency
VOUT
Output Frequency
VOH
Output High Voltage (1,2)
VOL
Output Low Voltage(1,2)
VCPA
Crossing Point Voltage(1,2)
Absolute
VCN
Crossing Point Voltage(1,2,4)
Variation over all edges
JCC
Jitter, Cycle-to-Cycle(1,3)
JRMS
RMS Jitter
MF
Modulation Frequency
Spread Spectrum
tOR
Rise Time(1,2)
tOF
Unit
MHz
HCSL terminal
200
LVDS terminal
100
MHz
660
700
850
mV
-150
0
27
mV
250
350
550
mV
140
mV
40
60
ps
PCIe Gen 2 High Band
2.1
3.1
PCIe Gen 2 Low Band
0.6
3.0
30
31.5
33
kHz
From 0.175V to 0.525V
175
332
700
ps
Fall Time(1,2)
From 0.525V to 0.175V
175
344
700
ps
TSKEW
Skew between outputs
At Crossing Point Voltage
50
ps
TDUTY-CYCLE
Duty Cycle(1,3)
55
%
TOE
Output Enable Time(5)
All outputs
10
μs
TOT
Output Disable Time(5)
All outputs
10
μs
tSTABLE
From power-up to VDD=3.3V
From Power-up VDD=3.3V
@VDD = 3.3V
45
3.0
ps
ms
Notes:
1. RL = 50-Ohm with CL = 2 pF and RR
2. Single-ended waveform
3. Differential waveform
4. Measured at the crossing point
5. CLK pins are tri-stated when OE is LOW
Thermal Characteristics
Symbol
Parameter
Conditions
θJA
Thermal Resistance Junction to Ambient
Still air
θJC
Thermal Resistance Junction to Case
Min.
Typ.
Max.
Unit
93
°C/W
20
°C/W
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PI6C557-05Q
Rev B
05/05/14
PI6C557-05Q
PCIe® 2.0 Clock Generator with 4 HCSL Outputs for Automotive Applications
Recomended Crystal Specification
Pericom recommends:
a) FL2500184Q, SMD 3.2x2.5(4P), 25M, CL=20pF, Frequency Tolerance ±15ppm, Stability ±20ppm
(http://www.pericom.com/pdf/datasheets/se/FL.pdfb)
Recommended Crystal Circuit
The following diagram shows PI6C557-05Q crystal circuit connection with a parallel crystal. For the C L=20pF
parallel crystal, it is suggested to use C1=27 pF, C2=27 pF in general. C1 and C2 can be adjusted to fine tune to the
target ppm of crystal oscillation according to different board layouts. R1=360 ohm is recommended in layout for
smaller size crystal drive level adjustment.
Xin
C1
27pF
25M Crystal�
(CL�=�20pF)
Optional
360Ω
Xout
C2
27pF
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PI6C557-05Q
Rev B
05/05/14
PI6C557-05Q
PCIe® 2.0 Clock Generator with 4 HCSL Outputs for Automotive Applications
Packaging Mechanical: 20-pin TSSOP (L)
Ordering Information(1-3)
Ordering Code
Package Code
PI6C557-05QLE
L
PackageType
Pb-free & Green, 20-Pin TSSOP
Note:
1. Thermal characteristics and package top marking information can be found at http://www.pericom.com/packaging/
2. E = lead-free and green packaging
3. Adding an X suffix = tape/reel
Pericom Semiconductor Corporation • www.pericom.com
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14-0063
PCI®, PCI-X®, PCIe®, PCI Express® and PCI-SIG® are registered trademarks of
the PCI-SIG® (www.pcisig.org).
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PI6C557-05Q
Rev B
05/05/14