HFW9N50_HFI9N50

BVDSS = 500 V
RDS(on) typ ȍ
HFW9N50 / HFI9N50
ID = 9.0 A
500V N-Channel MOSFET
D2-PAK
I2-PAK
HFW9N50
HFI9N50
FEATURES
‰ Originative New Design
‰ Superior Avalanche Rugged Technology
‰ Robust Gate Oxide Technology
1.Gate 2. Drain 3. Source
‰ Very Low Intrinsic Capacitances
‰ Excellent Switching Characteristics
‰ Unrivalled Gate Charge : 35 nC (Typ.)
‰ Extended Safe Operating Area
‰ Lower RDS(ON) ȍ7\S#9GS=10V
‰ 100% Avalanche Tested
Absolute Maximum Ratings
Symbol
TC=25୅ unless otherwise specified
Parameter
Value
Units
500
V
VDSS
Drain-Source Voltage
ID
Drain Current
– Continuous (TC = 25ଇ)
9.0
A
Drain Current
– Continuous (TC = 100ଇ)
5.7
A
IDM
Drain Current
– Pulsed
36
A
VGS
Gate-Source Voltage
ρͤ͡
V
EAS
Single Pulsed Avalanche Energy
(Note 2)
360
mJ
IAR
Avalanche Current
(Note 1)
9.0
A
EAR
Repetitive Avalanche Energy
(Note 1)
14.7
mJ
dv/dt
Peak Diode Recovery dv/dt
(Note 3)
4.5
V/ns
PD
Power Dissipation (TA = 25ଇ) *
3.13
W
Power Dissipation (TC = 25ଇ)
- Derate above 25ଇ
147
W
1.18
W/ଇ
-55 to +150
ଇ
300
ଇ
(Note 1)
TJ, TSTG
Operating and Storage Temperature Range
TL
Maximum lead temperature for soldering purposes,
1/8” from case for 5 seconds
Thermal Resistance Characteristics
Typ.
Max.
RșJC
Symbol
Junction-to-Case
Parameter
--
0.85
RșJA
Junction-to-Ambient*
--
40
RșJA
Junction-to-Ambient
--
62.5
Units
ഒ:
* When mounted on the minimum pad size recommended (PCB Mount)
క ΄Ͷ;ͺ͹΀Έ͑΃Ͷ·͟Ͳ͑͡ͻΦΟΖ͑ͣͦ͡͡
HFW9N50_HFI9N50
June 2005
Symbol
Parameter
unless otherwise specified
Test Conditions
Min
Typ
Max
Units
On Characteristics
VGS
RDS(ON)
Gate Threshold Voltage
VDS = VGS, ID = 250 Ꮃ
2.5
--
4.5
V
Static Drain-Source
On-Resistance
VGS = 10 V, ID = 4.5 A
--
0.58
0.73
‫ש‬
VGS = 0 V, ID = 250 Ꮃ
500
--
--
V
ID = 250 Ꮃ͑͝΃ΖΗΖΣΖΟΔΖΕ͑ΥΠͣͦఁ
--
0.55
--
·͠ఁ
VDS = 500 V, VGS = 0 V
--
--
1
Ꮃ
VDS = 400 V, TC = 125ఁ
--
--
10
Ꮃ
Off Characteristics
BVDSS
Drain-Source Breakdown Voltage
ԩBVDSS Breakdown Voltage Temperature
Coefficient
/ԩTJ
IDSS
Zero Gate Voltage Drain Current
IGSSF
Gate-Body Leakage Current,
Forward
VGS = 30 V, VDS = 0 V
--
--
100
Ꮂ
IGSSR
Gate-Body Leakage Current,
Reverse
VGS = -30 V, VDS = 0 V
--
--
-100
Ꮂ
--
1300
1700
Ꮔ
--
150
195
Ꮔ
--
24
31
Ꮔ
--
35
70
Ꭸ
--
120
240
Ꭸ
--
70
140
Ꭸ
--
80
160
Ꭸ
--
35
45
Οʹ
--
7.3
--
Οʹ
--
17
--
Οʹ
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
Switching Characteristics
td(on)
Turn-On Time
tr
Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf
Turn-Off Fall Time
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
VDS = 250 V, ID = 9.0 A,
RG = 25 ‫ש‬
͙ͿΠΥΖ͚͑ͥͦ͝
VDS = 400V, ID = 9.0 A,
VGS = 10 V
͙ͿΠΥΖ͚͑ͥͦ͝
Gate-Drain Charge
Source-Drain Diode Maximum Ratings and Characteristics
IS
Continuous Source-Drain Diode Forward Current
--
--
9.0
ISM
Pulsed Source-Drain Diode Forward Current
--
--
36
VSD
Source-Drain Diode Forward Voltage
IS = 9.0 A, VGS = 0 V
--
--
1.4
V
trr
Reverse Recovery Time
--
320
--
Ꭸ
Qrr
Reverse Recovery Charge
IS = 9.0 A, VGS = 0 V
diF/dt = 100 A/ȝV (Note 4)
--
2.8
--
ȝ&
A
Notes ;
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L=8mH, IAS=9.0A, VDD=50V, RG=25:, Starting TJ =25qC
3. ISD”$GLGW”$ȝV9DD”%9DSS , Starting TJ =25 qC
4. Pulse Test : Pulse Width ”ȝV'XW\&\FOH”
5. Essentially Independent of Operating Temperature
క ΄Ͷ;ͺ͹΀Έ͑΃Ͷ·͟Ͳ͑͡ͻΦΟΖ͑ͣͦ͡͡
HFW9N50_HFI9N50
Electrical Characteristics TC=25 qC
HFW9N50_HFI9N50
Typical Characteristics
VGS
15 V
10 V
8.0 V
7.0 V
6.5 V
6.0 V
Bottom : 5.5 V
Top :
ID , Drain Current [A]
101
ID , Drain Current [A]
1
10
0
10
150 䉝
25䉝
0
10
-55 䉝
䈜㻌㻺㼛㼠㼑
1. VDS = 40V
ȝ V3XOVH7HVW
䈜㻌㻺㼛㼠㼑㻌㻦
ȝ V3XOVH7HVW
2. TC = 25 䉝
-1
-1
10
-1
0
10
10
1
10
2
10
4
6
8
10
VGS , Gate-Source Voltage [V]
VDS , Drain-Source Voltage [V]
Figure 1. On Region Characteristics
Figure 2. Transfer Characteristics
IDR , Reverse Drain Current [A]
RDS(on) , [:]
Drain-Source On-Resistance
1.8
1.6
VGS = 10V
1.4
VGS = 20V
1.2
1.0
0.8
1
10
0
10
150 䉝
0.6
䈜㻌㻺㼛㼠㼑㻌㻦
1. VGS = 0V
ȝ V3XOVH7HVW
25䉝
䈜㻌㻺㼛㼠㼑㻌㻦㻌㼀J = 25 䉝
-1
0
5
10
15
20
25
30
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
ID , Drain Current [A]
VSD , Source-Drain Voltage [V]
Figure 3. On Resistance Variation vs
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation with Source Current
and Temperature
12
2400
Ciss
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
1800
Capacitances [pF]
10
Coss
1200
600
䈜㻌㻺㼛㼠㼑㻌㻧
1. VGS = 0 V
2. f = 1 MHz
Crss
VDS = 100V
VGS, Gate-Source Voltage [V]
0.4
10
VDS = 250V
VDS = 400V
8
6
4
2
䈜㻌㻺㼛㼠㼑㻌㻦㻌㻵D = 9.0 A
0
-1
10
0
0
10
1
10
0
5
10
15
20
25
30
35
40
VDS, Drain-Source Voltage [V]
QG, Total Gate Charge [nC]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
క ΄Ͷ;ͺ͹΀Έ͑΃Ͷ·͟Ͳ͑͡ͻΦΟΖ͑ͣͦ͡͡
(continued)
1.2
3.0
RDS(ON), (Normalized)
Drain-Source On-Resistance
BVDSS, (Normalized)
Drain-Source Breakdown Voltage
HFW9N50_HFI9N50
Typical Characteristics
1.1
1.0
䈜㻌㻺㼛㼠㼑㻌㻦
1. VGS = 0 V
2. ID ȝ $
0.9
0.8
-100
-50
0
50
100
150
2.5
2.0
1.5
1.0
䈜㻌㻺㼛㼠㼑㻌㻦
1. VGS = 10 V
2. ID = 4.5 A
0.5
0.0
-100
200
-50
0
50
100
150
200
o
o
TJ, Junction Temperature [ C]
TJ, Junction Temperature [ C]
Figure 7. Breakdown Voltage Variation
vs Temperature
Figure 8. On-Resistance Variation
vs Temperature
10
2
Operation in This Area
is Limited by R DS(on)
10
ID, Drain Current [A]
1 ms
1
10
10 ms
DC
0
10
䈜㻌㻺㼛㼠㼑㼟㻌㻦
o
1. TC = 25 C
o
2. TJ = 150 C
3. Single Pulse
0
10
6
4
2
0
25
-1
10
1
2
10
3
10
10
50
75
100
125
150
TC, Case Temperature [ 䉝㼉
VDS, Drain-Source Voltage [V]
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current
vs Case Temperature
0
10
D=0.5
Zș -&(t), Thermal Response
ID, Drain Current [A]
8
100 Ps 10 Ps
0.2
-1
10
䈜㻌㻺㼛㼠㼑㼟㻌㻦
1. Zș -&(t) = 0.85 䉝㻛㼃 㻌㻹㼍㼤㻚
2. Duty Factor, D=t1/t2
3. TJM - TC = PDM * Zș -&(t)
0.1
0.05
PDM
0.02
0.01
t1
single pulse
-2
10
-5
10
-4
10
-3
10
-2
10
-1
10
t2
0
10
1
10
t1, Square Wave Pulse Duration [sec]
Figure 11. Transient Thermal Response Curve
క ΄Ͷ;ͺ͹΀Έ͑΃Ͷ·͟Ͳ͑͡ͻΦΟΖ͑ͣͦ͡͡
HFW9N50_HFI9N50
Fig 12. Gate Charge Test Circuit & Waveform
.ȍ
12V
VGS
Same Type
as DUT
Qg
200nF
10V
300nF
VDS
VGS
Qgs
Qgd
DUT
3mA
Charge
Fig 13. Resistive Switching Test Circuit & Waveforms
RL
VDS
VDS
90%
VDD
RG
( 0.5 rated VDS )
Vin
DUT
10V
10%
tr
td(on)
td(off)
t on
tf
t off
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
BVDSS
1
EAS = ---- LL IAS2 -------------------2
BVDSS -- VDD
L
VDS
VDD
ID
BVDSS
IAS
RG
10V
ID (t)
DUT
VDS (t)
VDD
tp
Time
క ΄Ͷ;ͺ͹΀Έ͑΃Ͷ·͟Ͳ͑͡ͻΦΟΖ͑ͣͦ͡͡
HFW9N50_HFI9N50
Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
+
VDS
_
IS
L
Driver
RG
VGS
VGS
( Driver )
Same Type
as DUT
VDD
• dv/dt controlled by RG
• IS controlled by pulse period
Gate Pulse Width
D = -------------------------Gate Pulse Period
10V
IFM , Body Diode Forward Current
IS
( DUT )
di/dt
IRM
Body Diode Reverse Current
VDS
( DUT )
Body Diode Recovery dv/dt
Vf
VDD
Body Diode
Forward Voltage Drop
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HFW9N50_HFI9N50
Package Dimension
క ΄Ͷ;ͺ͹΀Έ͑΃Ͷ·͟Ͳ͑͡ͻΦΟΖ͑ͣͦ͡͡
HFW9N50_HFI9N50
Package Dimension
క ΄Ͷ;ͺ͹΀Έ͑΃Ͷ·͟Ͳ͑͡ͻΦΟΖ͑ͣͦ͡͡