BVDSS = 400 V RDS(on) typ ȍ HFD5N40 / HFU5N40 ID = 3.4 A 400V N-Channel MOSFET D-PAK I-PAK 2 FEATURES 1 1 2 3 Originative New Design 3 HFD5N40 Superior Avalanche Rugged Technology Robust Gate Oxide Technology HFU5N40 1.Gate 2. Drain 3. Source Very Low Intrinsic Capacitances Excellent Switching Characteristics Unrivalled Gate Charge : 13 nC (Typ.) Extended Safe Operating Area Lower RDS(ON) ȍ7\S#9GS=10V 100% Avalanche Tested Absolute Maximum Ratings Symbol TC=25 unless otherwise specified Parameter Value Units 400 V VDSS Drain-Source Voltage ID Drain Current – Continuous (TC = 25ଇ) 3.4 A Drain Current – Continuous (TC = 100ଇ) 2.15 A IDM Drain Current – Pulsed 13.6 A VGS Gate-Source Voltage ρ30 V EAS Single Pulsed Avalanche Energy (Note 2) 510 mJ IAR Avalanche Current (Note 1) 3.4 A EAR Repetitive Avalanche Energy (Note 1) 4.5 mJ dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns PD Power Dissipation (TA = 25ഒ͚ 2.5 W Power Dissipation (TC = 25ഒ͚͑ ͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑- Derate above 25ഒ 45 W 0.36 W/ఁ͑ TJ, TSTG Operating and Storage Temperature Range -55 to +150 ఁ͑ TL Maximum lead temperature for soldering purposes, 1/8” from case for 5 seconds 300 ఁ͑ (Note 1) Thermal Resistance Characteristics Symbol Parameter Typ. Max. RșJC Junction-to-Case -- 2.78 RșJA Junction-to-Ambient* -- 50 RșJA Junction-to-Ambient -- 110 Units ఁ͠Έ͑ * When mounted on the minimum pad size recommended (PCB Mount) క͑΄Ͷ;ͺΈ͑Ͷ·͟Ͳ͡͝ͻΦΝΪ͑ͣͦ͑͡͡ HFD5N40_HFU5N40 July 2005 Symbol Parameter unless otherwise specified Test Conditions Min Typ Max Units On Characteristics VGS RDS(ON) Gate Threshold Voltage VDS = VGS, ID = 250 Ꮃ͑ 2.5 -- 4.5 V Static Drain-Source On-Resistance VGS = 10 V, ID = 1.7 A͑ -- 1.27 1.6 ͑ש VGS = 0 V, ID = 250 Ꮃ͑ 400 -- -- V ID = 250 Ꮃ, Referenced to25ଇ -- 0.38 -- ·͠ఁ͑ VDS = 400 V, VGS = 0 V͑ -- -- 1 Ꮃ͑ VDS = 320 V, TC = 125ఁ͑ -- -- 10 Ꮃ͑ Off Characteristics BVDSS Drain-Source Breakdown Voltage ԩBVDSS Breakdown Voltage Temperature Coefficient /ԩTJ IDSS Zero Gate Voltage Drain Current IGSSF Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 Ꮂ͑ IGSSR Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 Ꮂ͑ -- 450 590 Ꮔ͑ -- 70 90 Ꮔ͑ -- 10 17 Ꮔ͑ -- 15 30 Ꭸ͑ -- 70 140 Ꭸ͑ -- 30 60 Ꭸ͑ -- 40 80 Ꭸ͑ -- 13 17 Οʹ͑ -- 4.0 -- Οʹ͑ -- 6.0 -- Οʹ͑ Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance VDS = 25 V, VGS = 0 V, f = 1.0 MHz͑ Switching Characteristics td(on) Turn-On Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd VDS = 200 V, ID = 4.5 A, RG = 25 ͑ש ͑ ͙͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑ͿΠΥΖ͚͑ͥͦ͑͝ VDS = 320 V, ID = 4.5 A, VGS = 10 V ͙ͿΠΥΖ͚͑ͥͦ͑͝ Gate-Drain Charge Source-Drain Diode Maximum Ratings and Characteristics IS Continuous Source-Drain Diode Forward Current -- -- 3.4 ISM Pulsed Source-Drain Diode Forward Current -- -- 13.6 VSD Source-Drain Diode Forward Voltage IS = 3.4 A, VGS = 0 V -- -- 1.5 V trr Reverse Recovery Time -- 190 -- Ꭸ͑ Qrr Reverse Recovery Charge IS = 4.5 A, VGS = 0 V diFGW $ȝV(Note 4) -- 1.0 -- ȝ& A Notes ; 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L=44mH, IAS=4.5A, VDD=50V, RG=25:, Starting TJ =25qC 3. ISD$GLGW$ȝV9DD%9DSS , Starting TJ =25 qC 4. Pulse Test : Pulse Width ȝV'XW\&\FOH 5. Essentially Independent of Operating Temperature క͑΄Ͷ;ͺΈ͑Ͷ·͟Ͳ͡͝ͻΦΝΪ͑ͣͦ͑͡͡ HFD5N40_HFU5N40 Electrical Characteristics TC=25 qC HFD5N40_HFU5N40 ID, Drain Current [A] ID, Drain Current [A] Typical Characteristics VGS, Gate-Source Voltage [V] VDS, Drain-Source Voltage [V] Figure 1. On Region Characteristics RDS(ON)[@ Drain-Source On-Resistance IDR, Reverse Drain Current [A] Figure 2. Transfer Characteristics ID, Drain Current [A] VSD, Source-Drain Voltage [V] Figure 4. Body Diode Forward Voltage Variation with Source Current and Temperature Figure 3. On Resistance Variation vs Drain Current and Gate Voltage Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd 800 Capacitances [pF] 700 Ciss 600 500 Coss 400 300 䈜㻌㻺㼛㼠㼑㻌㻧 1. VGS = 0 V 2. f = 1 MHz Crss 200 12 VDS = 80V VGS, Gate-Source Voltage [V] 900 10 VDS = 200V VDS = 320V 8 6 4 2 100 * Note : ID = 4.5A 0 -1 10 0 10 1 10 0 0 2 4 6 8 10 12 VDS, Drain-Source Voltage [V] QG, Total Gate Charge [nC] Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics 14 క͑΄Ͷ;ͺΈ͑Ͷ·͟Ͳ͡͝ͻΦΝΪ͑ͣͦ͑͡͡ HFD5N40_HFU5N40 Typical Characteristics (continued) RDS(ON), (Normalized) Drain-Source On-Resistance BVDSS, (Normalized) Drain-Source Breakdown Voltage 3.0 2.5 2.0 1.5 1.0 Note : 1. VGS = 10 V 2. ID = 2.25 A 0.5 0.0 -100 -50 0 50 100 150 200 TJ, Junction Temperature [oC] TJ, Junction Temperature [oC] Figure 8. On-Resistance Variation vs Temperature Figure 7. Breakdown Voltage Variation vs Temperature 4 Operation in This Area is Limited by R DS(on) 10 Ps ID, Drain Current [A] 100 Ps 1 ms 10 ms 100 ms 100 DC * Notes : 1. TC = 25 oC 3 2 1 2. TJ = 150 oC 3. Single Pulse 10-1 100 101 102 0 25 103 50 75 100 125 150 TC, Case Temperature [oC] VDS, Drain-Source Voltage [V] Figure 9. Maximum Safe Operating Area Zș -&(t), Thermal Response ID, Drain Current [A] 101 Figure 10. Maximum Drain Current vs Case Temperature D=0.5 0 10 䈜㻌㻺㼛㼠㼑㼟㻌㻦 1. Zș -&(t) = 2.78 䉝㻛㼃 㻌㻹㼍㼤㻚 2. Duty Factor, D=t1/t2 3. TJM - TC = PDM * Zș -&(t) 0.2 0.1 0.05 -1 PDM 0.02 0.01 10 t1 single pulse -5 10 -4 10 -3 10 -2 10 -1 10 t2 0 10 1 10 t1, Square Wave Pulse Duration [sec] Figure 11. Transient Thermal Response Curve క͑΄Ͷ;ͺΈ͑Ͷ·͟Ͳ͡͝ͻΦΝΪ͑ͣͦ͑͡͡ HFD5N40_HFU5N40 Fig 12. Gate Charge Test Circuit & Waveform .ȍ 12V VGS Same Type as DUT Qg 200nF 10V 300nF VDS VGS Qgs Qgd DUT 3mA Charge Fig 13. Resistive Switching Test Circuit & Waveforms RL VDS VDS 90% VDD RG ( 0.5 rated VDS ) Vin DUT 10V 10% tr td(on) td(off) t on tf t off Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms BVDSS 1 EAS = ---- LL IAS2 -------------------2 BVDSS -- VDD L VDS VDD ID BVDSS IAS RG 10V ID (t) DUT VDS (t) VDD tp Time క͑΄Ͷ;ͺΈ͑Ͷ·͟Ͳ͡͝ͻΦΝΪ͑ͣͦ͑͡͡ HFD5N40_HFU5N40 Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + VDS _ IS L Driver RG VGS VGS ( Driver ) Same Type as DUT VDD • dv/dt controlled by RG • IS controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current IS ( DUT ) di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt Vf VDD Body Diode Forward Voltage Drop క͑΄Ͷ;ͺΈ͑Ͷ·͟Ͳ͡͝ͻΦΝΪ͑ͣͦ͑͡͡ HFD5N40_HFU5N40 Package Dimension {vTY\YG 2.3±0.1 6.6±0.2 1.2±0.3 9.7+0.5 -0.3 2.7±0.3 0.5±0.05 5.6±0.2 1±0.2 5.35±0.15 1.2±0.3 0.05+0.1 -0.05 0.8±0.2 0.6±0.2 0.5+0.1 -0.05 2.3typ 2.3typ క͑΄Ͷ;ͺΈ͑Ͷ·͟Ͳ͡͝ͻΦΝΪ͑ͣͦ͑͡͡ HFD5N40_HFU5N40 {vTY\XG 2.3±0.1 6.6±0.2 5.35±0.15 0.75±0.15 0.8±0.15 0.6±0.1 2.3typ 7±0.2 ^U_ ±0.3 7.5·WU[G 5.6±0.2 0.5±0.05 0.5+0.1 -0.05 1.2±0.3 2.3typ క͑΄Ͷ;ͺΈ͑Ͷ·͟Ͳ͡͝ͻΦΝΪ͑ͣͦ͑͡͡