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DATA SHEET MOS FIELD EFFECT TRANSISTOR μ PA2591T1H N- AND P-CHANNEL MOSFET FOR SWITCHING DESCRIPTION PACKAGE DRAWING (Unit: mm) The μ PA2591T1H is N- and P-channel MOSFETs designed for 2.9±0.1 DC/DC converters and power management applications of A 0.65 portable equipments. 8 0.17±0.05 5 N- and P-channel MOSFETs are assembled in one package, to • 2.5 V drive available 4 1 • Low on-state resistance 0.32±0.05 0.05 M S A N-channel RDS(on)1 = 55 mΩ MAX. (VGS = 4.5 V, ID = 2 A) N-channel 1: Source 2: Gate 7, 8: Drain 0.8±0.05 RDS(on)2 = 70 mΩ MAX. (VGS = 2.5 V, ID = 2 A) P-channel RDS(on)1 = 88 mΩ MAX. (VGS = −4.5 V, ID = −2 A) RDS(on)2 = 150 mΩ MAX. (VGS = −2.5 V, ID = −1 A) (0.3) FEATURES 0 to 0.025 2.4±0.1 2.8±0.1 contribute minimize the equipments. P-channel 3: Source 4: Gate 5, 6: Drain S • Built-in gate protection diode • Small and surface mount package (8-pin VSOF (2429)) ORDERING INFORMATION PART NUMBER LEAD PLATING μ PA2591T1H-T1-AT Note μ PA2591T1H-T2-AT Note Pure Sn PACKING 8 mm embossed taping 3000 p/reel PACKAGE 8-pin VSOF (2429) Note Pb-free (This product does not contain Pb in the external electrode and other parts.) Marking: 2591 The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. Document No. G20216EJ1V0DS00 (1st edition) Date Published February 2010 NS Printed in Japan 2010 μ PA2591T1H ABSOLUTE MAXIMUM RATINGS (TA = 25°C) PARAMETER SYMBOL N-CHANNEL P-CHANNEL UNIT Drain to Source Voltage (VGS = 0 V) VDSS 30 −30 V Gate to Source Voltage (VDS = 0 V) VGSS ±12 m12 V Drain Current (DC) ID(DC) ±4.0 m3.0 A ID(pulse) ±16 m12 A Drain Current (pulse) Note1 Total Power Dissipation (1 unit, 5 s) Note2 PT1 1.5 W PT2 1.24 W Channel Temperature Tch 150 °C Storage Temperature Tstg −55 to +150 °C Total Power Dissipation (2 units, 5 s) Note2 Notes 1. PW ≤ 10 μs, Duty Cycle ≤ 1% 2. Mounted on FR-4 board of 25.4 mm x 25.4 mm x 0.8 mm EQUIVALENT CIRCUIT N-channel P-channel Drain Drain Body Diode Gate Gate Protection Diode Source Body Diode Gate Gate Protection Diode Source Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device. Caution This product is electrostatic-sensitive device due to low ESD capability and should be handled with caution for electrostatic discharge. 2 Data Sheet G20216EJ1V0DS μ PA2591T1H ELECTRICAL CHARACTERISTICS (TA = 25°C) N-channel MOSFET CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Zero Gate Voltage Drain Current IDSS VDS = 30 V, VGS = 0 V 1 μA Gate Leakage Current IGSS VGS = ±12 V, VDS = 0 V ±10 μA VGS(off) VDS = 10 V, ID = 1 mA 1.5 V Gate to Source Cut-off Voltage Forward Transfer Admittance Note Drain to Source On-state Resistance Note 0.5 | yfs | VDS = 10 V, ID = 2 A RDS(on)1 VGS = 4.5 V, ID = 2 A 38 55 mΩ RDS(on)2 VGS = 2.5 V, ID = 2 A 48 70 mΩ 1 S Input Capacitance Ciss VDS = 10 V, 475 pF Output Capacitance Coss VGS = 0 V, 62 pF Reverse Transfer Capacitance Crss f = 1.0 MHz 34 pF Turn-on Delay Time td(on) VDD = 15 V, ID = 2 A, 7 ns VGS = 4.5 V, 6 ns RG = 6 Ω 22 ns 5 ns Rise Time tr Turn-off Delay Time td(off) Fall Time tf Total Gate Charge QG VDD = 24 V, VGS = 4.5 V, 5.4 nC Gate to Source Charge QGS ID = 4 A 0.8 nC 1.5 nC 0.85 V Gate to Drain Charge Body Diode Forward Voltage QGD Note VF(S-D) IF = 4 A, VGS = 0 V Note Pulsed TEST CIRCUIT 1 SWITCHING TIME TEST CIRCUIT 2 GATE CHARGE D.U.T. D.U.T. VGS RL VGS RG PG. Wave Form VDD 0 VGS 10% IG = 2 mA RL 50 Ω VDD 90% PG. VDS 90% VGS 0 90% VDS VDS τ τ = 1 μs Duty Cycle ≤ 1% 0 10% 10% tr td(off) Wave Form td(on) ton tf toff Data Sheet G20216EJ1V0DS 3 μ PA2591T1H P-channel MOSFET CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Zero Gate Voltage Drain Current IDSS VDS = −30 V, VGS = 0 V −1 μA Gate Leakage Current IGSS VGS = m12 V, VDS = 0 V m10 μA VGS(off) VDS = −10 V, ID = −1 mA −0.5 −1.5 V | yfs | VDS = −10 V, ID = −1.5 A 1.5 RDS(on)1 VGS = −4.5 V, ID = −2 A 66 88 mΩ RDS(on)2 VGS = −2.5 V, ID = −1 A 98 150 mΩ Gate to Source Cut-off Voltage Forward Transfer Admittance Note Drain to Source On-state Resistance Note S Input Capacitance Ciss VDS = −10 V, 450 pF Output Capacitance Coss VGS = 0 V, 77 pF Reverse Transfer Capacitance Crss f = 1.0 MHz 63 pF Turn-on Delay Time td(on) VDD = −15 V, ID = −1.5 A, 12 ns VGS = −4.5 V, 5 ns RG = 6 Ω 37 ns 27 ns Rise Time tr Turn-off Delay Time td(off) Fall Time tf Total Gate Charge QG VDD = −24 V, VGS = −4.5 V, 5.2 nC Gate to Source Charge QGS ID = −3 A 1.1 nC 2.3 nC 0.89 V Gate to Drain Charge Body Diode Forward Voltage QGD Note IF = −3 A, VGS = 0 V VF(S-D) Note Pulsed TEST CIRCUIT 1 SWITCHING TIME TEST CIRCUIT 2 GATE CHARGE D.U.T. D.U.T. VGS (−) RL VGS RG PG. Wave Form 0 VGS 10% PG. VDD 90% τ τ = 1 μs Duty Cycle ≤ 1% 4 90% VDS VDS 10% 0 10% Wave Form td(on) tr ton RL 50 Ω VDD 90% VDS (−) VGS (−) 0 IG = −2 mA td(off) tf toff Data Sheet G20216EJ1V0DS μ PA2591T1H TYPICAL CHARACTERISTICS (TA = 25°C) (1) N-channel MOSFET DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA TOTAL POWER DISSIPATION vs. AMBIENT TEMPERATURE 2 PT - Total Power Dissipation - W dT - Percentage of Rated Power - % 120 100 80 60 40 20 Mounted on FR-4 board of 25.4 mm x 25.4 mm x 0.8 mm 1.5 1 unit, 5 s 1 2 units, 5 s 0.5 0 0 0 25 50 75 100 125 150 0 175 25 50 75 100 125 150 175 TA - Ambient Temperature - °C TA - Ambient Temperature - °C FORWARD BIAS SAFE OPERATING AREA 100 d it e Lim V ) 5 4. S= 10 R (V G ID(DC) 110 1 0.1 0.01 PW ID(pulse) 11 110 m 5 1 m 1 m 1 0 1 =3 00 μs s s s s Single Pulse Mounted on FR-4 board of 25.4 mm x 25.4 mm x 0.8 mm PD(FET1):PD(FET2) = 1:1 0.1 1 10 100 VDS - Drain to Source Voltage - V TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH 1000 rth(j-A) - Transient Thermal Resistance - °C/W ID - Drain Current - A 1 ( DS ) ON PD (FET1) : PD (FET2) = 1 : 1 100 PD (FET1) : PD (FET2) = 1 : 0 10 Single Pulse Mounted on FR-4 board of 25.4 mm x 25.4 mm x 0.8 mm 1 1m 10 m 100 m 1 10 100 1000 PW - Pulse Width - s Data Sheet G20216EJ1V0DS 5 μ PA2591T1H DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE FORWARD TRANSFER CHARACTERISTICS 100 20 10 VGS = 4.5 V ID - Drain Current - A ID - Drain Current - A 16 Pulsed VDS = 10 V 2.5 V 12 8 4 1 TA = –25°C 0°C 25°C 75°C 125°C 150°C 0.1 0.01 0.001 Pulsed 0 0.0001 0.4 0.8 1.2 1.6 0 2 0.5 2 2.5 GATE TO SOURCE CUT-OFF VOLTAGE vs. CHANNEL TEMPERATURE FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT 2 1.5 1 0.5 VDS = 10 V ID = 1 mA 0 -50 -25 0 25 50 75 100 125 150 175 10 TA = –25°C 0°C 25°C 1 75°C 125°C 150°C Pulsed VDS = 10 V 0.1 0.01 0.1 Pulsed 160 120 80 VGS = 2.5 V 40 4.5 V 0 1 10 10 100 DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE RDS(on) - Drain to Source On-state Resistance - mΩ 200 1 ID - Drain Current - A DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT RDS(on) - Drain to Source On-state Resistance - mΩ 1.5 VGS - Gate to Source Voltage - V Tch - Channel Temperature - °C ID - Drain Current - A 6 1 VDS - Drain to Source Voltage - V | yfs | - Forward Transfer Admittance - S VGS(off) - Gate to Source Cut-off Voltage - V 0 200 Pulsed ID = 2 A 160 120 80 40 0 0 2 4 6 8 VGS - Gate to Source Voltage - V Data Sheet G20216EJ1V0DS 10 μ PA2591T1H CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE 1000 100 Pulsed ID = 2 A 80 60 VGS = 2.5 V 40 4.5 V 20 Ciss, Coss, Crss - Capacitance - pF RDS(on) - Drain to Source On-state Resistance - mΩ DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE 0 Ciss 100 Coss 10 -50 -25 0 25 50 0.01 75 100 125 150 175 0.1 1 10 100 VDS - Drain to Source Voltage - V Tch - Channel Temperature - °C DYNAMIC INPUT CHARACTERISTICS SOURCE TO DRAIN DIODE FORWARD VOLTAGE 6 100 5 IF - Diode Forward Current - A VGS - Gate to Source Voltage - V Crss VGS = 0 V f = 1 MHz VDD = 24 V 15 V 6V 4 3 2 1 10 VGS = 0 V 1 ID = 4 A Pulsed 0 0.1 0 1 2 3 4 5 6 7 QG - Gate Charge - nC 0 0.5 1 1.5 VF(S-D) - Source to Drain Voltage - V Data Sheet G20216EJ1V0DS 7 μ PA2591T1H (2) P-channel MOSFET DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA TOTAL POWER DISSIPATION vs. AMBIENT TEMPERATURE 2 PT - Total Power Dissipation - W dT - Percentage of Rated Power - % 120 100 80 60 40 20 Mounted on FR-4 board of 25.4 mm x 25.4 mm x 0.8 mm 1.5 1 unit, 5 s 1 2 units, 5 s 0.5 0 0 0 25 50 75 100 125 150 0 175 25 50 75 100 125 TA - Ambient Temperature - °C TA - Ambient Temperature - °C FORWARD BIAS SAFE OPERATING AREA -100 d it e Lim V ) 4 .5 =– ID - Drain Current - A R ( DS (V GS ID(DC) -1 PW ID(pulse) 1 -10 ) ON 11 110 110 1 m 1 0 m 1 5s m =3 s 00 μs s s Power Dissipation Limited -0.1 Single Pulse Mounted on FR-4 board of 25.4 mm x 25.4 mm x 0.8 mm PD(FET1):PD(FET2) = 1:1 -0.01 -0.1 -1 -10 -100 VDS - Drain to Source Voltage - V rth(j-A) - Transient Thermal Resistance - °C/W TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH 1000 PD (FET1) : PD (FET2) = 1 : 1 100 PD (FET1) : PD (FET2) = 0 : 1 10 Single Pulse Mounted on FR-4 board of 25.4 mm x 25.4 mm x 0.8 mm 1 1m 10 m 100 m 1 PW - Pulse Width - s 8 150 Data Sheet G20216EJ1V0DS 10 100 1000 175 μ PA2591T1H DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE FORWARD TRANSFER CHARACTERISTICS -100 -20 -10 ID - Drain Current - A -16 ID - Drain Current - A Pulsed VDS = –10 V VGS = –4.5 V -12 -8 –2.5 V -4 -1 TA = –25°C 0°C 25°C 75°C 125°C 150°C -0.1 -0.01 -0.001 Pulsed -0 -0.0001 -0.4 -0.8 -1.2 -1.6 -0 -2 -0.5 -1.5 -2 -2.5 VGS - Gate to Source Voltage - V GATE TO SOURCE CUT-OFF VOLTAGE vs. CHANNEL TEMPERATURE FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT -2 -1.5 -1 -0.5 Pulsed VDS = –10 V ID = –1 mA -0 -50 -25 0 25 50 75 100 125 150 175 10 TA = –25°C 0°C 25°C 75°C 125°C 150°C 1 Pulsed VDS = –10 V 0.1 -0.01 -0.1 DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT Pulsed 160 120 VGS = –2.5 V 80 – 4.5 V 40 0 -1 -10 -10 -100 DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE RDS(on) - Drain to Source On-state Resistance - mΩ 200 -1 ID - Drain Current - A Tch - Channel Temperature - °C RDS(on) - Drain to Source On-state Resistance - mΩ -1 VDS - Drain to Source Voltage - V | yfs | - Forward Transfer Admittance - S VGS(off) - Gate to Source Cut-off Voltage - V -0 ID - Drain Current - A 200 Pulsed 160 120 80 40 0 -0 -2 -4 -6 -8 -10 VGS - Gate to Source Voltage - V Data Sheet G20216EJ1V0DS 9 μ PA2591T1H CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE 1000 140 VGS = –2.5 V ID = –1 A 120 100 80 –4.5 V –2 A 60 40 20 Pulsed Ciss, Coss, Crss - Capacitance - pF RDS(on) - Drain to Source On-state Resistance - mΩ DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE 0 -50 -25 0 25 50 Ciss 100 Coss Crss VGS = 0 V f = 1.0 MHz 10 -0.01 75 100 125 150 175 -10 -100 SOURCE TO DRAIN DIODE FORWARD VOLTAGE DYNAMIC INPUT CHARACTERISTICS -6 -100 -5 IF - Diode Forward Current - A VGS - Gate to Source Voltage - V -1 VDS - Drain to Source Voltage - V Tch - Channel Temperature - °C VDD = –24 V –15 V –6 V -4 -3 -2 -1 -10 VGS = 0 V -1 Pulsed ID = –3 A -0 -0.1 0 1 2 3 4 5 6 7 QG - Gate Charge - nC 10 -0.1 0 0.5 1 VF(S-D) - Source to Drain Voltage - V Data Sheet G20216EJ1V0DS 1.5 μ PA2591T1H • The information in this document is current as of February, 2010. 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