HAF2011(L),HAF2011(S) Datasheet

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HAF2011(L), HAF2011(S)
Silicon N Channel MOS FET Series
Power Switching
REJ03G1138-0500
Rev.5.00
Aug 21, 2007
Description
This FET has the over temperature shut-down capability sensing to the junction temperature.
This FET has the built-in over temperature shut-down circuit in the gate area. And this circuit operation to shut-down
the gate voltage in case of high junction temperature like applying over power consumption, over current etc.
Features
•
•
•
•
Logic level operation (4 to 6 V Gate drive)
High endurance capability against to the short circuit
Built-in the over temperature shut-down circuit
Latch type shut-down operation (Need 0 voltage recovery)
Outline
RENESAS Package code: PRSS0004AE-A
(Package name: LDPAK (L) )
RENESAS Package code: PRSS0004AE-B
(Package name: LDPAK (S)-(1) )
4
4
1
1
2
3
D
Gate Resistor
G
Temperature
Sensing
Circuit
Latch
Circuit
Gate
Shutdown
Circuit
S
REJ03G1138-0500 Rev.5.00 Aug 21, 2007
Page 1 of 8
1. Gate
2. Drain
3. Source
4. Drain
2
3
HAF2011(L), HAF2011(S)
Absolute Maximum Ratings
(Ta = 25°C)
Item
Drain to source voltage
Gate to source voltage
Symbol
VDSS
VGSS
VGSS
ID
Drain current
Drain peak current
Body-drain diode reverse drain current
Channel dissipation
Channel temperature
Storage temperature
Value
60
16
–2.5
40
80
40
50
150
–55 to +150
ID (pulse) Note 1
IDR
Pch Note 2
Tch
Tstg
Unit
V
V
V
A
A
A
W
°C
°C
Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1%
2. Value at Tc = 25°C
Typical Operation Characteristics
(Ta = 25°C)
Item
Input voltage
Input current
(Gate non shut down)
Input current
(Gate shut down)
Shut down temperature
Gate operation voltage
Symbol
VIH
Min
3.5
Typ
—
Max
—
Unit
V
VIL
IIH1
IIH2
IIL
—
—
—
—
—
—
—
3.5
—
—
—
—
0.8
0.35
175
—
1.2
100
50
1
—
—
—
12
V
µA
µA
µA
mA
mA
°C
V
IIH (sd) 1
IIH (sd) 2
Tsd
VOP
REJ03G1138-0500 Rev.5.00 Aug 21, 2007
Page 2 of 8
Test Conditions
Vi = 8 V, VDS = 0
Vi = 3.5 V, VDS = 0
Vi = 1.2 V, VDS = 0
Vi = 8 V, VDS = 0
Vi = 3.5 V, VDS = 0
Channel temperature
HAF2011(L), HAF2011(S)
Electrical Characteristics
(Ta = 25°C)
Item
Symbol
ID1
ID2
V (BR) DSS
V (BR) GSS
V (BR) GSS
IGSS1
IGSS2
IGSS3
IGSS4
IGS (op) 1
IGS (op) 2
IDSS
VGS (off)
RDS (on)
RDS (on)
|yfs|
Coss
Min
15
—
60
16
–2.5
—
—
—
—
—
—
—
1.0
—
—
8
—
Typ
—
—
—
—
—
—
—
—
—
0.8
0.35
—
—
25
15
16
940
Max
—
10
—
—
—
100
50
1
–100
—
—
10
2.25
33
20
—
—
Unit
A
mA
V
V
V
µA
µA
µA
µA
mA
mA
µA
V
mΩ
mΩ
S
pF
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Body-drain diode forward voltage
Body-drain diode reverse recovery time
td (on)
tr
td (off)
tf
VDF
trr
—
—
—
—
—
—
10.7
66
15.5
19
1
200
—
—
—
—
—
—
µs
µs
µs
µs
V
ns
Over load shut down operation time Note4
tos1
—
1
—
ms
Drain current
Drain to source breakdown voltage
Gate to source breakdown voltage
Gate to source leak current
Input current (shut down)
Zero gate voltage drain current
Gate to source cutoff voltage
Static drain to source on state resistance
Forward transfer admittance
Output capacitance
Notes: 3. Pulse test
4. Including the junction temperature rise of the over loaded condition.
REJ03G1138-0500 Rev.5.00 Aug 21, 2007
Page 3 of 8
Test Conditions
VGS = 3.5 V, VDS = 2 V
VGS = 1.2 V, VDS = 2 V
ID = 10 mA, VGS = 0
IG = 300 µA, VDS = 0
IG = –100 µA, VDS = 0
VGS = 8 V, VDS = 0
VGS = 3.5 V, VDS = 0
VGS = 1.2 V, VDS = 0
VGS = –2.4 V, VDS = 0
VGS = 8 V, VDS = 0
VGS = 3.5 V, VDS = 0
VDS = 60 V, VGS = 0
ID = 1 mA, VDS = 10 V
ID = 20 A, VGS = 4 V Note 3
ID = 20 A, VGS = 10 V Note 3
ID = 20 A, VDS = 10 V Note 3
VDS = 10 V, VGS = 0
f = 1 MHz
ID = 20 A
VGS = 5 V
RL = 1.5 Ω
IF = 40 A, VGS = 0
IF = 40 A, VGS = 0
diF/dt = 50 A/µs
VGS = 5 V, VDD = 16 V
HAF2011(L), HAF2011(S)
Main Characteristics
Power vs. Temperature Derating
Maximum Safe Operation Area
500
ID (A)
Thermal shut down
200 Operation area
60
Drain Current
Channel Dissipation
Pch (W)
80
40
20
50
100
150
Case Temperature
10
50
DC
20
200
Drain Current
ion
10
m
s
(T
c=
5
s
s
25
10
°C
)
20
50 100
50
40
Tc = –25°C
25°C
30
4V
40
=
m
Typical Transfer Characteristics
ID (A)
60
0µ
1
Drain to Source Voltage VDS (V)
Drain Current
ID (A)
80
at
Operation in
this area is
2 limited by R
DS (on)
1
Tc (°C)
Pulse Test
8V
6V
5V
10 V
Op
er
10
5
Typical Output Characteristics
100
PW
0.5 Ta = 25°C
0.3
0.3 0.5 1
2
0
0
100
VGS = 3.5 V
20
75°C
20
10
VDS = 10 V
Pulse Test
0
0
0
2
4
6
Drain to Source Voltage
8
10
0
0.4
ID = 20 A
0.3
0.2
10 A
0.1
5A
0
0
2
4
6
8
10
Gate to Source Voltage VGS (V)
REJ03G1138-0500 Rev.5.00 Aug 21, 2007
Page 4 of 8
3
4
5
VGS (V)
Static Drain to Source on State Resistance
vs. Drain Current
Drain to Source on State Resistance
RDS (on) (mΩ)
Drain to Source Saturation Voltage
VDS (on) (V)
Drain to Source Saturation Voltage vs.
Gate to Source Voltage
Pulse Test
2
Gate to Source Voltage
VDS (V)
0.5
1
50
VGS = 4 V
20
10 V
10
5
2
Pulse Test
1
1
2
5
10
20
Drain Current
50 100 200
ID (A)
Static Drain to Source on State Resistance
vs. Temperature
0.10
Pulse Test
0.08
0.06
5 A, 10 A
ID = 20 A
0.04
VGS = 4 V
ID = 20 A
0.02
5 A, 10 A
10 V
0
–40
0
40
80
Case Temperature
120
160
Forward Transfer Admittance vs.
Drain Current
Forward Transfer Admittance |yfs| (S)
Static Drain to Source on State Resistance
RDS (on) (Ω)
HAF2011(L), HAF2011(S)
100
VDS = 10 V
Pulse Test
50
Tc = –25°C
20
10
25°C
75°C
5
2
1
0.5
500
500
Switching Time t (µs)
Reverse Recovery Time trr (ns)
1000
200
100
50
di / dt = 50 A / µs
VGS = 0, Ta = 25°C
1
2
5
10
Reverse Drain Current
20
10
20
50
VGS = 5 V, VDD = 30 V
PW = 300 µs, duty ≤ 1 %
200
100
tr
50
tf
20
td(off)
td(on)
10
0.5
50
IDR (A)
1
2
5
10
Drain Current
20
50
ID (A)
Typical Capacitance vs.
Drain to Source Voltage
Reverse Drain Current vs.
Source to Drain Voltage
50
10000
Pulse Test
40
Capacitance C (pF)
Reverse Drain Current IDR (A)
5
Switching Characteristics
1000
10
0.5
2
Drain Current ID (A)
Tc (°C)
Body-Drain Diode Reverse
Recovery Time
20
1
VGS = 5 V
30
0V
20
10
3000
1000
Coss
300
100
30
0
VGS = 0
f = 1 MHz
10
0
0.4
0.8
1.2
1.6
2.0
Source to Drain Voltage VSD (V)
REJ03G1138-0500 Rev.5.00 Aug 21, 2007
Page 5 of 8
0
10
20
30
40
50
Drain to Source Voltage VDS (V)
HAF2011(L), HAF2011(S)
Shutdown Case Temperature vs.
Gate to Source Voltage
Shutdown Case Temperature Tc (°C)
Gate to Source Voltage
VGS (V)
Gate to Source Voltage vs.
Shutdown Time of Load-Short Test
12
10
VDD = 9 V
8
6
16 V
4
2
0
0.1
1
10
100
200
180
160
140
120
ID = 5 A
100
0
Shutdown Time of Load-Short Test PW (mS)
2
4
6
8
10
VGS (V)
Gate to Source Voltage
Normalized Transient Thermal Impedance γ s (t)
Normalized Transient Thermal Impedance vs. Pulse Width
3
Tc = 25°C
1
D=1
0.5
0.3
0.2
θch – c (t) = γ s (t) • θch – c
0.1 0.1
θch – c = 2.5°C/W, Tc = 25°C
0.05
0.03
0.02
1
0.0
1
o
sh
D=
PDM
tp
uls
0.01
10 µ
e
PW
T
PW
T
100 µ
1m
100 m
10 m
1
10
Pulse Width PW (S)
Switching Time Test Circuit
Waveform
90%
Vout
Monitor
Vin Monitor
D.U.T.
Vin
10%
RL
Vout
Vin
5V
50 Ω
VDD
= 30 V
10%
90%
td(on)
REJ03G1138-0500 Rev.5.00 Aug 21, 2007
Page 6 of 8
10%
tr
90%
td(off)
tf
HAF2011(L), HAF2011(S)
Package Dimensions
RENESAS Code
PRSS0004AE-A
MASS[Typ.]
1.40g
4.44 ± 0.2
1.3 ± 0.15
1.3 ± 0.2
1.37 ± 0.2
0.76 ± 0.1
2.54 ± 0.5
2.54 ± 0.5
JEITA Package Code
SC-83
RENESAS Code
PRSS0004AE-B
2.49 ± 0.2
11.0 ± 0.5
0.2
0.86 +– 0.1
Package Name
LDPAK(S)-(1)
Unit: mm
10.2 ± 0.3
8.6 ± 0.3
11.3 ± 0.5
0.3
10.0 +– 0.5
Previous Code
LDPAK(L) / LDPAK(L)V
Previous Code
LDPAK(S)-(1) / LDPAK(S)-(1)V
0.4 ± 0.1
MASS[Typ.]
1.30g
(1.5)
10.0
2.54 ± 0.5
REJ03G1138-0500 Rev.5.00 Aug 21, 2007
Page 7 of 8
0.4 ± 0.1
0.3
3.0 +– 0.5
2.54 ± 0.5
0.2
0.86 +– 0.1
7.8
7.0
2.49 ± 0.2
0.2
0.1 +– 0.1
1.37 ± 0.2
1.3 ± 0.2
7.8
6.6
1.3 ± 0.15
+ 0.3
– 0.5
8.6 ± 0.3
(1.5)
(1.4)
4.44 ± 0.2
10.2 ± 0.3
Unit: mm
1.7
JEITA Package Code

(1.4)
Package Name
LDPAK(L)
2.2
HAF2011(L), HAF2011(S)
Ordering Information
Part No.
HAF2011-90L
HAF2011-90S
HAF2011-90STL
HAF2011-90STR
Quantity
Max: 50 pcs/sack
Max: 50 pcs/sack
1000 pcs/Reel
1000 pcs/Reel
REJ03G1138-0500 Rev.5.00 Aug 21, 2007
Page 8 of 8
Shipping Container
Sack
Sack
Embossed tape
Embossed tape
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but not limited to, product data, diagrams, charts, programs, algorithms, and application circuit examples.
3. You should not use the products or the technology described in this document for the purpose of military applications such as the development of weapons of mass
destruction or for the purpose of any other military use. When exporting the products or technology described herein, you should follow the applicable export control laws
and regulations, and procedures required by such laws and regulations.
4. All information included in this document such as product data, diagrams, charts, programs, algorithms, and application circuit examples, is current as of the date this
document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas products listed in this document,
please confirm the latest product information with a Renesas sales office. Also, please pay regular and careful attention to additional and different information to be
disclosed by Renesas such as that disclosed through our website. (http://www.renesas.com )
5. Renesas has used reasonable care in compiling the information included in this document, but Renesas assumes no liability whatsoever for any damages incurred as a
result of errors or omissions in the information included in this document.
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(2) surgical implantations
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applications shall indemnify and hold harmless Renesas Technology Corp., its affiliated companies and their officers, directors, and employees against any and all
damages arising out of such applications.
9. You should use the products described herein within the range specified by Renesas, especially with respect to the maximum rating, operating supply voltage range,
movement power voltage range, heat radiation characteristics, installation and other product characteristics. Renesas shall have no liability for malfunctions or damages
arising out of the use of Renesas products beyond such specified ranges.
10. Although Renesas endeavors to improve the quality and reliability of its products, IC products have specific characteristics such as the occurrence of failure at a certain
rate and malfunctions under certain use conditions. Please be sure to implement safety measures to guard against the possibility of physical injury, and injury or damage
caused by fire in the event of the failure of a Renesas product, such as safety design for hardware and software including but not limited to redundancy, fire control and
malfunction prevention, appropriate treatment for aging degradation or any other applicable measures. Among others, since the evaluation of microcomputer software
alone is very difficult, please evaluate the safety of the final products or system manufactured by you.
11. In case Renesas products listed in this document are detached from the products to which the Renesas products are attached or affixed, the risk of accident such as
swallowing by infants and small children is very high. You should implement safety measures so that Renesas products may not be easily detached from your products.
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any other inquiries.
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