HD74LV1GT08A 2–input AND Gate / CMOS Logic Level Shifter REJ03D0118–0800Z (Previous ADE-205-328F (Z)) Rev.8.00 Sep.24.2003 Description The HD74LV1GT08A is high-speed CMOS two input AND gate using silicon gate CMOS process. With CMOS low power dissipation, it provides high-speed equivalent to LS–TTL series. The internal circuit of three stages construction with buffer provides wide noise margin and stable output. The input protection circuitry on this device allows over voltage tolerance on the input, allowing the device to be used as a logic–level translator from 3.0 V CMOS Logic to 5.0 V CMOS Logic or from 1.8 V CMOS logic to 3.0 V CMOS Logic while operating at the high-voltage power supply. Low voltage and high-speed operation is suitable for the battery powered products (e.g., notebook computers), and the low power consumption extends the battery life. Features • The basic gate function is lined up as Renesas uni logic series. • Supplied on emboss taping for high-speed automatic mounting. • TTL compatible input level. Supply voltage range : 3.0 to 5.5 V Operating temperature range : –40 to +85°C • Logic-level translate function 3.0 V CMOS logic → 5.0 V CMOS logic (@VCC = 5.0 V) 1.8 V or 2.5 V CMOS logic → 3.3 V CMOS logic (@VCC = 3.3 V) • All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) All outputs VO (Max.) = 5.5 V (@VCC = 0 V) • Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V) • All the logical input has hysteresis voltage for the slow transition. • Ordering Information Part Name Package Type Package Code Package Abbreviation Taping Abbreviation (Quantity) HD74LV1GT08ACME CMPAK-5 pin CMPAK-5V CM E (3,000 pcs/reel) HD74LV1GT08AVSE VSON-5 pin TNP-5DV CMPAK-5V(O) Rev.8.00, Sep.24.2003, page 1 of 10 VS HD74LV1GT08A Outline and Article Indication • HD74LV1GT08A Index band Marking T 2 = Control code CMPAK–5 • HD74LV1GT08A Marking T VSON–5 Rev.8.00, Sep.24.2003, page 2 of 10 2 = Control code HD74LV1GT08A Function Table Inputs Output Y A B L L L H L L L H L H H H H : High level L : Low level Pin Arrangement IN B 1 IN A 2 GND 3 (Top view) Rev.8.00, Sep.24.2003, page 3 of 10 5 VCC 4 OUT Y HD74LV1GT08A Absolute Maximum Ratings Item Symbol Ratings Unit Supply voltage range VCC –0.5 to 7.0 V Input voltage range *1 VI –0.5 to 7.0 V VO –0.5 to VCC + 0.5 V Output voltage range *1, 2 –0.5 to 7.0 Test Conditions Output : H or L VCC : OFF Input clamp current IIK –20 mA VI < 0 Output clamp current IOK ±50 mA VO < 0 or VO > VCC Continuous output current IO ±25 mA VO = 0 to VCC Continuous current through VCC or GND ICC or IGND ±50 mA Maximum power dissipation *3 at Ta = 25°C (in still air) PT 200 mW Storage temperature Tstg –65 to 150 °C Notes: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore no two of which may be realized at the same time. 1. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. This value is limited to 5.5 V maximum. 3. The maximum package power dissipation was calculated using a junction temperature of 150°C. Recommended Operating Conditions Item Symbol Min Max Unit Supply voltage range VCC 3.0 5.5 V Input voltage range VI 0 5.5 V Output voltage range VO 0 VCC V Output current IOL — 6 mA — 12 VCC = 4.5 to 5.5 V — –6 VCC = 3.0 to 3.6 V — –12 VCC = 4.5 to 5.5 V 0 100 0 20 –40 85 IOH Input transition rise or fall rate ∆t / ∆v Operating free-air temperature Ta Note: Unused or floating inputs must be held high or low. Rev.8.00, Sep.24.2003, page 4 of 10 ns / V Conditions VCC = 3.0 to 3.6 V VCC = 3.0 to 3.6 V VCC = 4.5 to 5.5 V °C HD74LV1GT08A Electrical Characteristic • Ta = –40 to 85°C Item Symbol VCC (V) * Input voltage VIH VIL Hysteresis voltage Output voltage VH VOH VOL Min Typ Max Unit Test condition 3.0 to 3.6 1.5 — — V 4.5 to 5.5 2.0 — — 3.0 to 3.6 — — 0.6 4.5 to 5.5 — — 0.8 3.3 — 0.10 — 5.0 — 0.15 — V V VT+ – VT– IOH = –50 µA Min to Max VCC–0.1 — — 3.0 2.48 — — IOH = –6 mA 4.5 3.8 — — IOH = –12 mA Min to Max — — 0.1 IOL = 50 µA 3.0 — — 0.44 IOL = 6 mA 4.5 — — 0.55 IOL = 12 mA Input current IIN 0 to 5.5 — — ±1 µA VIN = 5.5 V or GND Quiescent supply current ICC 5.5 — — 10 µA VIN = VCC or GND, IO = 0 ∆ICC 5.5 — — 1.5 mA One input VIN = 3.4 V, other input VCC or GND Output leakage current IOFF 0 — — 5 µA VIN or VO = 0 to 5.5 V Input capacitance 5.0 — 2.5 — pF VIN = VCC or GND CIN Note: For conditions shown as Min or Max, use the appropriate values under recommended operating conditions. Rev.8.00, Sep.24.2003, page 5 of 10 HD74LV1GT08A Switching Characteristics • VCC = 3.3 ± 0.3 V Item Propagation delay time Symbol tPLH tPHL Ta = 25°C Ta = –40 to 85°C Unit Test Min Typ Max Min Max — 6.5 10.5 1.0 12.0 — 7.5 12.5 1.0 14.0 ns FROM Conditions (Input) TO (Output) CL = 15 pF Y A or B CL = 50 pF • VCC = 5.0 ± 0.5 V Item Propagation delay time Symbol tPLH tPHL Ta = 25°C Ta = –40 to 85°C Unit Test Min Typ Max Min Max — 5.0 6.9 1.0 8.0 — 5.5 7.9 1.0 9.0 ns FROM Conditions (Input) TO (Output) CL = 15 pF Y A or B CL = 50 pF Operating Characteristics • CL = 50 pF Item Power dissipation capacitance Symbol CPD VCC (V) Ta = 25°C 5.0 Rev.8.00, Sep.24.2003, page 6 of 10 Min Typ Max — 10.0 — Unit Test Conditions pF f = 10 MHz HD74LV1GT08A Test Circuit VCC Pulse generator Output Input 50 Ω Note: CL includes probe and jig capacitance. Rev.8.00, Sep.24.2003, page 7 of 10 CL HD74LV1GT08A • Waveforms tr tf 90% Input VI 90% Vref Vref 10% 10% GND VOH 50% Output 50% VOL t PLH t PHL INPUTS VCC (V) VI Vref tr / tf 3.3±0.3 2.5 V ≤ 3.0 ns 50% ≤ 3.0 ns 1.5 V 5.0±0.5 3V Notes: 1. Input waveform : PRR ≤ 1 MHz, Zo = 50 Ω. 2. The output are measured one at a time with one transition per measurement. Rev.8.00, Sep.24.2003, page 8 of 10 HD74LV1GT08A Package Dimensions (0.65) 1.25 ± 0.1 (0.65) 0 – 0.1 (0.2) 2.0 ± 0.2 0.9 ± 0.1 (0.425) 5 – 0.2 ± 0.05 + 0.1 0.15– 0.05 2.1 ± 0.3 1.3 ± 0.2 (0.425) Unit: mm Package Code JEDEC JEITA Mass (reference value) CMPAK–5V — Conforms 0.006 g Unit: mm (1.3) (0.65) (2.1) 0.15 ± 0.05 1.3 ± 0.05* (0.65) 0.025 – 0.1 + 0.1 5 – 0.2 – 0.05 * The value does not include Resin Bar. (One side: 0.15 mm (max)) Rev.8.00, Sep.24.2003, page 9 of 10 0.88 (0.1) + 0.02 – 0.03 2.0 ± 0.1* Package Code JEDEC JEITA Mass (reference value) CMPAK–5V(O) — Conforms 0.006 g HD74LV1GT08A Unit: mm 1.6 ± 0.05 +0.1 (0.1) 0.5 +0.1 0.12 –0.05 1.0 ± 0.1 0.6 MAX 0.5 (0.1) 1.2 ± 0.1 0.2 1.6 ± 0.05 0.2 5 – 0.2 –0.05 Package Code JEDEC JEITA Mass (reference value) Rev.8.00, Sep.24.2003, page 10 of 10 TNP–5DV 0.002 g Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. 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