MAXIM MAX2021

EVALUATION KIT AVAILABLE
MAX2021
High-Dynamic-Range, Direct Up-/Downconversion
650MHz to 1200MHz Quadrature Mod/Demod
General Description
The MAX2021 low-noise, high-linearity, direct upconversion/downconversion quadrature modulator/demodulator is designed for RFID handheld and portal
readers, as well as single and multicarrier 650MHz to
1200MHz GSM/EDGE, cdma2000 ® , WCDMA, and
iDEN ® base-station applications. Direct conversion
architectures are advantageous since they significantly
reduce transmitter or receiver cost, part count, and
power consumption as compared to traditional IF-based
double conversion systems.
In addition to offering excellent linearity and noise performance, the MAX2021 also yields a high level of component integration. This device includes two matched
passive mixers for modulating or demodulating in-phase
and quadrature signals, two LO mixer amplifier drivers,
and an LO quadrature splitter. On-chip baluns are also
integrated to allow for single-ended RF and LO connections. As an added feature, the baseband inputs have
been matched to allow for direct interfacing to the transmit DAC, thereby eliminating the need for costly I/Q
buffer amplifiers.
The MAX2021 operates from a single +5V supply. It is
available in a compact 36-pin TQFN package (6mm x
6mm) with an exposed pad. Electrical performance is
guaranteed over the extended -40°C to +85°C temperature range.
Applications
Features
♦ 650MHz to 1200MHz RF Frequency Range
♦ Scalable Power: External Current-Setting
Resistors Provide Option for Operating Device in
Reduced-Power/Reduced-Performance Mode
♦ 36-Pin, 6mm x 6mm TQFN Provides High Isolation
in a Small Package
Modulator Operation:
♦ Meets 4-Carrier WCDMA 65dBc ACLR
♦ +21dBm Typical OIP3
♦ +58dBm Typical OIP2
♦ +16.7dBm Typical OP1dB
♦ -32dBm Typical LO Leakage
♦ 43.5dBc Typical Sideband Suppression
♦ -174dBm/Hz Output Noise Density
♦ DC to 550MHz Baseband Input Allows a Direct
Launch DAC Interface, Eliminating the Need for
Costly I/Q Buffer Amplifiers
♦ DC-Coupled Input Allows Ability for Customer
Offset Voltage Control
Demodulator Operation:
♦ +35.2dBm Typical IIP3
♦ +76dBm Typical IIP2
RFID Handheld and Portal Readers
♦ > 30dBm IP1dB
Single and Multicarrier WCDMA 850 Base Stations
♦ 9.2dB Typical Conversion Loss
Single and Multicarrier cdmaOne™ and cdma2000
Base Stations
♦ 9.3dB Typical NF
GSM 850/GSM 900 EDGE Base Stations
♦ 0.15° I/Q Typical Phase Imbalance
♦ 0.06dB Typical I/Q Gain Imbalance
Predistortion Transmitters and Receivers
Ordering Information
WiMAX Transmitters and Receivers
Fixed Broadband Wireless Access
Military Systems
PART
TEMP RANGE
PIN-PACKAGE
MAX2021ETX+
-40°C to +85°C
36 TQFN-EP*
(6mm x 6mm)
MAX2021ETX+T
-40°C to +85°C
36 TQFN-EP*
(6mm x 6mm)
Microwave Links
Digital and Spread-Spectrum Communication Systems
Video-on-Demand (VOD) and DOCSIS Compliant
Edge QAM Modulation
Cable Modem Termination Systems (CMTS)
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
T = Tape and reel.
cdma2000 is a registered certification mark and registered service mark of the Telecommunications Industry Association.
iDEN is a registered trademark of Motorola Trademark Holdings, LLC.
cdmaOne is a trademark of CDMA Development Group.
For pricing, delivery, and ordering information, please contact Maxim Direct at
1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
19-3918; Rev 2; 4/13
MAX2021
High-Dynamic-Range, Direct Up-/Downconversion
650MHz to 1200MHz Quadrature Mod/Demod
ABSOLUTE MAXIMUM RATINGS
VCC_ to GND ........................................................-0.3V to +5.5V
BBI+, BBI-, BBQ+, BBQ- to GND...............-3.5V to (VCC + 0.3V)
LO, RF to GND Maximum Current ......................................30mA
RF Input Power ...............................................................+30dBm
Baseband Differential I/Q Input Power...........................+20dBm
LO Input Power...............................................................+10dBm
RBIASLO1 Maximum Current .............................................10mA
RBIASLO2 Maximum Current .............................................10mA
Note 1:
Note 2:
RBIASLO3 Maximum Current .............................................10mA
Continuous Power Dissipation (Note 1) ...............................7.6W
Operating Case Temperature Range (Note 2) ....-40°C to +85°C
Maximum Junction Temperature .....................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
Based on junction temperature TJ = TC + (θJC x VCC x ICC). This formula can be used when the temperature of the
exposed pad is known while the device is soldered down to a PCB. See the Applications Information section for details.
The junction temperature must not exceed +150°C.
TC is the temperature on the exposed pad of the package. TA is the ambient temperature of the device and PCB.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
PACKAGE THERMAL CHARACTERISTICS
TQFN
Junction-to-Ambient
Thermal Resistance (θJA) (Notes 3, 4) .......................+34°C/W
Note 3:
Note 4:
Junction-to-Case
Thermal Resistance (θJC) (Notes 1, 4) ......................+8.5°C/W
Junction temperature TJ = TA + (θJA x VCC x ICC). This formula can be used when the ambient temperature of the PCB is
known. The junction temperature must not exceed +150°C.
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
DC ELECTRICAL CHARACTERISTICS
(MAX2021 Typical Application Circuit, VCC = 4.75V to 5.25V, GND = 0V, I/Q inputs terminated into 50Ω to GND, LO input terminated into
50Ω, RF output terminated into 50Ω, 0V common-mode input, R1 = 432Ω, R2 = 619Ω, R3 = 332Ω, TC = -40°C to +85°C, unless otherwise
noted. Typical values are at VCC = 5V, TC = +25°C, unless otherwise noted.)
PARAMETER
Supply Voltage
Total Supply Current
SYMBOL
CONDITIONS
VCC
ITOTAL
Pins 3, 13, 15, 31, 33 all connected to VCC
MIN
TYP
MAX
4.75
5.00
5.25
V
230
271
315
mA
1355
1654
mW
TYP
MAX
UNIT
Total Power Dissipation
UNITS
RECOMMENDED AC OPERATING CONDITIONS
PARAMETER
SYMBOL
CONDITIONS
MIN
RF Frequency (Note 5)
fRF
650
1200
MHz
LO Frequency (Note 5)
fLO
750
1200
MHz
IF Frequency (Note 5)
f IF
550
MHz
+3
dBm
LO Power Range
2
PLO
-6
Maxim Integrated
MAX2021
High-Dynamic-Range, Direct Up-/Downconversion
650MHz to 1200MHz Quadrature Mod/Demod
AC ELECTRICAL CHARACTERISTICS (Modulator)
(MAX2021 Typical Application Circuit, VCC = 4.75V to 5.25V, GND = 0V, I/Q differential inputs driven from a 100Ω DC-coupled source,
0V common-mode input, PLO = 0dBm, 750MHz ≤ fLO ≤ 1200MHz, 50Ω LO and RF system impedance, R1 = 432Ω, R2 = 619Ω, R3 =
332Ω, TC = -40°C to +85°C. Typical values are at VCC = 5V, VBBI = 1.4VP-P differential, VBBQ = 1.4VP-P differential, fIQ = 1MHz, fLO =
900MHz, TC = +25°C, unless otherwise noted.) (Note 6)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
BASEBAND INPUT
Baseband Input Differential Impedance
f IQ = 1MHz
53
BB Common-Mode Input Voltage
Range
-3.5
0
+3.5
V
LO INPUT
LO Input Return Loss
RF and IF terminated (Note 7)
12
dB
I/Q MIXER OUTPUTS
Output IP3
OIP3
Output IP2
OIP2
Output P1dB
Output Power
fBB1 = 1.8MHz,
fBB2 = 1.9MHz
fLO = 900MHz
21.1
fLO = 1000MHz
22.3
dBm
fBB1 = 1.8MHz, fBB2 = 1.9MHz
57.9
dBm
fBB = 25MHz, PLO = 0dBm
16.7
dBm
0.7
dBm
-0.016
dB/°C
0.15
dB
POUT
Output Power Variation Over
Temperature
TC = -40°C to +85°C
Output-Power Flatness
Sweep fBB, PRF flatness for fBB from 1MHz
to 50MHz
ACLR (1st Adjacent Channel
5MHz Offset)
Single-carrier WCDMA (Note 8)
65
dBc
LO Leakage
No external calibration, with each
baseband input terminated in 50
-32
dBm
Sideband Suppression
No external calibration, PLO = 0dBm
fLO = 920MHz
PLO = -3dBm
Output Noise Density
Each baseband input terminated in 50
(Note 9)
-174
dBm/Hz
Output Noise Floor
POUT = 0dBm, fLO = 900MHz (Note 10)
-168
dBm/Hz
RF Return Loss
(Note 7)
15
dB
Maxim Integrated
30
39.6
43.5
dBc
3
MAX2021
High-Dynamic-Range, Direct Up-/Downconversion
650MHz to 1200MHz Quadrature Mod/Demod
AC ELECTRICAL CHARACTERISTICS (Demodulator)
(MAX2021 Typical Application Circuit when operated as a demodulator, VCC = 4.75V to 5.25V, GND = 0V, I/Q outputs are recombined
using network shown in Figure 5. Losses of combining network not included in measurements. VDC for BBI+. BBI-, BBQ+, BBQ- = 0V,
PRF = PLO = 0dBm, 750MHz ≤ fLO ≤ 1200MHz, 50Ω LO and RF system impedance, R1 = 432Ω, R2 = 619Ω, R3 = 332Ω, TC = -40°C to
+85°C. Typical values are at VCC = 5V, TC = +25°C, unless otherwise noted.) (Note 6)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
RF INPUT
Conversion Loss
LC
Noise Figure
NF
Noise Figure Under-Blocking
NFBLOCK
fBB = 25MHz (Note 11)
9.2
dB
fLO = 900MHz
9.3
dB
fBLOCKER = 900MHz, PRF = 11dBm,
fRF = fLO = 890MHz (Note 12)
17.8
dB
Input Third-Order Intercept
IIP3
fRF1 = 925MHz, fRF2 = 926MHz, fLO =
900MHz, PRF = PLO = 0dBm, fSPUR = 24MHz
35.2
dBm
Input Second-Order Intercept
IIP2
fRF1 = 925MHz, fRF2 = 926MHz, fLO =
900MHz, PRF = PLO = 0dBm, fSPUR = 51MHz
76
dBm
Input 1dB Compression
P1dB
fIF = 50MHz, fLO = 900MHz, PLO = 0dBm
30
dBm
fBB = 1MHz, fLO = 900MHz, PLO = 0dBm
0.06
dB
I/Q Gain Mismatch
PLO = 0dBm
1.1
PLO = -3dBm
0.15
I/Q Phase Mismatch
fBB = 1MHz,
fLO = 900MHz
Minimum Demodulation 3dB
Bandwidth
LO = 1160MHz LO > RF
> 550
MHz
Minimum 1dB Gain Flatness
LO = 1160MHz LO > RF
> 450
MHz
Degrees
AC ELECTRICAL CHARACTERISTICS (Demodulator LO = 965MHz)
(Typical Application Circuit when operated as a demodulator. I/Q outputs are recombined using network shown in Figure 5. Losses of
combining network not included in measurements. RF and LO ports are driven from 50Ω sources. Typical values are for TA = +25°C,
VCC = 5.0V, I/Q DC voltage return = 0V, PRF = 0dBm, PLO = 0dBm, fRF = 780MHz, fLO = 965MHz, fIF = 185MHz, unless otherwise noted.)
PARAMETER
Conversion Loss
Noise Figure
Noise Figure Under Blocking
Input Third-Order Intercept
Point
4
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Lc
10.1
dB
NFSSB
10.4
dB
19
dB
NFBLOCK
fBLOCKER = 700MHz, PBLOCKER = 11dBm,
fLO = 965MHz, fRF = 865MHz, (Note 12)
fRF1 = 780MHz, fRF2 = 781MHz,
PRF1 = PRF2 = 0dBm, fIF1 = 185MHz,
fIF2 = 184MHz
34.5
IIP3
dBm
fRF1 = 780MHz, fRF2 = 735MHz,
PRF1 = PRF2 = 0dBm, fIF1 = 185MHz,
fIF2 = 230MHz
34.6
Maxim Integrated
MAX2021
High-Dynamic-Range, Direct Up-/Downconversion
650MHz to 1200MHz Quadrature Mod/Demod
AC ELECTRICAL CHARACTERISTICS (Demodulator LO = 965MHz) (continued)
(Typical Application Circuit when operated as a demodulator. I/Q outputs are recombined using network shown in Figure 5. Losses of
combining network not included in measurements. RF and LO ports are driven from 50Ω sources. Typical values are for TA = +25°C,
VCC = 5.0V, I/Q DC voltage return = 0V, PRF = 0dBm, PLO = 0dBm, fRF = 780MHz, fLO = 965MHz, fIF = 185MHz, unless otherwise noted.)
PARAMETER
Input Second-Order Intercept
Point
Spurious Relative to a
Fundamental at 780MHz
Input Compression from Linear
SYMBOL
CONDITIONS
fRF1 = 780MHz, fRF2 = 781MHz,
PRF1 = PRF2 = 0dBm, fIF1 = 185MHz,
fIF2 = 184MHz, fIF1+ fIF2 term
MIN
TYP
MAX
UNITS
70.1
IIP2
dBm
fRF1 = 780MHz, fRF2 = 735MHz,
PRF1 = PRF2 = 0dBm, fIF1 = 185MHz,
fIF2 = 230MHz, fIF1+ fIF2 term
70.2
2LO - 2RF, fRF = 872.5MHz, PRF = -10dBm
84
3LO - 3RF, fRF = 903.333MHz, PRF = -10dBm
99
3RF - 2LO, fRF = 705MHz, PRF = -10dBm
105
4RF - 3LO, fRF = 770MHz, PRF = -10dBm
114
5RF - 4LO, fRF = 809MHz, PRF = -10dBm
115
PRF = 0dBm to 21dBm
0.17
dBc
dB
I/Q Gain Mismatch
0.05
dB
I/Q Phase Mismatch
0.4
Degrees
1dB Conversion Loss Flatness
400
MHz
RF Return Loss
fLO = 965MHz, fLO > fRF
17
dB
LO Return Loss
12
dB
Recommended functional range. Not production tested. Operation outside this range is possible, but with degraded
performance of some parameters.
Note 6: Guaranteed by design and characterization.
Note 7: Parameter also applies to demodulator topology.
Note 8: Single-carrier WCDMA with 10.5dB peak-to-average ratio at 0.1% complementary cumulative distribution function,
PRF = -10dBm (PRF is chosen to give -65dBc ACLR).
Note 9: No baseband drive input. Measured with the inputs terminated in 50Ω. At low output levels, the output noise is thermal.
Note 10: The output noise versus POUT curve has the slope of LO noise (Ln dBc/Hz) due to reciprocal mixing.
Note 11: Conversion loss is measured from the single-ended RF input to single-ended combined baseband output.
Note 12: The LO noise (L = 10(Ln/10)), determined from the modulator measurements can be used to deduce the noise figure
under-blocking at operating temperature (Tp in Kelvin), FBLOCK = 1 + (Lcn - 1) Tp / To + LPBLOCK / (1000kTo), where
To = 290K, PBLOCK in mW, k is Boltzmann’s constant = 1.381 x 10(-23) J/K, and Lcn = 10(Lc/10), Lc is the conversion loss.
Noise figure under-blocking in dB is NFBLOCK = 10 x log (FBLOCK). Refer to Application Note 3632: Wideband LO Noise in
Passive Transmit-Receive Mixer ICs.
Note 5:
Maxim Integrated
5
MAX2021
High-Dynamic-Range, Direct Up-/Downconversion
650MHz to 1200MHz Quadrature Mod/Demod
Typical Operating Characteristics
(MAX2021 Typical Application Circuit, VCC = 4.75V to 5.25V, GND = 0V, I/Q differential inputs driven from a 100Ω DC-coupled source,
0V common-mode input, PLO = 0dBm, 750MHz ≤ fLO ≤ 1200MHz, 50Ω LO and RF system impedance, R1 = 432Ω, R2 = 619Ω, R3 =
332Ω, TC = -40°C to +85°C. Typical values are at VCC = 5V, VBBI = 1.4VP-P differential, VBBQ = 1.4VP-P differential, fIQ = 1MHz,
fLO = 900MHz, TC = +25°C, unless otherwise noted.)
MODULATOR
-62
-64
VCC = 5.0V
240
VCC = 4.75V
220
-15
10
35
60
-72
-70
-72
-74
-74
-76
-76
-78
SINGLE-CARRIER WCDMA
-47
-37
ALTERNATE CHANNEL
-80
-27
-17
-7
TWO-CARRIER WCDMA
-47
-37
-27
-7
-17
OUTPUT POWER PER CARRIER (dBm)
ACLR vs. OUTPUT POWER PER CARRIER
SIDEBAND SUPPRESSION
vs. LO FREQUENCY
SIDEBAND SUPPRESSION
vs. LO FREQUENCY
-68
ALTERNATE CHANNEL
-72
-74
-76
50
40
30
PLO = 0dBm
-7
750
825
975
1050
1125
750
1200
825
PLO = 0dBm, VCC = 5.0V
40
TC = +25°C
1050
1125
30
TC = -40°C
TC = +25°C
1200
VCC = 5.25V
25
TC = +25°C
OUTPUT IP3 (dBm)
OUTPUT IP3 (dBm)
50
975
OUTPUT IP3 vs. LO FREQUENCY
OUTPUT IP3 vs. LO FREQUENCY
25
900
LO FREQUENCY (MHz)
30
MAX2021 toc07
TC = +85°C
20
TC = +85°C
20
VCC = 5.0V
VCC = 4.75V
15
15
20
VCC = 4.75V, 5.0V, 5.25V
30
LO FREQUENCY (MHz)
SIDEBAND SUPPRESSION
vs. LO FREQUENCY
70
900
MAX2021 toc08
-17
OUTPUT POWER PER CARRIER (dBm)
30
40
10
10
-27
60
50
PLO = +3dBm
FOUR-CARRIER WCDMA
-37
60
20
20
-47
MAX2021 toc06
PLO = -6dBm
PLO = -3dBm
MAX2021 toc09
-70
60
70
SIDEBAND SUPPRESSION (dBc)
-66
SIDEBAND SUPPRESSION (dBc)
MAX2021 toc04
ADJACENT CHANNEL
-64
70
MAX2021 toc05
OUTPUT POWER PER CARRIER (dBm)
-62
-80
ALTERNATE CHANNEL
-68
TEMPERATURE (°C)
-60
-78
ADJACENT CHANNEL
-70
85
ADJACENT CHANNEL
-66
-68
-80
-40
ACLR (dB)
-64
ACLR (dB)
ACLR (dB)
260
-78
SIDEBAND SUPPRESSION (dBc)
-62
-66
200
TC = -40°C
10
10
10
750
825
900
975
1050
LO FREQUENCY (MHz)
6
ACLR vs. OUTPUT POWER PER CARRIER
-60
MAX2021 toc02
VCC = 5.25V
280
-60
MAX2021 toc01
TOTAL SUPPLY CURRENT (mA)
300
ACLR vs. OUTPUT POWER PER CARRIER
MAX2021 toc03
TOTAL SUPPLY CURRENT
vs. TEMPERATURE (TC)
1125
1200
750
825
900
975
1050
LO FREQUENCY (MHz)
1125
1200
750
825
900
975
1050
1125
1200
LO FREQUENCY (MHz)
Maxim Integrated
MAX2021
High-Dynamic-Range, Direct Up-/Downconversion
650MHz to 1200MHz Quadrature Mod/Demod
Typical Operating Characteristics (continued)
(MAX2021 Typical Application Circuit, VCC = 4.75V to 5.25V, GND = 0V, I/Q differential inputs driven from a 100Ω DC-coupled source,
0V common-mode input, PLO = 0dBm, 750MHz ≤ fLO ≤ 1200MHz, 50Ω LO and RF system impedance, R1 = 432Ω, R2 = 619Ω, R3 =
332Ω, TC = -40°C to +85°C. Typical values are at VCC = 5V, VBBI = 1.4VP-P differential, VBBQ = 1.4VP-P differential, fIQ = 1MHz,
fLO = 900MHz, TC = +25°C, unless otherwise noted.)
MODULATOR
PLO = 0dBm
PLO = -6dBm
24
23
22
900
975
1050
1125
-3.50
1200
OUTPUT IP2 vs. LO FREQUENCY
0
1.75
TC = -40°C
VCC = 5.25V
50
VCC = 5.0V
975
1050
1125
1200
40
750
825
900
975
1050
1125
750
1200
825
900
975
1050
1125
LO FREQUENCY (MHz)
LO FREQUENCY (MHz)
LO FREQUENCY (MHz)
OUTPUT IP2
vs. COMMON-MODE VOLTAGE
OUTPUT IP2
vs. COMMON-MODE VOLTAGE
MODULATOR OUTPUT POWER
vs. INPUT POWER
75
fLO = 1000MHz
65
60
55
60
-1.75
0
1.75
COMMON-MODE VOLTAGE (V)
Maxim Integrated
3.50
15
10
5
VCC = 4.75V, 5.0V, 5.25V
0
-5
50
55
INPUT SPLIT BETWEEN I AND Q,
fIF = 25MHz, fLO = 900MHz
OUTPUT POWER (dBm)
OUTPUT IP2 (dBm)
65
70
20
1200
MAX2021 toc18
fLO = 900MHz
MAX2021 toc17
70
MAX2021 toc16
80
-3.50
PLO = 0dBm
PLO = -3dBm
40
900
PLO = -6dBm
60
VCC = 4.75V
40
825
PLO = +3dBm
50
50
TC = +85°C
3.50
1.75
OUTPUT IP2 vs. LO FREQUENCY
70
60
0
80
OUTPUT IP2 (dBm)
TC = +25°C
60
-1.75
COMMON-MODE VOLTAGE (V)
70
OUTPUT IP2 (dBm)
70
OUTPUT IP2 (dBm)
-3.50
3.50
OUTPUT IP2 vs. LO FREQUENCY
80
MAX2021 toc13
80
750
22
COMMON-MODE VOLTAGE (V)
LO FREQUENCY (MHz)
OUTPUT IP2 (dBm)
-1.75
MAX2021 toc14
825
23
20
20
750
24
21
21
10
MAX2021 toc12
fLO = 1000MHz
25
MAX2021 toc15
20
15
25
OUTPUT IP3 (dBm)
OUTPUT IP3 (dBm)
PLO = +3dBm
fLO = 900MHz, PLO = 0dBm
OUTPUT IP3 (dBm)
PLO = -3dBm
26
MAX2021 toc11
TC = +25°C
25
26
MAX2021 toc10
30
OUTPUT IP3
vs. COMMON-MODE VOLTAGE
OUTPUT IP3
vs. COMMON-MODE VOLTAGE
OUTPUT IP3 vs. LO FREQUENCY
-3.50
-1.75
0
1.75
COMMON-MODE VOLTAGE (V)
3.50
10
13
16
19
22
25
28
INPUT POWER (dBm)
7
MAX2021
High-Dynamic-Range, Direct Up-/Downconversion
650MHz to 1200MHz Quadrature Mod/Demod
Typical Operating Characteristics (continued)
(MAX2021 Typical Application Circuit, VCC = 4.75V to 5.25V, GND = 0V, I/Q differential inputs driven from a 100Ω DC-coupled source,
0V common-mode input, PLO = 0dBm, 750MHz ≤ fLO ≤ 1200MHz, 50Ω LO and RF system impedance, R1 = 432Ω, R2 = 619Ω, R3 =
332Ω, TC = -40°C to +85°C. Typical values are at VCC = 5V, VBBI = 1.4VP-P differential, VBBQ = 1.4VP-P differential, fIQ = 1MHz,
fLO = 900MHz, TC = +25°C, unless otherwise noted.)
MODULATOR
MODULATOR OUTPUT POWER
vs. LO FREQUENCY
5
PLO = -6dBm, -3dBm, 0dBm, +3dBm
0
1
-1
TC = +85°C
19
22
25
750
28
825
LO LEAKAGE vs. LO FREQUENCY
MAX2021 toc22
-40
900
975
1050
1125
1200
-60
TC = +85°C
-80
TC = +25°C
915
926
937
948
926
PLO = -6dBm
PLO = -3dBm
-60
-70
-80
PLO = +3dBm
959
970
-150
TC = +25°C, fLO = 900MHz
-155
PLO = -6dBm
-160
PLO = -3dBm
-165
-170
PLO = 0dBm
PLO = +3dBm
PLO = 0dBm
915
970
948
-175
-100
959
937
OUTPUT NOISE vs. OUTPUT POWER
-90
-90
-100
915
LO FREQUENCY (MHz)
PRF = -1dBm, LO LEAKAGE NULLED AT PLO = 0dBm
-50
LO LEAKAGE (dBm)
LO LEAKAGE (dBm)
TC = -40°C
-70
PRF = -1dBm
LO LEAKAGE vs. LO FREQUENCY
PRF = -1dBm, LO LEAKAGE NULLED AT TC = +25°C
-50
-80
LO FREQUENCY (MHz)
OUTPUT NOISE (dBm/Hz)
16
PRF = -7dBm
-70
-100
MAX2021 toc23
13
-60
-90
INPUT POWER (dBm)
-40
TC = +25°C
-5
10
MAX2021 toc21
TC = -40°C
-3
-5
LO LEAKAGE NULLED AT PRF = -1dBm
PRF = -40dBm
PRF = +5dBm
-50
MAX2021 toc24
10
VBBI = VBBQ = 1.4VP-P
DIFFERENTIAL
3
OUTPUT POWER (dBm)
15
LO LEAKAGE vs. LO FREQUENCY
-40
LO LEAKAGE (dBm)
INPUT SPLIT BETWEEN I AND Q,
fIF = 25MHz, fLO = 900MHz
OUTPUT POWER (dBm)
5
MAX2021 toc19
20
MAX2021 toc20
MODULATOR OUTPUT POWER
vs. INPUT POWER
926
937
-180
948
959
970
-15
-10
-5
0
5
10
15
OUTPUT POWER (dBm)
LO FREQUENCY (MHz)
LO FREQUENCY (MHz)
MAX2021 toc25
OUTPUT NOISE vs. OUTPUT POWER
-150
PLO = 0dBm, fLO = 900MHz
OUTPUT NOISE (dBm/Hz)
-155
-160
-165
TC = +85°C
-170
TC = -40°C
-175
TC = +25°C
-180
-15
-10
-5
0
5
10
15
OUTPUT POWER (dBm)
8
Maxim Integrated
MAX2021
High-Dynamic-Range, Direct Up-/Downconversion
650MHz to 1200MHz Quadrature Mod/Demod
Typical Operating Characteristics
(MAX2021 Typical Application Circuit, VCC = 4.75V to 5.25V, GND = 0V, I/Q outputs are recombined using network shown in Figure 5.
Losses of combining network not included in measurements. PRF = 5dBm, PLO = 0dBm, 750MHz ≤ fLO ≤ 1200MHz, 50Ω LO and RF system impedance, R1 = 432Ω, R2 = 619Ω, R3 = 332Ω, TC = -40°C to +85°C. Typical values are at VCC = 5V, fLO = 900MHz, TC = +25°C,
unless otherwise noted.)
DEMODULATOR (VARIABLE LO)
TC = +25°C
TC = +85°C
10
9
8
TC = -40°C
36
34
VCC = 5.0V
32
825
900
975
1050
1125
1200
TC = +25°C
38
TC = -40°C
36
34
32
TC = +85°C
30
750
825
900
975
1050
1125
750
1200
825
900
975
1050
1125
1200
DEMODULATOR INPUT IP2
vs. LO FREQUENCY
DEMODULATOR PHASE IMBALANCE
vs. LO FREQUENCY
DEMODULATOR AMPLITUDE IMBALANCE
vs. LO FREQUENCY
70
TC = +85°C
60
TC = -40°C
50
PLO = -3dBm
6
4
PLO = 0dBm
2
0
-2
PLO = -6dBm
-4
-6
-8
-10
900
975
1050
1125
1200
825
900
975
1050
1125
LO FREQUENCY (MHz)
LO FREQUENCY (MHz)
LO PORT RETURN LOSS
vs. LO FREQUENCY
RF PORT RETURN LOSS
vs. LO FREQUENCY
+5
PLO = 0dBm
+10
+15
PLO = -6dBm, -3dBm
+20
+5
+10
+15
+20
+25
PLO = -6dBm, -3dBm, 0dBm, +3dBm
+30
+35
900
975
1050
LO FREQUENCY (MHz)
Maxim Integrated
1125
1200
0
PLO = -6dBm, -3dBm, 0dBm, +3dBm
-0.05
-0.10
-0.15
750
825
900
975 1050 1125
LO FREQUENCY (MHz)
1200
-4
PLO = 0dBm
-5
fLO = 900MHz
-6
-7
-8
-9
fLO = 1000MHz
-10
-11
-12
+45
825
0.05
IF FLATNESS
vs. BASEBAND FREQUENCY
+40
+25
0.10
1200
MAX2021 toc33
PLO = +3dBm
0
RF PORT RETURN LOSS (dB)
MAX2021 toc32
0
0.15
-0.20
750
IF OUTPUT POWER (dBm)
825
0.20
MAX2021 toc31
PLO = +3dBm
8
MAX2021 toc34
TC = +25°C
DEMODULATOR PHASE IMBALANCE (deg)
MAX2021 toc29
80
10
DEMODULATOR AMPLITUDE IMBALANCE (dB)
LO FREQUENCY (MHz)
MAX2021 toc30
LO FREQUENCY (MHz)
PLO = 0dBm, VCC = 5.0V
750
PLO = 0dBm, VCC = 5.0V
LO FREQUENCY (MHz)
90
750
MAX2021 toc28
VCC = 5.25V
30
750
DEMODULATOR INPUT IP2 (dBm)
38
40
VCC = 4.75V
7
LO PORT RETURN LOSS (dB)
PLO = 0dBm, TC = +25°C
DEMODULATOR INPUT IP3 (dBm)
11
40
MAX2021 toc27
PLO = 0dBm, VCC = 5.0V
DEMODULATOR INPUT IP3 (dBm)
DEMODULATOR CONVERSION LOSS (dB)
12
DEMODULATOR INPUT IP3
vs. LO FREQUENCY
DEMODULATOR INPUT IP3
vs. LO FREQUENCY
MAX2021 toc26
DEMODULATOR CONVERSION LOSS
vs. LO FREQUENCY
750
845
940
1035
LO FREQUENCY (MHz)
1130
1225
0
10
20
30
40
50
60
70
80
BASEBAND FREQUENCY (MHz)
9
MAX2021
High-Dynamic-Range, Direct Up-/Downconversion
650MHz to 1200MHz Quadrature Mod/Demod
Typical Operating Characteristics
(MAX2021 Typical Application Circuit, VCC = 5.0V, GND = 0V, I/Q outputs are recombined using network shown in Figure 5. Losses of
combining network not included in measurements. PRF = 0dBm, PLO = 0dBm, fLO = 965MHz, fIF = fLO - fRF, 50Ω LO and RF system
impedance, R1 = 432Ω, R2 = 619Ω, R3 = 332Ω, TA = +25°C, unless otherwise noted.)
DEMODULATOR (FIXED LO)
9
fLO = 965MHz
0.05
0
-0.05
8
1.0
0.5
0
-0.5
7
-1.0
-0.10
695
740
785
830
875
90
135
RF FREQUENCY (MHz)
180
225
180
36
1MHz TONE DELTA
35
34
270
315
INPUT IP2 vs. RF FREQUENCY
MAX2021 toc38
PRF = 0dBm/TONE
fLO = 965MHz
225
IF FREQUENCY (MHz)
90
85
INPUT IP2 (dBm)
INPUT IP3 (dBm)
37
135
IF FREQUENCY (MHz)
INPUT IP3 vs. RF FREQUENCY
38
90
315
270
45MHz TONE DELTA
PRF = 0dBm/TONE
fLO = 965MHz
80
1MHz TONE DELTA
75
70
45MHz TONE DELTA
65
33
MAX2021 toc39
650
60
32
650
725
800
875
RF FREQUENCY (MHz)
10
fLO = 965MHz
1.5
PHASE MISMATCH (DEG)
10
2.0
MAX2021 toc36
MAX2021 toc35
11
GAIN MISMATCH (dB)
CONVERSION LOSS (dB)
fLO = 965MHz
I/Q PHASE MISMATCH vs. IF FREQUENCY
I/Q GAIN MISMATCH vs. IF FREQUENCY
0.10
MAX2021 toc37
CONVERSION LOSS vs. RF FREQUENCY
12
950
650
725
800
875
950
RF FREQUENCY (MHz)
Maxim Integrated
MAX2021
High-Dynamic-Range, Direct Up-/Downconversion
650MHz to 1200MHz Quadrature Mod/Demod
Pin Description
PIN
NAME
1, 5, 9–12, 14, 16–19, 22,
24, 27–30, 32, 34–36
GND
2
3
4
6
7
8
FUNCTION
Ground
RBIASLO3 3rd LO Amplifier Bias. Connect a 332 resistor to ground.
VCCLOA
LO
LO Input Buffer Amplifier Supply Voltage. Bypass to GND with 33pF and 0.1µF
capacitors as close as possible to the pin.
Local Oscillator Input. 50 input impedance. Requires a DC-blocking capacitor.
RBIASLO1 1st LO Input Buffer Amplifier Bias. Connect a 432 resistor to ground.
N.C.
No Connection. Leave unconnected.
RBIASLO2 2nd LO Amplifier Bias. Connect a 619 resistor to ground.
13
VCCLOI1
I-Channel 1st LO Amplifier Supply Voltage. Bypass to GND with 33pF and 0.1µF
capacitors as close as possible to the pin.
15
VCCLOI2
I-Channel 2nd LO Amplifier Supply Voltage. Bypass to GND with 33pF and 0.1µF
capacitors as close as possible to the pin.
20
BBI+
Baseband In-Phase Noninverting Port
21
BBI-
Baseband In-Phase Inverting Port
23
RF
25
BBQ-
Baseband Quadrature Inverting Port
RF Port. This port is matched to 50. Requires a DC-blocking capacitor.
26
BBQ+
Baseband Quadrature Noninverting Port
31
VCCLOQ2
Q-Channel 2nd LO Amplifier Supply Voltage. Bypass to GND with 33pF and 0.1µF
capacitors as close as possible to the pin.
33
VCCLOQ1
Q-Channel 1st LO Amplifier Supply Voltage. Bypass to GND with 33pF and 0.1µF
capacitors as close as possible to the pin.
EP
GND
Exposed Ground Pad. The exposed pad MUST be soldered to the ground plane using
multiple vias.
Detailed Description
The MAX2021 is designed for upconverting differential
in-phase (I) and quadrature (Q) inputs from baseband
to a 650MHz to 1200MHz RF frequency range. The
device can also be used as a demodulator, downconverting an RF input signal directly to baseband.
Applications include RFID handheld and portal readers,
as well as single and multicarrier GSM/EDGE,
cdma2000, WCDMA, and iDEN base stations. Direct
conversion architectures are advantageous since they
significantly reduce transmitter or receiver cost, part
count, and power consumption as compared to traditional IF-based double conversion systems.
The MAX2021 integrates internal baluns, an LO buffer, a
phase splitter, two LO driver amplifiers, two matched
double-balanced passive mixers, and a wideband
quadrature combiner. The MAX2021’s high-linearity mixers, in conjunction with the part’s precise in-phase and
quadrature channel matching, enable the device to possess excellent dynamic range, ACLR, 1dB compression
Maxim Integrated
point, and LO and sideband suppression characteristics. These features make the MAX2021 ideal for fourcarrier WCDMA operation.
LO Input Balun, LO Buffer, and
Phase Splitter
The MAX2021 requires a single-ended LO input, with a
nominal power of 0dBm. An internal low-loss balun at
the LO input converts the single-ended LO signal to a
differential signal at the LO buffer input. In addition, the
internal balun matches the buffer’s input impedance to
50Ω over the entire band of operation.
The output of the LO buffer goes through a phase splitter, which generates a second LO signal that is shifted
by 90° with respect to the original. The 0° and 90° LO
signals drive the I and Q mixers, respectively.
LO Driver
Following the phase splitter, the 0° and 90° LO signals
are each amplified by a two-stage amplifier to drive the
I and Q mixers. The amplifier boosts the level of the LO
11
MAX2021
High-Dynamic-Range, Direct Up-/Downconversion
650MHz to 1200MHz Quadrature Mod/Demod
signals to compensate for any changes in LO drive levels. The two-stage LO amplifier allows a wide input
power range for the LO drive. The MAX2021 can tolerate LO level swings from -6dBm to +3dBm.
I/Q Modulator
The MAX2021 modulator is composed of a pair of
matched double-balanced passive mixers and a balun.
The I and Q differential baseband inputs accept signals
from DC to 550MHz with differential amplitudes up to
4VP-P. The wide input bandwidths allow operation of the
MAX2021 as either a direct RF modulator or as an
image-reject mixer. The wide common-mode compliance range allows for direct interface with the baseband DACs. No active buffer circuitry is required
between the baseband DACs and the MAX2021 for
cdma2000 and WCDMA applications.
The I and Q signals directly modulate the 0° and 90° LO
signals and are upconverted to the RF frequency. The outputs of the I and Q mixers are combined through a balun
to produce a singled-ended RF output.
Applications Information
LO Input Drive
The LO input of the MAX2021 is internally matched to
50Ω, and requires a single-ended drive at a 750MHz to
1200MHz frequency range. An integrated balun converts the singled-ended input signal to a differential signal at the LO buffer differential input. An external
DC-blocking capacitor is the only external part required
at this interface. The LO input power should be within
the -6dBm to +3dBm range. An LO input power of
-3dBm is recommended for best overall peformance.
Modulator Baseband I/Q Input Drive
Drive the MAX2021 I and Q baseband inputs differentially for best performance. The baseband inputs have
a 53Ω differential input impedance. The optimum
source impedance for the I and Q inputs is 100Ω differential. This source impedance achieves the optimal signal transfer to the I and Q inputs, and the optimum
output RF impedance match. The MAX2021 can accept
input power levels of up to +20dBm on the I and Q
inputs. Operation with complex waveforms, such as
CDMA carriers or GSM signals, utilize input power levels that are far lower. This lower power operation is
made necessary by the high peak-to-average ratios of
these complex waveforms. The peak signals must be
kept below the compression level of the MAX2021.
The four baseband ports need some form of DC return
to establish a common mode that the on-chip circuitry
drives. This can be achieved by directly DC-coupling to
the baseband ports (staying within the ±3.5V common12
mode range), through an inductor to ground, or through
a low-value resistor to ground.
The MAX2021 is designed to interface directly with
Maxim high-speed DACs. This generates an ideal total
transmitter lineup, with minimal ancillary circuit elements.
Such DACs include the MAX5875 series of dual DACs,
and the MAX5895 dual interpolating DAC. These DACs
have ground-referenced differential current outputs.
Typical termination of each DAC output into a 50Ω load
resistor to ground, and a 10mA nominal DC output current results in a 0.5V common-mode DC level into the
modulator I/Q inputs. The nominal signal level provided
by the DACs will be in the -12dBm range for a single
CDMA or WCDMA carrier, reducing to -18dBm per carrier for a four-carrier application.
The I/Q input bandwidth is greater than 50MHz at
-0.1dB response. The direct connection of the DAC to
the MAX2021 ensures the maximum signal fidelity, with
no performance-limiting baseband amplifiers required.
The DAC output can be passed through a lowpass filter
to remove the image frequencies from the DAC’s output
response. The MAX5895 dual interpolating DAC can be
operated at interpolation rates up to x8. This has the
benefit of moving the DAC image frequencies to a very
high, remote frequency, easing the design of the baseband filters. The DAC’s output noise floor and interpolation filter stopband attenuation are sufficiently good to
ensure that the 3GPP noise floor requirement is met for
large frequency offsets, 60MHz for example, with no filtering required on the RF output of the modulator.
Figure 1 illustrates the ease and efficiency of interfacing
the MAX2021 with a Maxim DAC (in this case the
MAX5895 dual 16-bit interpolating-modulating DAC)
and with Maxim VGA and VCO/Synth ICs.
The MAX5895 DAC has programmable gain and differential offset controls built in. These can be used to optimize the LO leakage and sideband suppression of the
MAX2021 quadrature modulator.
RF Output
The MAX2021 utilizes an internal passive mixer architecture that enables the device to possess an exceptionally low-output noise floor. With such architectures,
the total output noise is typically a power summation of
the theoretical thermal noise (KTB) and the noise contribution from the on-chip LO buffer circuitry. As demonstrated in the Typical Operating Characteristics, the
MAX2021’s output noise approaches the thermal limit of
-174dBm/Hz for lower output power levels. As the output power increases, the noise level tracks the noise
contribution from the LO buffer circuitry, which is
approximately -168dBc/Hz.
Maxim Integrated
MAX2021
High-Dynamic-Range, Direct Up-/Downconversion
650MHz to 1200MHz Quadrature Mod/Demod
50I
I
12
DAC
50I
MAX2021
31dB
MAX5873
DUAL DAC
0
90
17dB
31dB
RFOUT
C
50I
MAX2058
RF DIGITAL VGA
Q
12
DAC
SPI
LOGIC
50I
MAX9491
VCO + SYNTH
45, 80,
OR
95MHz
LO
LOOPBACK
OUT
(FEEDS BACK
INTO Rx CHAIN
FRONT END)
Rx OFF
SPI
CONTROL
Figure 1. Transmitter Lineup
The I/Q input power levels and the insertion loss of the
device determine the RF output power level. The input
power is a function of the delivered input I and Q voltages to the internal 50Ω termination. For simple sinusoidal baseband signals, a level of 89mVP-P differential
on the I and the Q inputs results in a -17dBm input
power level delivered to the I and Q internal 50Ω terminations. This results in an RF output power of -23.2dBm.
C = 6.8pF
100Ω
I
MAX2021
RF-MODULATOR
L = 40nH
100Ω
C = 6.8pF
LO
External Diplexer
0°
90°
∑
RF
100Ω
Q
L = 40nH
100Ω
C = 6.8pF
Figure 2. Diplexer Network Recommended for GSM 900
Transmitter Applications
Maxim Integrated
LO leakage at the RF port can be nulled to a level less
than -80dBm by introducing DC offsets at the I and Q
ports. However, this null at the RF port can be compromised by an improperly terminated I/Q IF interface. Care
must be taken to match the I/Q ports to the driving DAC
circuitry. Without matching, the LO’s second-order (2fLO)
term may leak back into the modulator’s I/Q input port
where it can mix with the internal LO signal to produce
additional LO leakage at the RF output. This leakage
effectively counteracts against the LO nulling. In addition, the LO signal reflected at the I/Q IF port produces a
residual DC term that can disturb the nulling condition.
As demonstrated in Figure 2, providing an RC termination on each of the I+, I-, Q+, Q- ports reduces the
amount of LO leakage present at the RF port under
13
MAX2021
High-Dynamic-Range, Direct Up-/Downconversion
650MHz to 1200MHz Quadrature Mod/Demod
varying temperature, LO frequency, and baseband
drive conditions. See the Typical Operating
Characteristics for details. Note that the resistor value is
chosen to be 100Ω with a corner frequency 1 / (2πRC)
selected to adequately filter the fLO and 2fLO leakage,
yet not affecting the flatness of the baseband response
at the highest baseband frequency. The commonmode fLO and 2fLO signals at I+/I- and Q+/Q- effectively see the RC networks and thus become terminated in
50Ω (R/2). The RC network provides a path for absorbing the 2fLO and fLO leakage, while the inductor provides high impedance at f LO and 2f LO to help the
diplexing process.
(staying within the ±3.5V common-mode range),
through an inductor to ground, or through a low-value
resistor to ground. Figure 4 shows a typical network that
would be used to connect to each baseband port for
demodulator operation. This network provides a common-mode DC return, implements a high-frequency
diplexer to terminate unwanted RF terms, and also provides an impedance transformation to a possible higher
impedance baseband amplifier.
The network Ca, Ra, La and Cb form a highpass/lowpass network to terminate the high frequencies into a
load while passing the desired lower IF frequencies.
Elements La, Cb, Lb, Cc, Lc, and Cd provide a possible
impedance transformer. Depending on the impedance
being transformed and the desired bandwidth, a fewer
number of elements could be used. It is suggested that
La and Cb always be used since they are part of the
high frequency diplexer. If power matching is not a
concern then this would reduce the elements to just the
diplexer.
RF Demodulator
The MAX2021 can also be used as an RF demodulator
(see Figure 3), downconverting an RF input signal
directly to baseband. The single-ended RF input
accepts signals from 650MHz to 1200MHz with power
levels up to +30dBm. The passive mixer architecture
produces a conversion loss of typically 9.2dB. The
downconverter is optimized for high linearity and
excellent noise performance, typically with a
+35.2dBm IIP3, a P1dB of greater than +30dBm, and a
9.3dB noise figure.
A wide I/Q port bandwidth allows the port to be used as
an image-reject mixer for downconversion to a quadrature IF frequency.
The RF and LO inputs are internally matched to 50Ω.
Thus, no matching components are required, and only
DC-blocking capacitors are needed for interfacing.
Resistor Rb provides a DC return to set the common
mode voltage. In this case, due to the on-chip circuitry,
the voltage would be approx 0V DC. It can also be
used to reduce the load impedance of the next stage.
Inductor Ld can provide a bit of high frequency gain
peaking for wideband IF systems. Capacitor Ce is a DC
block.
Typical values for Ca, Ra, La, and Cb would be 1.5pF,
50Ω, 11nH, and 4.7pF, respectively. These values can
change depending on the LO, RF, and IF frequencies
used. Resistor Rb is in the 50Ω to 200Ω range
Demodulator Output Port Considerations
The circuitry presented in Figure 4 does not allow for LO
leakage at RF port nulling. Depending on the LO at RF
leakage requirement, a trim voltage might need to be
introduced on the baseband ports to null the LO leakage.
Much like in the modulator case, the four baseband
ports require some form of DC return to establish a common mode that the on-chip circuitry drives. This can be
achieved by directly DC-coupling to the baseband ports
MAX2021
RF
DIPLEXER/
DC RETURN
90
0
MATCHING
ADC
MATCHING
ADC
LO
DIPLEXER/
DC RETURN
Figure 3. MAX2021 Demodulator Configuration
14
Maxim Integrated
MAX2021
High-Dynamic-Range, Direct Up-/Downconversion
650MHz to 1200MHz Quadrature Mod/Demod
Ld
Ra
Ca
MAX2021
I/Q OUTPUTS
Rb
La
Lb
Cb
Ce
Lc
Cc
Cd
EXTERNAL
STAGE
Figure 4. Baseband Port Typical Filtering and DC Return Network
I+
3dB PAD
DC BLOCK
0°
MINI-CIRCUITS
ZFSCJ-2-1
I-
3dB PAD
DC BLOCK
180°
3dB PADS LOOK LIKE 160I TO GROUND
AND PROVIDES THE COMMON-MODE
DC RETURN FOR THE ON-CHIP CIRCUITRY.
Q+
3dB PAD
DC BLOCK
0°
MINI-CIRCUITS
ZFSCJ-2-1
Q-
3dB PAD
DC BLOCK
MINI-CIRCUITS
ZFSC-2-1W-S+
0° COMBINER
90°
180°
Figure 5. Demodulator Combining Diagram
Power Scaling with Changes
to the Bias Resistors
Bias currents for the LO buffers are optimized by fine
tuning resistors R1, R2, and R3. Maxim recommends
using ±1%-tolerance resistors; however, standard ±5%
values can be used if the ±1% components are not
readily available. The resistor values shown in the
Typical Application Circuit were chosen to provide
peak performance for the entire 650MHz to 1200MHz
band. If desired, the current can be backed off from
this nominal value by choosing different values for R1,
R2, and R3. Tables 1 and 2 outline the performance
trade-offs that can be expected for various combinations of these bias resistors. As noted within the tables,
the performance trade-offs may be more pronounced
for different operating frequencies. Contact the factory
for additional details.
Maxim Integrated
Layout Considerations
A properly designed PCB is an essential part of any
RF/microwave circuit. Keep RF signal lines as short as
possible to reduce losses, radiation, and inductance.
For the best performance, route the ground pin traces
directly to the exposed pad under the package. The
PCB exposed pad MUST be connected to the ground
plane of the PCB. It is suggested that multiple vias be
used to connect this pad to the lower-level ground
planes. This method provides a good RF/thermal conduction path for the device. Solder the exposed pad on
the bottom of the device package to the PCB. The
MAX2021 evaluation kit can be used as a reference for
board layout. Gerber files are available upon request at
www.maximintegrated.com.
15
MAX2021
High-Dynamic-Range, Direct Up-/Downconversion
650MHz to 1200MHz Quadrature Mod/Demod
Table 1. Typical Performance Trade-Offs as a Function of Current Draw—Modulator Mode
LO FREQ
(MHz)
800
900
1000
RF FREQ
(MHz)
801.8
901.8
1001.8
R1
Ω)
(Ω
R2
Ω)
(Ω
R3
Ω)
(Ω
ICC
(mA)
OIP3
(dBm)
LO LEAK
(dBm)
IMAGE REJ
(dBc)
OIP2
(dBm)
420
620
330
271
19.6
-32.1
23.9
50.5
453
665
360
253
21.9
-32.7
34.0
51.0
499
698
402
229
18.9
-33.7
30.0
52.6
549
806
464
205
15.7
-34.4
23.7
46.0
650
1000
550
173
13.6
-34.2
23.3
32.3
420
620
330
271
20.7
-31.4
43.4
54.0
453
665
360
253
21.6
-31.6
42.4
55.4
499
698
402
229
20.6
-31.8
42.7
59.8
549
806
464
205
19.0
-31.9
40.3
50.7
650
1000
550
173
14.9
-30.5
25.0
34.6
420
620
330
271
22.4
-32.8
39.3
55.5
453
665
360
253
22.2
-33.2
39.1
56.3
499
698
402
229
19.9
-33.8
43.5
55.0
549
806
464
205
17.6
-34.8
40.5
51.4
650
1000
550
173
14.6
-33.9
36.8
32.8
Note: VCC = 5V, PLO = 0dBm, TA = +25°C, I/Q voltage levels = 1.4VP-P differential.
Power-Supply Bypassing
Exposed Pad RF/Thermal Considerations
Proper voltage-supply bypassing is essential for highfrequency circuit stability. Bypass all VCC_ pins with
33pF and 0.1µF capacitors placed as close to the pins
as possible. The smallest capacitor should be placed
closest to the device.
To achieve optimum performance, use good voltagesupply layout techniques. The MAX2021 has several
RF processing stages that use the various VCC_
pins, and while they have on-chip decoupling, offchip interaction between them may degrade gain, linearity, carrier suppression, and output power-control
range. Excessive coupling between stages may
degrade stability.
The EP of the MAX2021’s 36-pin TQFN-EP package
provides a low thermal-resistance path to the die. It is
important that the PCB on which the IC is mounted be
designed to conduct heat from this contact. In addition,
the EP provides a low-inductance RF ground path for
the device.
The exposed pad (EP) MUST be soldered to a ground
plane on the PCB either directly or through an array of
plated via holes. An array of 9 vias, in a 3 x 3 array, is
suggested. Soldering the pad to ground is critical for
efficient heat transfer. Use a solid ground plane wherever possible.
16
Maxim Integrated
MAX2021
High-Dynamic-Range, Direct Up-/Downconversion
650MHz to 1200MHz Quadrature Mod/Demod
Table 2. Typical Performance Trade-Offs as a Function of Current Draw—Demodulator Mode
LO FREQ
(MHz)
RF FREQ
(MHz)
800
900
1000
771
871
971
R1
Ω)
(Ω
R2
Ω)
(Ω
R3
Ω)
(Ω
ICC
(mA)
CONVERSION
LOSS (dB)
IIP3
(dBm)
57MHz IIP2
(dBm)
420
620
330
269
9.8
33.85
62.1
453
665
360
254
9.83
33.98
62.9
499
698
402
230
9.81
32.2
66.6
549
806
464
207
9.84
31.1
66.86
650
1000
550
173
9.95
29.87
65.25
420
620
330
269
9.21
33.1
68
453
665
360
254
9.25
33.9
66.87
499
698
402
230
9.36
34.77
66.7
549
806
464
207
9.39
35.3
66.6
650
1000
550
173
9.46
32
64.64
420
620
330
269
9.47
34.9
> 77.7
453
665
360
254
9.5
35.4
> 77.5
499
698
402
230
9.53
34.58
> 76.5
549
806
464
207
9.5
33.15
> 76.5
650
1000
550
173
9.61
31.5
76
Note: Used on PCB 180° combiners and off PCB quadrature combiner with VCC = 5V, PRF = -3dBm, PLO = 0dBm, TA = +25°C,
IF1 = 28MHz, IF2 = 29MHz.
Maxim Integrated
17
MAX2021
High-Dynamic-Range, Direct Up-/Downconversion
650MHz to 1200MHz Quadrature Mod/Demod
GND
GND
VCCLOQ1
GND
VCCLOQ2
GND
GND
GND
36
35
34
33
32
31
30
29
28
1
RBIASLO3
2
VCCLOA
3
LO
4
GND
5
RBIASLO1
6
N.C.
7
RBIASLO2
GND
+
GND
Pin Configuration/Functional Diagram
MAX2021
BIAS
LO3
90°
0°
Σ
BIAS
LO1
BIAS
LO2
8
27
GND
26
BBQ+
25
BBQ-
24
GND
23
RF
22
GND
21
BBI-
20
BBI+
19
GND
EP
15
16
17
18
GND
GND
14
GND
GND
13
VCCLOI2
12
GND
11
VCCLOI1
10
GND
9
GND
GND
TQFN
(6mm x 6mm)
Package Information
Chip Information
PROCESS: SiGe BiCMOS
18
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a
“+”, “#”, or “-” in the package code indicates RoHS status only.
Package drawings may show a different suffix character, but the
drawing pertains to the package regardless of RoHS status.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
TQFN
T3666+2
21-0141
90-0049
Maxim Integrated
MAX2021
High-Dynamic-Range, Direct Up-/Downconversion
650MHz to 1200MHz Quadrature Mod/Demod
Typical Application Circuit
+
C1
33pF
VCC
VCCLOA
C3
82pF
LO
LO
GND
RBIASLO1
R1
432Ω
N.C.
RBIASLO2
R2
619Ω
GND
35
VCCLOQ2
GND
34
GND
33
32
GND
GND
30
31
1
GND
28
29
27
MAX2021
BIAS
LO3
2
26
3
25
90°
4
24
0°
5
GND
BBQ+
BBQGND
Q+
QC9
8.2pF
RF
23 RF
Σ
BIAS
LO1
6
22
7
21
BIAS
LO2
8
20
GND
BBIBBI+
II+
EP
9
19
10
GND
VCC
C5
0.1µF
11
GND
12
GND
13
14
GND
C6
33pF
15
VCCLOI2
RBIASLO3
36
VCCLOI1
GND
C2
0.1µF
GND
GND
R3
332Ω
C11
0.1µF
VCC
C10
33pF
C13
33pF
VCCLOQ1
VCC
C12
0.1µF
16
GND
18
17
GND
GND
GND
C7
33pF
C8
0.1µF
VCC
Table 3. Component List Referring to the Typical Application Circuit
COMPONENT
VALUE
C1, C6, C7, C10, C13
33pF
C2, C5, C8, C11, C12
0.1µF
0.1µF ±10%, 16V X7R ceramic capacitors (0603)
C3
82pF
82pF ±5%, 50V C0G ceramic capacitor (0402)
C9
8.2pF
8.2pF ±0.1pF, 50V C0G ceramic capacitor (0402)
R1
432Ω
432Ω ±1% resistor (0402)
R2
619Ω
619Ω ±1% resistor (0402)
R3
332Ω
332Ω ±1% resistor (0402)
Maxim Integrated
DESCRIPTION
33pF ±5%, 50V C0G ceramic capacitors (0402)
19
MAX2021
High-Dynamic-Range, Direct Up-/Downconversion
650MHz to 1200MHz Quadrature Mod/Demod
Revision History
REVISION
NUMBER
REVISION
DATE
0
7/06
Initial release
1
6/12
Updated Features section; updated Ordering Information, Absolute Maximum Ratings,
DC Electrical Characteristics, Pin Description, AC Electrical Characteristics table,
Typical Operating Characteristics globals, Detailed Description section, I/Q Modulator
section, Baseband I/Q Input Drive section, Power Scaling with the Changes to the
Bias Resistors section, Typical Application Circuit, Figures 1–3, and Table 1
2
4/13
Updated Electrical Characteristics table; updated TOCs 35–39; updated title and
Features section
DESCRIPTION
PAGES
CHANGED
—
1–3, 9–11, 14
1, 2, 4, 8, 9,
12, 13
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent
licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and
max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
20 ________________________________Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000
© 2013 Maxim Integrated Products, Inc.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.