Design With PIN Diodes Application Note, document #200312

APPLICATION NOTE
Design With PIN Diodes
Introduction
The PIN diode finds wide usage in RF, UHF, and microwave
circuits. At these types of frequencies, a PIN diode is
fundamentally a device with an impedance controlled by its DC
excitation. A unique feature of the PIN diode is its ability to control
large amounts of RF power with much lower levels of DC.
This Application Note describes the use of PIN diodes in circuit
design.
PIN Diode Fundamentals
The PIN diode is a current-controlled resistor at radio and
microwave frequencies. It is a silicon semiconductor diode in
which a high-resistivity, intrinsic I region is sandwiched between a
P-type and N-type region. When the PIN diode is forward biased,
holes and electrons are injected into the I region. These charges
do not immediately annihilate each other; instead they stay alive
for an average time, called the carrier lifetime, t. This results in an
average stored charge, Q, which lowers the effective resistance of
the I region to a value RS.
When the PIN diode is at zero or reverse bias, there is no stored
charge in the I region and the diode appears as a capacitor, CT,
shunted by a parallel resistance RP.
PIN diodes are described using the following parameters:
RS
series resistance under forward bias
CT
total capacitance at zero or reverse bias
RD
parallel resistance at zero or reverse bias
VR
maximum allowable DC reverse bias voltage
τ
carrier lifetime
ΘAV
average thermal resistance or:
PD maximum average power dissipation
ΘPULSE pulse thermal impedance or:
PP maximum peak power dissipation
By varying the I region width and diode area, it is possible to
construct PIN diodes of different geometries that result in the
same RS and CT characteristics. These devices may have similar
small signal characteristics. However, the thicker I region diode
would have a higher bulk, or RF breakdown voltage, and better
distortion properties. On the other hand, the thinner device would
have faster switching speed.
Figure 1. PIN Diode Cross-Section
There is a common misconception that carrier lifetime, τ, is the
only parameter that determines the lowest frequency of operation
and the distortion produced. This is indeed a factor, but equally
important is the thickness of the I region, W, which relates to the
transit time frequency of the PIN diode.
Low-Frequency Model
At low frequencies (below the transit time frequency of the
I region) and DC, the PIN diode behaves like a silicon PN junction
semiconductor diode. Its I-V characteristic (see Figure 2)
determines the DC voltage at the forward bias current level. PIN
diodes are often rated for the forward voltage, VF, at a fixed DC
bias.
The reverse voltage, VR, rating of a PIN diode is a guarantee from
the manufacturer that no more than a specified amount, generally
10 μA, of reverse current is present when VR is applied. It is not
necessarily the avalanche or bulk breakdown voltage, VB,
determined by the I region width (approximately 10 V/mm). PIN
diodes of the same bulk breakdown voltage may have different
voltage ratings. Generally, the lower the voltage rating, the less
expensive the PIN diode.
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APPLICATION NOTE • DESIGN WITH PIN DIODES
In commercially available diodes, the parasitic resistance of the
diode package and contacts limit the lowest resistance value. The
lowest impedance is affected by the parasitic inductance, L, which
is generally less than 1 nH.
Equation (2) is valid at frequencies higher than the I region
transmit time frequency, according to the following relationship:
f >
1300
W2
(where f is in MHz and W in μm)
(3)
For this equation, it is assumed that the RF signal does not affect
the stored charge.
Zero or Reverse Bias Model
CT =
εA
W
(4)
Where: ε = dielectric constant of silicon
A = area of diode junction
Figure 2. Typical PIN Diode I-V Characteristics
Equation (4) is valid at frequencies above the dielectric relaxation
frequency of the I region, according to the following relationship:
Large Signal Model
When the PIN diode is forward biased, the stored charge, Q, must
be much greater than the incremental stored charge added or
removed by the RF current, IRF. To ensure this, the following
inequality must hold:
Q >>
I RF
2πf
(1)
Forward Bias Model
(
)
Where: Q = IF × τ (in coulombs)
W = I region width
IF = forward bias current
τ = carrier lifetime
μn = electron mobility
μp = hole mobility
1
2πρε
(where ρ is the resistivity of the I region)
At lower frequencies, the PIN diode acts like a varactor. In these
cases, the value RP is proportional to voltage and inversely
proportional to frequency. In most RF applications, its value is
higher than the reactance of the capacitance, CT, and is less
significant.
(2)
In a typical application, the maximum negative voltage swing
should never exceed VB. An instantaneous excursion of the RF
signal into the positive bias direction generally does not cause the
diode to go into conduction because of slow reverse to forward
switching speed.
The DC reverse bias needed to maintain low PIN diode
conductance has been analyzed(1) and is related to the magnitude
of the RF signal and I region width.
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(5)
Under reverse bias, the diode should not be biased beyond its DC
voltage rating, VR. The avalanche or bulk breakdown voltage, VB,
of a PIN diode is proportional to the I region width, W, and is
always higher than VR.
RF Electrical Modeling of the PIN Diode
W2
(Ω )
RS =
µn + µ p × Q
f >
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APPLICATION NOTE • DESIGN WITH PIN DIODES
Switching Speed Model
Thermal Model
The switching speed in any application depends on the driver
circuit as well as the PIN diode. Certain primary PIN properties can
influence switching speed.
The maximum allowable power dissipation, PD, is determined by
the following equation:
A PIN diode has two switching speeds from forward bias to
reverse bias, TFR, and from reverse bias to forward bias, TRF. The
diode characteristic that affects TFR is τ, carrier lifetime. The value
of TFR may be computed from the forward current, IF, and the
initial reverse current, IR, as follows (and illustrated in Figure 3):

I 
TFR = τ log e  1 + F 
IR 

(6)
Where TFR is measured in seconds.
PD =
TJ − TA
θ
(7)
Where: PD = power dissipation in Watts.
TJ = maximum allowable junction temperature (usually
175 °C)
TA = ambient or heat sink temperature.
Power dissipation may be computed as the product of the RF
current squared, multiplied by the diode resistance, RS.
For Continuous Wave (CW) applications, the value of thermal
resistance, Θ, used is the average thermal resistance, ΘAV.
In most pulsed RF and microwave applications where the Duty
Factor (DF) is less than 10 percent and the pulse width, TP, is less
than the thermal time constant of the diode, good approximation
of the effective value of Θ in Equation (7) may be computed as
follows:
Θ = DF × Θ AV + ΘTP
(8)
Where: Θ = thermal resistance in °C/W.
ΘTP = thermal impedance of the diode for the time
interval corresponding to TP.
Figure 4 indicates how junction temperature is affected during a
pulsed RF application.
Figure 3. Diode Current vs Time
The reverse bias to forward bias time, TRF, depends primarily on I
region width, W, as indicated in the following Table of typical data:
I-Width
(μm)
To 10 mA
From:
To 50 mA
From:
To 100 mA
From:
10 V
(μs)
100 V
(μs)
10 V
(μs)
100 V
(μs)
10 V
(μs)
100 V
(μs)
175
7.0
5.0
3.0
2.5
2.0
1.5
100
2.5
2.0
1.0
0.8
0.6
0.6
50
0.5
0.4
0.3
0.2
0.2
0.1
Figure 4. Power Dissipation and Junction Temperature vs Time
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APPLICATION NOTE • DESIGN WITH PIN DIODES
PIN Diode Applications
Switches
PIN diodes are commonly used as switching elements to control
RF signals. In these applications, the PIN diode can be biased to
either a high or low impedance device state, depending on the
level of stored charge in the I region.
A simple untuned Single Pole, Single Throw (SPST) switch may be
designed using either a single series or shunt connected PIN
diode, as shown in Figure 5. The series connected diode switch is
commonly used when minimum insertion loss is required over a
broad frequency range. This design is also easier to physically
realize using printed circuit techniques, since no through holes are
required in the circuit board.
When VC1 is biased to 5 V and VC2 is Biased to 0 V, the PIN diode
is forward biased and appears as a low impedance to the RF
signal.
As current is increased in the forward direction, the value of RS
(series resistance) becomes lower and the overall insertion loss of
the switch is reduced. When the polarities of VC1 and VC2 are
reversed, the PIN diode appears as an open circuit or large
resistance with some associated reverse bias capacitance (CJ).
The insertion loss of the structure becomes high and most of the
energy is reflected back towards the RF source, isolation state.
So, by its nature this type of switch would be defined as a
reflective switch when in the zero or reverse biased state.
This particular bias circuitry offers the ability for the diode to be
either forward or reverse biased using a single positive control
voltage. A negative control voltage would normally have been
required to provide a proper reverse bias on the diode in the
isolation state. This technique eliminates the need for this
negative voltage while still improving overall device linearity while
only using a positive supply voltage.
However, a single shunt mounted diode produces higher isolation
values across a wider frequency range and results in a design
capable of handling more power since it is easier to heat sink the
diode.
Multi-throw switches are more frequently used than single-throw
switches. A simple multi-throw switch may be designed that uses
a series PIN diode in each arm adjacent to the common port.
Improved performance is obtained by using “compound
switches,” which are combinations of series and shunt connected
PIN diodes, in each arm.
Figure 5. PIN Diode SPST Switches
Series Connected Switch
Figure 6 shows two basic types of PIN diode series switches, a
Single-Pole, Single Throw (SPST) and a Single-Pole, DoubleThrow (SPDT) switch, commonly used in broadband designs. In
both cases, the diode is in a “pass power” condition when it is
forward biased and presents a low forward resistance, RS,
between the RF generator and load.
For a “stop power” condition, the diode is at zero or reverse bias
so that it presents a high impedance between the source and
load. In series-connected switches, the maximum isolation
obtainable depends primarily on the capacitance of the PIN diode,
while the insertion loss and power dissipation are functions of the
diode resistance. The principal operating parameters of a series
switch can be obtained using the equations shown in the following
sections.
For narrow-band applications, quarter-wave spaced multiple
diodes may also be used in various switch designs to obtain
improved operation. In the following section, each of these types
of switches are discussed in detail and design information is
provided to help select PIN diodes and to help predict circuit
performance.
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APPLICATION NOTE • DESIGN WITH PIN DIODES
Figure 7. Insertion Loss for PIN Diode Series Switch in a 50 Ω
System
Figure 6. SPST and SPDT Switch Schematics
Insertion Loss (Series Switch)

R
IL = 20 log 10  1 + S
2
Z0




(9)
Equation (9) computes insertion loss in dB for an SPST series
switch. The plot shown in Figure 7 illustrates insertion loss versus
resistance for a 50 Ω impedance design. For multi-throw
switches, the insertion loss is slightly higher due to any mismatch
caused by the capacitance of the PIN diodes in the “off” arms.
This additional insertion loss can be determined from Figure 10
after first computing the total shunt capacitance of all “off” arms
of the multi-throw switch.
Isolation (Series Switch)
[
Iso = 10 log 10 1 + (4πfCZ 0 )−2
]
(10)
Equation (10) computes isolation in dB for an SPST diode switch.
Add 6 dB for a Single-Pole, No-Throw (SPNT) switch to account for
the 50 percent voltage reduction across the “off” diode due to the
termination of the generator in its characteristic impedance. The
plot shown in Figure 8 illustrates isolation as a function of
capacitance for a 50 Ω impedance design.
Figure 8. Isolation for an SPST Diode Series Switch in a 50 Ω
System (Add 6 dB for Multi-Throw Switches [SPNTs])
Power Dissipation (Series Switch in Forward Bias)
PD =
4 RS Z 0
(2 Z 0 + RS )2
× PAV
(11)
Where: PD = power dissipation in Watts
For the condition: Z0 >> RS, this becomes:
PD =
RS
× PAV
Z0
(12)
Where the maximum available power (in Watts) is given by:
PAV =
VG 2
4 Z0
(13)
It should be noted that Equations (11) and (12) apply only for
perfectly matched switches. For SWR (σ) values other than unity,
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APPLICATION NOTE • DESIGN WITH PIN DIODES
multiply these equations by [2σ/(σ+ 1)]2 to obtain the maximum
required diode power dissipation rating.
Peak Current (Series Switch)
IP =
2 PAV  2σ 

× 
Z0
σ + 1
(14)
Where IP = peak current in amps.
In the case of a 50 Ω system, equation (14) reduces to:
IP =
PAV  2σ 

× 
5
σ + 1
(15)
Peak RF Voltage (Series Switch)
VP = 8 Z0 PAV
 2σ 

VP = 2 Z 0 PAV × 
σ + 1
(16)
For a 50 Ω system, Equation (16) becomes:
VP = 20 PAV
VP = 10 PAV
Figure 9. Shunt Connected Switches 2-5
 2σ 

× 
σ + 1
(17)
Shunt Connected Switch
Figure 9 shows two typical shunt-connected PIN diode switches.
These shunt diode switches offer high isolation for many
applications and, since the diode may be heat sunk at one
electrode, it is capable of handling more RF power than a diode in
a series type switch.
In shunt switch designs, the isolation and power dissipation are
functions of the diode’s forward resistance, whereas the insertion
loss is primarily dependent on the capacitance of the PIN diode.
The principal operating parameters of a shunt switch can be
obtained using the equations shown in the following sections.
Insertion Loss (Shunt Switch)
[
IL = 10 log 10 1 + (πfCT Z 0 )2
]
Equation (18) computes insertion loss in dB for both SPST and
SPNT shunt switches. The plot shown in Figure 10 illustrates
insertion loss versus frequency for a 50 Ω impedance design.
(18)
Figure 10. Insertion Loss For a Shunt PIN Switch in a 50 Ω
System
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APPLICATION NOTE • DESIGN WITH PIN DIODES
Peak RF Current (Shunt Switch)
IP =
IP =
8 PAV
Z0
2 PAV  2σ 

× 
Z0
σ + 1
(SPST)
(SPNT) (24)
Where IP = peak current in amps.
In the case of a 50 Ω system, Equation (24) reduces to:
I P = 0.4 PAV
 2σ 

I P = 0.2 PAV × 
σ + 1
Figure 11. Isolation for SPST Shunt PIN Switches in a 50 Ω
System (Add 6 dB for Multi-Throw Switches [SPNTs])
Isolation (Shunt Switch)

Z
Iso = 20 log 10  1 + 0
2
RS





(19)
Power Dissipation (Shunt Switch in Forward Bias)
4 RS Z 0
(Z 0 + 2 RS )2
× PAV
(20)
Where: PD = power dissipation in Watts
4 RS
× PAV
Z0
(26)
 2σ 

VP = 10 PAV × 
σ + 1
(27)
Compound and Tuned Switches
In practice, it is usually difficult to achieve more than 40 dB
isolation using a single PIN diode, either in shunt or series, at RF
and higher frequencies. The causes of this limitation are generally
radiation effects in the transmission medium and inadequate
shielding. To overcome this, there are switch designs that use
combinations of series and shunt diodes (compound switches),
and switches that use resonant structures (tuned switches)
affecting improved isolation performance.
(22)
This adds some complexity to the bias circuitry in comparison to
simple switches. A summary of formulas used to calculate
insertion loss and isolation for compound and simple switches is
given in Table 1.
2
VG
4Z0
 2σ 

VP = 2 Z 0 PAV × 
σ + 1
(21)
Where the maximum available power (in Watts) is given by:
PAV =
Peak RF Voltage (Shunt Switch)
The two most common compound switch configurations are PIN
diodes mounted in either ELL (series-shunt) or TEE designs, as
shown in Figure 12. In the insertion loss state for a compound
switch, the series diode is forward biased and the shunt diode is
at zero or reverse bias. The reverse is true for the isolation state.
For the condition: Z0 >> RS, this becomes:
PD =
(SPNT) (25)
For a 50 Ω system, Equation (26) becomes:
Equation (19) computes isolation in dB for an SPST shunt switch.
Add 6 dB to obtain the correct isolation for a multi-throw switch.
The plot shown in Figure 11 illustrates isolation versus resistance
for a 50 Ω impedance design.
PD =
(SPST)
Power Dissipation (Shunt Switch in Reverse)
PD =
Z0
× PAV
RP
(23)
Where: PD = power dissipation in Watts
RP = parallel resistance of reverse biased diode in Ω
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APPLICATION NOTE • DESIGN WITH PIN DIODES
Figure 13 shows the performance of an ELL type switch, a diode
rated at 3.3 pF, maximum capacitance, and 0.25 Ω with RS
maximum at 100 mA. In comparison, a simple series connected
using the same diode switch would have similar insertion loss to
the 100 MHz contour and the isolation would be 15 dB maximum
at 100 MHz, falling off at the rate of 6 dB per octave.
A tuned switch may be constructed by spacing two series diodes
or two shunt diodes a wavelength apart, as shown in Figure 14.
The resulting value of isolation in the tuned switch is twice that
obtainable in a single diode switch. The insertion loss of the tuned
series switch is higher than that of the simple series switch and
may be computed using the sum of the diode resistance as the RS
value in Equation (9). In the tuned shunt switch the insertion loss
may even be lower than in a simple shunt switch because of a
resonant effect of the spaced diode capacitances.
Quarter-wave spacing need not be limited to frequencies where
the wavelength is short enough to install a discrete length of line.
There is a lumped circuit equivalent that simulates the quarterwave section and may be used in the RF band. This is shown in
Figure 15. These tuned circuit techniques are effective in
applications having bandwidths on the order of 10 percent of the
center frequency.
Figure 12. Compound Switches
Table 1. Summary of Formulas for SPST Switches (Add 6 dB to Isolation to Obtain Value for Single Pole Multi-Throw Switch)
Type
Series
Shunt
Series-Shunt
TEE
Isolation
(dB)

X
10 log 10 1 +  C

 2Z 0

Insertion Loss
(dB)
2



  R
20 log 10 1 +  S
  2 Z 0
  Z 
20 log 10 1 +  0 
  2 RS 
  Z
10 log 10 1 +  0
  2XC


Z
10 log 10   1 + 0

2 RS

 X
10 log 10 1 +  C
  Z0





2
2
X

 +  C
 2Z0

 + 10 log 10









2




2




 Z + RS
R 
10 log10  1 + S  +  0

2 Z0 
 2XC

2

Z  
 1 + 0  
RS  


2



 1 + Z 0  +  X C


 2R

2 RS 
 S





2




2



2






 Z + RS
R 
20 log 10  1 + S  + 10 log 10 1 +  0

Z
0 

 2XC

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


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



2



APPLICATION NOTE • DESIGN WITH PIN DIODES
Figure 14. Tuned SPDT Switch in Series and Shunt Configuration
Figure 13. Series Shunt Switch
Transmit/Receive Switches
There is a class of switches used in transceiver applications
whose function is to connect the antenna to the transmitter
(exciter) in the transmit state and to the receiver during the
receiver state. When PIN diodes are used as elements in these
switches, they offer higher reliability, better mechanical
ruggedness, and faster switching speed than electro-mechanical
designs.
The basic circuit for an electronic switch consists of a PIN diode
connected in series with the transmitter, and a shunt diode
connected a quarter wavelength away from the antenna node. A
lumped-component equivalent of a quarter-wave transmission line
is shown in Figure 15.
When switched into the transmit state, each diode becomes
forward biased. The series diode appears as a low impedance to
the signal heading toward the antenna, and the shunt diode
effectively shorts the antenna terminals of the receiver to prevent
overloading.
Figure 15. Quarter-Wave Line Equivalent
Transmitter insertion loss and receiver isolation depend on the
diode resistance. If RS is 1 Ω greater than 30 dB isolation and less
than 0.2 dB insertion, loss can be expected. This performance is
achievable over a 10 percent bandwidth.
In the receive condition, the diodes are at zero or reverse bias and
present essentially a low capacitance, CT, which creates a direct
low insertion loss path between the antenna and receiver. The off
transmitter is isolated from this path by the high impedance series
diode.
The amount of power, PA, that this switch can handle depends on
the power rating of the PIN diode, PD, and the diode resistance.
Equation 28 shows this relationship for an antenna maximum
SWR of σ.
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APPLICATION NOTE • DESIGN WITH PIN DIODES
PA =
PD Z 0  σ + 1 


RS  2σ 
2
(28)
Where the amount of power, PA, is in Watts.
In a 50 system where the condition of a totally mismatched
antenna must be considered, this equation becomes:
PA =
12.5 × PD
RS
(29)
Skyworks SMP1322-011LF is a surface mount PIN diode rated at
0.25 W dissipation to a 25 °C contact. The resistance of this diode
is 0.50 Ω (max) at 10 mA. A quarter-wave switch using the
SMP1322-011LF may then be computed to handle 6.25 W with a
totally mismatched antenna.
It should be pointed out that the shunt diode of the quarter-wave
antenna switch dissipates about as much power as the series
diode. This may not be apparent from Figure 16. However, it can
be shown that the RF current in both the series and shunt diode is
practically identical.
Broadband antenna switches using PIN diodes may be designed
using the series connected diode circuit shown in Figure 17. The
frequency limitation of this switch results primarily from the
capacitance of D2.
In this case, forward bias is applied either to D1 during the
transmit or D2 during receive. In high power applications (> 5 W),
it is often necessary to apply reverse voltage on D2 during
transmit. This may be accomplished either by a negative polarity
power supply at Bias 2, or by having the forward bias current of
D1 flow through resistor R to apply the required negative voltage.
The selection of diode D1 is based primarily on its power handling
capability. It need not have a high voltage rating since it is always
forward biased in its low resistance state when high RF power is
applied. Diode D2 does not pass high RF current but must be able
to hold off the RF voltage generated by the transmitter. It is
primarily selected on the basis of its capacitance, which
determines the upper frequency limit and its ability to operate at
low distortion.
Using the SMP1322-011LF as D1, and an SMP1302-001LF or
SOT-23 PIN diode that are rated at 0.3 pF max as D2, greater than
25 dB receiver isolation may be achieved up to 400 MHz. The
expected transmit and receive insertion loss with the PIN diodes
biased at 10 mA are 0.1 dB and 0.3 dB, respectively. This switch
can handle RF power levels up to 6.25 W.
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APPLICATION NOTE • DESIGN WITH PIN DIODES
Figure 16. Quarter-Wave Antenna Switches
Figure 17. Broadband Antenna Switch
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APPLICATION NOTE • DESIGN WITH PIN DIODES
Practical Design Hints
PIN diode circuit performance at RF frequencies is predictable and
should conform closely to the design equations. When a switch is
not performing satisfactorily, the fault is often not due to the PIN
diode but to other circuit limitations such as circuit loss, bias
circuit interaction, or lead length problems (primarily when shunt
PIN diodes are used).
It is good practice in a new design to first evaluate the circuit loss
by substituting, alternatively, a wire short or open in place of the
PIN diode. This simulates the circuit performance with “ideal PIN
diodes.” Any deficiency in the external circuit may then be
corrected before inserting the PIN diodes.
PIN Diode Attenuators
Figure 18. Typical Diode Resistance vs Forward Current
In an attenuator application, the resistance characteristic of the
PIN diode is exploited not only at its extreme high and low values,
as in switches, but at the finite values in between.
The resistance characteristic of a PIN diode when forward biased
to IF1 depends on the I region width (W) carrier lifetime (ττ), and
the hole and electron mobilities (μp, μn) as follows:
RS =
W2
[(µ P + µn )I Fτ ]
(30)
Where the PIN diode resistance, RS, is in Ω.
For a PIN diode with an I region width of typically 250 mm, a
carrier lifetime of 4 ms, μn of 0.13, μp of 0.05 m2/v × s, Figure 18
shows the RS versus current characteristic.
When a PIN diode for an attenuator application is selected, the
designer must often be concerned about the range of diode
resistance, which defines the dynamic range of the attenuator.
PIN diode attenuators tend to be more distortion sensitive than
switches since their operating bias point often occurs at a low
value of quiescent stored charge. A thin I region PIN operates at
lower forward bias currents than thick PIN diodes, but the thicker
one generates less distortion.
PIN diode attenuator circuits are used extensively in Automatic
Gain Control (AGC) and RF leveling applications, as well as in
electronically controlled attenuators and modulators. A typical
configuration of an AGC application is shown in Figure 19. The PIN
diode attenuator may take many forms ranging from a simple
series or shunt mounted diode acting as a lossy reflective switch,
or a more complex structure that maintains a constant matched
input impedance across the full dynamic range of the attenuator.
Figure 19. RF AGC/Leveler Circuit
Although there are other methods that provide AGC functions,
such as varying the gain of the RF transistor amplifier, the PIN
diode approach generally results in lower power drain, less
frequency pulling, and lower RF signal distortion. The latter results
are especially true when diodes with thick I regions and long
carrier lifetimes are used in the attenuator circuits. Using these
PIN diodes, one can achieve wide dynamic range attenuation with
low signal distortion at frequencies ranging from below 1 MHz up
to well over 1 GHz.
Reflective Attenuators
An attenuator may be designed using single series or shunt
connected PIN diode switch configurations, as shown in Figure 20.
These attenuator circuits use the current-controlled resistance
characteristic of the PIN diode, not only in its low loss states (very
high or low resistance), but also at in-between, finite resistance
values.
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APPLICATION NOTE • DESIGN WITH PIN DIODES
Quadrature Hybrid Attenuators
Although a matched PIN attenuator may be achieved by combining
a ferrite circulator with one of the previous simple reflective
devices, the more common approach makes use of quadrature
hybrid circuits.
Quadrature hybrids are commonly available at frequencies from
below 10 MHz to above 1 GHz, with bandwidth coverage often
exceeding a decade. Figures 21 and 22 show typical quadrature
hybrid circuits that use series and shunt connected PIN diodes.
Equations (33) and (34) summarize this performance.
Quadrature hybrid (series-connected PIN diodes):

2Z
A = 20 log  1 + 0
RS




(33)
Quadrature hybrid (shunt-connected PIN diodes):

2 RS
A = 20 log  1 +
Z0

(34)
The quadrature hybrid design approach is superior to the
circulator coupled attenuator from the standpoint of lower cost
and lower frequency operation. Because the incident power is
divided into two paths, the quadrature hybrid configuration is also
capable of handling twice the power, and this occurs at the 6 dB
attenuation point. Each load resistor, however, must be capable of
dissipating one-half the total input power at the time of maximum
attenuation.
Figure 20. SPST PIN Diode Switches
The attenuation value obtained using these circuits can be
computed from Equations (31) and (32).
Attenuation (in dB) of series-connected PIN diode attenuators:

R 
A = 20 log  1 + S 
2 Z0 




(31)
Attenuation of shunt-connected PIN diode attenuators:

Z
A = 20 log  1 + 0
2 RS




(32)
These equations assume the PIN diode to be purely resistive. The
reactance of the PIN diode capacitance, however, must also be
taken into account at frequencies at which its value begins to
approach the PIN diode resistance value.
Matched Attenuators
Attenuators built from switch design are basically reflective
devices that attenuate the signal by producing a mismatch
between the source and the load. Matched PIN diode attenuator
designs, which exhibit constant input impedance across the entire
attenuation range, are also available. They use either multiple PIN
diodes biased at different resistance points or bandwidth limited
circuits using tuned elements.
Figure 21. Quadrature Matched Hybrid Attenuator
(Series-Connected Diodes)
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APPLICATION NOTE • DESIGN WITH PIN DIODES
Figure 22. Quadrature Hybrid Matched Attenuator
(Shunt-Connected Diodes)
Figure 23. Quarter-Wave Matched Attenuator
(Series-Connected Diodes)
Both of the above types of hybrid attenuators offer good dynamic
range. The series-connected diode configuration is, however,
recommended for attenuators used primarily at high attenuation
levels (greater than 6 dB), while the shunt mounted diode
configuration is better suited for low attenuation ranges.
In a constant impedance attenuator circuit, the power incident on
port A divides equally between ports B and C; port D is isolated.
The mismatch produced by the PIN diode resistance in parallel
with the load resistance at ports B and C reflects part of the
power. The reflected power exits port D, isolating port A.
Therefore, port A appears matched to the input signal.
Quadrature hybrid attenuators may also be constructed without
the load resistor attached in series or parallel to the PIN diode. In
these circuits, the forward current is increased from the 50 Ω,
maximum attenuation/RS value to lower resistance values. This
results in an increased stored charge as the attenuation is
lowered, which is desirable for lower distortion.
Figure 24. Quarter-Wave Matched Attenuator
(Shunt-Connected Diodes)
The purpose of the load resistor is to make the attenuator less
sensitive to individual diode differences and to increase the
power-handling capacity by a factor of two.
Quarter-Wave Attenuators
An attenuator matched at the input may also be built using
quarter-wave techniques. Figures 23 and 24 show examples of
these circuits. For the quarter-wave section, a lumped equivalent
may be used at frequencies too low for practical use of line
lengths. This equivalent is shown in Figure 25.
Attenuation (in dB) for these circuits is calculated according to
Equations (35) and (36).

Z 
A = 20 log  1 + 0 
RS 

(35)

R 
A = 20 log  1 + S 
Z0 

(36)
Figure 25. Lumped Circuit Equivalent of Quarter-Wave Line
A matched condition is achieved in these circuits when both
diodes are at the same resistance. This condition should normally
occur when similar diodes are used, since they are DC series
connected, with the same forward bias current flowing through
each diode. The series circuit of Figure 23 is recommended for
use at high attenuation levels, while the shunt diode circuit of
Figure 24 is better suited for low attenuation circuits.
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APPLICATION NOTE • DESIGN WITH PIN DIODES
Bridged TEE and PI Attenuators
Attenuator designs using multiple PIN diodes are used for
matched broadband applications, especially those covering the
low RF (1 MHz) through UHF frequency range. The bridged TEE
and PI circuits shown in Figures 26 and 27 are commonly used for
these applications.
The attenuation obtained using abridged TEE circuits can be
calculated from the following equation:

Z 
A = 20 log  1 + 0 
RS 1 

Where:
Figure 26. Bridged TEE Attenuator
(37)
Z 0 2 = RS 1 × RS 2 in Ω2
The relationship between the forward resistance of the two diodes
ensures maintenance of a matched circuit at all attenuation
values.
The expressions for attenuation and matching conditions for the PI
attenuator are given by the following relationships:
 R + Z0 

A = 20 log  S 1
 RS 1 − Z 0 
Figure 27. PI Attenuator
(The π and TEE are Broadband Matched Attenuator Circuits)
(38)
Where attenuation is measured in dB and series resistance
measured in Ohms as follows:
RS 3 =
2 RS 1Z 0 2
RS 12 − Z 0 2
(39)
RS 1 = RS 2
Using these expressions, Figure 28 illustrates the relationship
between diode resistance values for a 50 Ω PI attenuator. Note
that the minimum value for RS1 and RS2 is 50 Ω. In both the
bridged TEE and PI attenuators, the PIN diodes are biased at two
different resistance points simultaneously, which must track to
achieve proper attenuator performance.
PIN Diode Modulators
PIN diode switches and attenuators may be used as RF amplitude
modulators. Square wave or pulse modulation use PIN diode
switch designs, whereas linear modulators use attenuator
designs.
The design of high-power or distortion-sensitive modulator
applications follows the same guidelines as the switch and
attenuator counterparts. The PIN diodes used should have thick I
regions. Series connected, or, preferably, back-to-back
configurations always reduce distortion. The sacrifice in using
these devices will be lower maximum frequencies and higher
modulation current requirements.
Figure 28. Attenuation of PI Attenuators
The quadrature hybrid design is recommended as a building block
for PIN diode modulators. Its inherent built-in isolation minimizes
pulling and undesired phase modulation on the driving source.
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APPLICATION NOTE • DESIGN WITH PIN DIODES
PIN Diode Phase Shifters
PIN diodes are used as series or shunt connected switches in
phase shifter circuit designs. In such cases, the elements
switched are either lengths of transmission line or reactive
elements.
The criteria for choosing PIN diodes for use in phase shifters is
similar to the criteria used to select diodes for other switching
applications. One additional factor, however, that must often be
considered is the possibility of introducing phase distortion,
particularly at high RF power levels or low reverse bias voltages.
Of significant note is the fact that the properties inherent in PIN
diodes that yield low distortion (i.e., a long carrier lifetime and
thick I regions) also result in low phase distortion of the RF signal.
Three of the most common types of semiconductor phase shifter
circuits are the switched line, loaded line, and reflective.
Switched Line Phase Shifter
A basic example of a switched line phase shifter circuit is shown
in Figure 29. In this design, two SPDT switches with PIN diodes
are used to change the electrical length of a transmission line by
some length, Δl. The phase shift obtained from this circuit varies
with frequency and is a direct function of this differential line
length:
∆θ =
2π∆
λ
(40)
Where the phase shift is measured in radians.
The switched line phase shifter is inherently a broadband circuit
producing true time delay, with the actual phase shift dependent
only on Δl. Because of PIN diode capacitance limitations, this
design is most frequently used at frequencies below 1 GHz.
Figure 29. Switched Line Phase Shifter
The power capabilities and loss characteristics of the switched
line phase shifter are the same as those of a series connected
SPDT switch. A unique characteristic of this circuit is that the
power and voltage stress on each diode is independent of the
amount of differential phase shift produced by each phase shifter.
Therefore, four diodes are required for each bit, with all diodes
having the same power and voltage ratings.
Loaded Line Phase Shifter
The loaded line shifter design shown in Figure 30 operates on a
different principle than the switched line phase shifter. In this
design, the desired maximum phase skirt is divided into several
smaller phase shift sections, each containing a pair of PIN diodes
that do not completely perturbate the main transmission line.
A major advantage of this phase shifter is its extremely high
power capability, due partly to the use of shunt mounted diodes,
and the fact that the PIN diodes are never in the direct path of the
full RF power.
In loaded line phase shifters, a normalized susceptance, Bn, is
switched in and out of the transmission path by the PIN diodes.
Typical circuits use values of Bn much less than unity, resulting in
considerable decoupling of the transmitted RF power from the PIN
diode. The phase shift for a single section is given by the following
equation:


Bn
θ = 2 tan − 1 
2
 1 − Bn
8







Where the phase shift is measured in radians.
Figure 30. Loaded Line Phase Shifter
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(41)
APPLICATION NOTE • DESIGN WITH PIN DIODES
The maximum phase shift obtainable from a loaded line section is
limited by both bandwidth and diode power handling
considerations. The power constraint on obtainable phase shift is
shown by the following relationship:
 VBR I F 


 4 PL 
θ max = 2 tan −1 
Where: θ max
PL
VBR
IF
=
=
=
=
(42)
maximum phase angle in radians
transmitted power
diode breakdown voltage
diode current rating
These factors limit the maximum phase shift angle in practical
circuits to about 45°. Therefore, a 180° phase shift would require
the use of four 45° phase shift sections in its design.
Reflective Phase Shifter
Figure 31. Hybrid Coupler Reflective Phase Shifter
A circuit design that handles both high RF power and large
incremental phase shifts with the fewest number of diodes is the
hybrid coupled phase shifter shown in Figure 31.
The voltage stress on the shunt PIN diode in this circuit also
depends on the amount of desired phase shift, or “bit” size. The
greatest voltage stress is associated with the 180° bit and is
reduced by the factor (sinθ/2)1/2 for other bit sizes. The
relationship between maximum phase shift, transmitted power,
and PIN diode ratings is shown by the following equation:
 VBR I F
 8 PL
θ max = 2 sin −1 



(43)
Where the maximum phase shift is measured in radians.
In comparison to the loaded line phase shifter, the hybrid design
can handle up to twice the peak power when the same diodes are
used.
In both hybrid and loaded line designs, the power dependency of
the maximum bit size relates to the product of the maximum RF
current and peak RF voltage the PIN diodes can handle.
If the nominal impedance in the plane of the PIN diode is carefully
chosen, the current and voltage stress can usually be adjusted to
be within the device ratings. In general, this implies lowering the
nominal impedance to reduce the voltage stress in favor of higher
RF currents.
For PIN diodes, the maximum current rating should be specified or
is dependent upon the diode power dissipation rating, while the
maximum voltage stress at RF frequencies is dependent on I
region thickness.
PIN Diode Distortion Model
This Application Note has described large signal operation and
thermal considerations that allow the circuit designer to avoid
conditions that would lead to significant changes in PIN diode
performance or excessive power dissipation. A subtle, but often
significant, operating characteristic is the distortion or change in
signal shape, which is always produced by a PIN diode in the
signal it controls.
The primary cause of distortion is any variation or nonlinearity of
the PIN diode impedance during the period of the applied RF
signal. These variations could be in the diode’s forward bias
resistance, RS, parallel resistance, RP, capacitance, CT, or the
effect of the low frequency I-V characteristic.
The level of distortion can range from better than 100 dB below,
to levels approaching the desired signal. The distortion could be
analyzed in a Fourier series and takes the traditional form of
harmonic distortion of all orders, when applied to a single input
signal, and harmonic intermodulation distortion when applied to
multiple input signals.
Nonlinear, distortion-generating behavior is often desired in PIN
and other RF oriented semiconductor diodes. Self-biasing limiter
diodes are often designed as thin I region PIN diodes operating
near or below their transit time frequency. In a detector or mixer
diode, the distortion that results from the ability of the diode to
follow its I-V characteristic at high frequencies is exploited.
In this regard, the term “square law detector” applied to a
detector diode implies a second order distortion generator. In the
PIN switch circuits described at the beginning of this Application
Note, and the attenuator and other applications described here,
methods of selecting and operating PIN diodes to obtain low
distortion have been described.
There is a common misconception that minority carrier lifetime is
the only significant PIN diode parameter that affects distortion.
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APPLICATION NOTE • DESIGN WITH PIN DIODES
This is indeed a major factor but another important parameter is
the width of the I region, which determines the transit time of the
PIN diode. A diode with a long transit time has more of a tendency
to retain its quiescent level of stored charge. The longer transit
time of a thick PIN diode reflects its ability to follow the stored
charge model for PIN diode resistance according to the following
relationships.
Q = I Fτ
(44)
Where the stored charge, Q, is in coulombs.
RS =
Where: IF
τ
W
μn
μp
RS
=
=
=
=
=
=
W2
(µp + µn )Q
Distortion in Attenuator Circuits
(45)
forward bias current
carrier lifetime
I region width
electron mobility
hole mobility
series resistance in Ω
The effect of carrier lifetime on distortion relates to the quiescent
level of stored charge induced by the DC forward bias current and
the ratio of this stored charge to the incremental stored charge
added or removed by the RF signal.
The distortion generated by a forward biased PIN diode switch has
been analyzed and has been shown to be related to the ratio of
stored charge to diode resistance and the operating frequency.
=
=
=
=
=
In attenuator applications, distortion is directly relatable to the
ratio of RF to DC stored charge. In such applications, PIN diodes
operate only in the forward bias state, and often at high resistance
values where the stored charge may be very low. Under these
operating conditions, distortion varies with charges in the
attenuation level. Therefore, PIN diodes selected for use in
attenuator circuits need be chosen only for their thick I region
width, since the stored charge at any fixed diode resistance, RS, is
dependent only on this dimension.
Consider the Skyworks SMP1304-001 PIN diode used in an
application where a resistance of 50 Ω is desired. The Data Sheet
(document #200044) indicates that 1 mA is the typical diode
current at which this occurs. Since the typical carrier lifetime for
this diode is 1 μs, the stored charge for the diode at 50 Ω is
1.0 nC.
 F ×Q

IP 2 = 34 + 20 log 

 RS 
(46)
However, if two PIN diodes are inserted in series to achieve the
same 50 Ω resistance level, each diode must be biased at 2 mA.
This results in a stored charge of 2 nC per diode, or a net stored
charge of 4 nC. Therefore, adding a second diode in series
multiplies the effective stored charge by a factor of 4. This would
have a significant positive impact on reducing the distortion
produced by attenuator circuits.
 F ×Q

IP 2 = 34 + 20 log 

 RS 
(47)
Measuring Distortion
 F ×Q

IP3 = 21 + 15 log 

 RS 
(48)
Because distortion levels are often 50 dB or more below the
desired signal, special precautions are required to make accurate
second and third order distortion measurements.
The following prediction equations for the second order
intermodulation intercept point (IP2) and the third order
intermodulation intercept point (IP3) have been developed from
PIN semiconductor analysis.
Where: IP2
IP3
F
RS
Q
Distortion produced in a PIN diode circuit may be reduced by
connecting an additional diode in a back-to-back orientation
(cathode-to-cathode or anode-to-anode). This results in a
cancellation of distortion currents. The cancellation should be
total, but the distortion produced by each PIN diode is not exactly
equal in magnitude and opposite in phase. Approximately 20 dB
distortion improvement may be expected by this back-to-back
configuration.
2nd Order Insertion Point in dBm
3rd Order Insertion Point in dBm
frequency in MHz
PIN diode resistance in Ω
stored charge in nC
In most applications, the distortion generated by a reversed biased
diode is smaller than forward biased generated distortion for small
or moderate signal size. This is particularly the case when the
reverse bias applied to the PIN diode is larger than the peak RF
voltage, which prevents any instantaneous swing into the forward
bias direction.
One must first ensure that the signal sources used are free of
distortion and that the dynamic range of the spectrum analyzer
used is adequate to measure the specified level of distortion.
These requirements often lead to the use of fundamental
frequency bandstop filters at the device output, as well as
preselectors to clean up the signal sources used.
To establish the adequacy of the test equipment and signal
sources for making the desired distortion measurements, the test
circuit should be initially evaluated by removing the diodes and
replacing them with passive elements. This approach permits one
to optimize the test setup and establish basic measurement
limitations.
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APPLICATION NOTE • DESIGN WITH PIN DIODES
Since harmonic distortion appears only at multiples of the signal
frequency, these signals may be filtered out in narrow band
systems. Second order distortion, caused by the mixing of two
input signals, appears at the sum and difference of these
frequencies and may also be filtered.
To help identify the various distortion signals seen on a spectrum
analyzer, it should be noted that the level of a second distortion
signal will vary directly at the same rate as any change of input
signal level. Therefore, a 10 dB signal increase causes a
corresponding 10 dB increase in second order distortion.
Third order intermodulation distortion of two input signals at
frequencies FA and FB often produce in-band, nonfilterable
distortion components at frequencies of 2FA – FB and 2FB – FA.
This type of distortion is particularly troublesome in receivers
located near transmitters that operate on equally spaced
channels. When such signals are identified and measured, it
should be noted that third order distortion signal levels vary at
twice the rate of change of the fundamental signal frequency.
Therefore, a 10 dB change in input signal results in a 20 dB
change of the third order signal distortion power observed on a
spectrum analyzer.
References:
1. Hiller, G. and R. Caverly. Establishing the Reverse Bias to a PIN
Diode in a High Power Switch, IEEE MTT Transactions, December
1990.
2. Garver, Robert V. Microwave Control Devices, Artech House,
Inc., Dedham, MA, 1976.
3. Martenson, K.E. and J.M. Borrego. Design performance and
Application of Microwave Semiconductor Control Components,
Artech House, Inc., Dedham, MA, 1972.
4. Watcon, H.A. Microwave Semiconductor Devices and Their
Circuit Application, McGraw-Hill Book Co., New York, NY, 1969.
5. White, Joseph F. Semiconductor Control, Artech House, Inc.,
Dedham, MA, 1977.
6. Hiller, G. and R. Caverly. Distortion in PIN Diode Control Circuits,
IEEE MTT Transactions, May 1987.
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