HEF4060B 14-stage ripple-carry binary counter/divider and oscillator Rev. 7 — 16 November 2011 Product data sheet 1. General description The HEF4060B is a 14-stage ripple-carry binary counter/divider and oscillator with three oscillator terminals (RS, REXT and CEXT), ten buffered outputs (Q3 to Q9 and Q11 to Q13) and an overriding asynchronous master reset input (MR). The oscillator configuration allows design of either RC or crystal oscillator circuits. The oscillator may be replaced by an external clock signal at input RS. The clock input’s Schmitt-trigger action makes it highly tolerant to slower clock rise and fall times. The counter advances on the negative-going transition of RS. A HIGH level on MR resets the counter (Q3 to Q9 and Q11 to Q13 = LOW), independent of other input conditions. It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS, or another input. 2. Features and benefits Tolerant of slow clock rise and fall times Fully static operation 5 V, 10 V, and 15 V parametric ratings Standardized symmetrical output characteristics Inputs and outputs are protected against electrostatic effects Specified from 40 C to +85 C Complies with JEDEC standard JESD 13-B 3. Ordering information Table 1. Ordering information All types operate from 40 C to +85 C. Type number Package Name Description Version HEF4060BP DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4 HEF4060BT SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 HEF4060B NXP Semiconductors 14-stage ripple-carry binary counter/divider and oscillator 4. Functional diagram 10 9 REXT 11 12 CEXT RS 14-STAGE BINARY COUNTER CP CD MR Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q11 Q12 Q13 7 5 4 6 14 13 15 1 2 3 001aae652 Fig 1. Functional diagram CEXT REXT FF1 FF4 FF10 FF12 FF14 CP CP CP RS CP CP Q Q CD Q CD MR Q CD Q3 Q CD Q9 CD Q11 Q13 001aae654 Fig 2. Logic diagram 5. Pinning information 5.1 Pinning HEF4060B Q11 1 16 VDD Q12 2 15 Q9 Q13 3 14 Q7 Q5 4 13 Q8 Q4 5 12 MR Q6 6 11 RS Q3 7 10 REXT VSS 8 9 CEXT 001aae653 Fig 3. Pin configuration HEF4060B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 16 November 2011 © NXP B.V. 2011. All rights reserved. 2 of 15 HEF4060B NXP Semiconductors 14-stage ripple-carry binary counter/divider and oscillator 5.2 Pin description Table 2. Pin description Symbol Pin Description Q11 to Q13 1, 2, 3 counter output Q3 to Q9 7, 5, 4, 6, 14, 13, 15 counter output VSS 8 ground supply voltage CEXT 9 external capacitor connection REXT 10 oscillator pin RS 11 clock input/oscillator pin MR 12 master reset VDD 16 supply voltage 6. Functional description Table 3. Function table[1] Input Output RS MR Q3 to Q9 and Q11 to Q13 L no change L count X H L [1] H = HIGH voltage level; L = LOW voltage level; = LOW-to-HIGH clock transition; HIGH-to-LOW clock transition. 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDD supply voltage IIK input clamping current VI input voltage IOK output clamping current II/O Conditions Min 0.5 VI < 0.5 V or VI > VDD + 0.5 V 0.5 Unit +18 V 10 mA VDD + 0.5 V - 10 mA input/output current - 10 mA IDD supply current - 50 mA Tstg storage temperature 65 +150 C Tamb ambient temperature 40 +85 C Ptot total power dissipation P power dissipation VO < 0.5 V or VO > VDD + 0.5 V Max Tamb 40 C to +85 C DIP16 package [1] - 750 mW SO16 package [2] - 500 mW - 100 mW per output [1] For DIP16 package: Ptot derates linearly with 12 mW/K above 70 C. [2] For SO16 package: Ptot derates linearly with 8 mW/K above 70 C. HEF4060B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 16 November 2011 © NXP B.V. 2011. All rights reserved. 3 of 15 HEF4060B NXP Semiconductors 14-stage ripple-carry binary counter/divider and oscillator 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter VDD VI Conditions Min Typ Max Unit supply voltage 3 - 15 V input voltage 0 - VDD V 40 - +85 C VDD = 5 V - - 3.75 s/V VDD = 10 V - - 0.5 s/V VDD = 15 V - - 0.08 s/V Tamb ambient temperature in free air t/V input transition rise and fall rate input MR 9. Static characteristics Table 6. Static characteristics VSS = 0 V; VI = VSS or VDD unless otherwise specified. Symbol Parameter VIH VIL VOH VOL IOH IOL HIGH-level input voltage IO < 1 A HIGH-level output voltage IO < 1 A LOW-level output voltage HIGH-level output current LOW-level output current input leakage current IDD supply current input capacitance HEF4060B Product data sheet Tamb = 40 C VDD IO < 1 A LOW-level input voltage II CI Conditions 5V Tamb = 25 C Tamb = 85 C Min Max Min Max Min Max 3.5 - 3.5 - 3.5 - Unit V 10 V 7.0 - 7.0 - 7.0 - V 15 V 11.0 - 11.0 - 11.0 - V 5V - 1.5 - 1.5 - 1.5 V 10 V - 3.0 - 3.0 - 3.0 V 15 V - 4.0 - 4.0 - 4.0 V 5V 4.95 - 4.95 - 4.95 - V 10 V 9.95 - 9.95 - 9.95 - V 15 V 14.95 - 14.95 - 14.95 - V IO < 1 A 5V - 0.05 - 0.05 - 0.05 V 10 V - 0.05 - 0.05 - 0.05 V 15 V - 0.05 - 0.05 - 0.05 V 5V - 1.7 - 1.4 - 1.1 mA VO = 2.5 V VO = 4.6 V 5V - 0.52 - 0.44 - 0.36 mA VO = 9.5 V 10 V - 1.3 - 1.1 - 0.9 mA VO = 13.5 V 15 V - 3.6 - 3.0 - 2.4 mA VO = 0.4 V 5V 0.52 - 0.44 - 0.36 - mA VO = 0.5 V 10 V 1.3 - 1.1 - 0.9 - mA VO = 1.5 V 15 V 3.6 - 3.0 - 2.4 - mA 15 V - 0.3 - 0.3 - 1.0 A 5V - 20 - 20 - 150 A IO = 0 A 10 V - 40 - 40 - 300 A 15 V - 80 - 80 - 600 A - 7.5 - - pF - - - All information provided in this document is subject to legal disclaimers. Rev. 7 — 16 November 2011 © NXP B.V. 2011. All rights reserved. 4 of 15 HEF4060B NXP Semiconductors 14-stage ripple-carry binary counter/divider and oscillator 10. Dynamic characteristics Table 7. Dynamic characteristics Tamb = 25 C; VSS = 0 V; CL = 50 pF; tr = tf 20 ns; unless otherwise specified. Symbol Parameter propagation delay tpd Conditions RS Q3; see Figure 4 Qn Qn + 1; see Figure 4 transition time pulse width tW recovery time 183 ns + (0.55 ns/pF) CL - 210 420 ns 10 V 69 ns + (0.23 ns/pF) CL - 80 160 ns 15 V 42 ns + (0.16 ns/pF) CL - 50 100 ns 5V - - 25 50 ns 10 V - - 10 20 ns 15 V 5V - 6 12 ns - 100 200 ns HIGH to LOW 10 V 29 ns + (0.23 ns/pF) CL - 40 80 ns see Figure 4 15 V 22 ns + (0.16 ns/pF) CL - 30 60 ns see Figure 4 minimum width; 5V [3] 10 ns + (1.00 ns/pF) CL - 60 120 ns 10 V 9 ns + (0.42 ns/pF) CL - 30 60 ns 15 V 6 ns + (0.28 ns/pF) CL - 20 40 ns 5V 120 60 - ns RS HIGH; 10 V 50 25 - ns see Figure 4 15 V 30 15 - ns 5V 50 25 - ns MR HIGH; 10 V 30 15 - ns see Figure 4 15 V 20 10 - ns 5V 160 80 - ns 10 V 80 40 - ns 15 V 60 30 - ns input MR; maximum frequency input RS; see Figure 4 [1] Unit 73 ns + (0.55 ns/pF) CL see Figure 4 fmax Max - minimum width; trec Typ [2] 5V MR Qn; tt Extrapolation formula[1] Min VDD 5V 4 8 - MHz 10 V 10 20 - MHz 15 V 15 30 - MHz The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (CL in pF). [2] tpd is the same as tPHL and tPLH. [3] tt is the same as tTHL and tTLH. HEF4060B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 16 November 2011 © NXP B.V. 2011. All rights reserved. 5 of 15 HEF4060B NXP Semiconductors 14-stage ripple-carry binary counter/divider and oscillator Table 8. Power dissipation Dynamic power dissipation PD and total power dissipation Ptot can be calculated from the formulas shown. Tamb = 25 C. Symbol Parameter Conditions PD per device dynamic power dissipation Typical formula for PD and Ptot (W)[1] VDD 5 V PD = 700 fi + (fo CL) VDD2 10 V PD = 3300 fi + (fo CL) VDD2 15 V PD = 8900 fi + (fo CL) VDD2 Ptot [1] total power dissipation 5 V Ptot = 700 fosc + (fo CL) VDD2 + 2 Ct VDD2 fosc + 690 VDD when using the on-chip oscillator 10 V Ptot = 3300 fosc + (fo CL) VDD2 + 2 Ct VDD2 fosc + 6900 VDD 15 V Ptot = 8900 fosc + (fo CL) VDD2 + 2 Ct VDD2 fosc + 22000 VDD Where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VDD = supply voltage in V; (fo CL) = sum of the outputs; Ct = timing capacitance (pF); fosc = oscillator frequency (MHz). 11. Waveforms tr tf 90 % VM MR input 10 % tW 1/fmax trec VM RS input tPHL tPLH tW tPHL 90 % Qn output VM 10 % tt tt 001aaj472 Measurement points are given in Table 9. Fig 4. Waveforms showing propagation delays for MR to Qn and CP to Q0, minimum MR, and CP pulse widths Table 9. Measurement points Supply voltage Input Output VDD VM VM 5 V to 15 V 0.5VDD 0.5VDD HEF4060B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 16 November 2011 © NXP B.V. 2011. All rights reserved. 6 of 15 HEF4060B NXP Semiconductors 14-stage ripple-carry binary counter/divider and oscillator VDD VI VO G DUT CL RT 001aag182 Test data is given in Table 10. Definitions for test circuit: DUT = Device Under Test; CL = load capacitance including jig and probe capacitance; RT = termination resistance should be equal to the output impedance Zo of the pulse generator. Fig 5. Test circuit for switching times Table 10. Measurement point and test data Supply voltage Input Load VDD VI tr, tf CL 5 V to 15 V VSS or VDD 20 ns 50 pF 12. RC oscillator HEF4060B MR (from logic) 11 RS C2 R2 REXT CEXT 10 9 Rt Ct 001aae655 1 Typical formula for oscillator frequency: f osc = -----------------------------2.3 R t C t Fig 6. External component connection for RC oscillator 12.1 Timing component limitations The oscillator frequency is mainly determined by Rt Ct, provided Rt << R2 and R2 C2 << Rt Ct. The influence of the forward voltage across the input protection diodes on the frequency is minimized by R2. The stray capacitance C2 should be kept as small as possible. In consideration of accuracy, Ct must be larger than the inherent stray capacitance. Rt must be larger than the LOCMOS (Local Oxidation Complementary Metal-Oxide Semiconductor) ‘ON’ resistance in series with it, which typically is 500 at VDD = 5 V, 300 at VDD = 10 V and 200 at VDD = 15 V. HEF4060B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 16 November 2011 © NXP B.V. 2011. All rights reserved. 7 of 15 HEF4060B NXP Semiconductors 14-stage ripple-carry binary counter/divider and oscillator The recommended values for these components to maintain agreement with the typical oscillation formula are: Ct 100 pF, up to any practical value, 10 k Rt 1 M. 12.2 Typical crystal oscillator circuit In Figure 7, R2 is the power limiting resistor. For starting and maintaining oscillation a minimum transconductance is necessary. HEF4060B MR (from logic) 11 RS Rbias REXT 100 kΩ to 1 MΩ C3 22 pF to 37 pF 560 kΩ 10 Rbias VDD R2 2.2 kΩ C2 100 pF 0.47 μF Vi (f = 1 kHz) 100 μF input output A io VSS 001aae657 001aae656 gfs = dio/dvi at vo is constant (see also Figure 9); MR = LOW. Fig 7. External component connection for crystal oscillator HEF4060B Product data sheet Fig 8. Test setup for measuring forward transconductance (gfs) All information provided in this document is subject to legal disclaimers. Rev. 7 — 16 November 2011 © NXP B.V. 2011. All rights reserved. 8 of 15 HEF4060B NXP Semiconductors 14-stage ripple-carry binary counter/divider and oscillator 001aae658 12.5 001aae659 105 gfs (mA/V) fosc (Hz) Rt 10 104 (1) Ct 7.5 (2) 103 (3) 5 102 2.5 0 0 5 10 10 3 10 10−4 15 VDD (V) Tamb = 25 C. 104 10−3 105 10−2 Rt (Ω) Ct (μF) 106 10−1 Ct curve at Rt = 100 k; R2 = 470 k. (1) Average + 2 . Rt curve at Ct = 1 nF; R2 = 5 Rt. (2) Average. VDD = 5 V to 15 V; Tamb = 25 C. (3) Average 2 . Where ‘’ is the observed standard deviation. Fig 9. Typical forward transconductance gfs as a function of the supply voltage Fig 10. RC oscillator frequency as a function of Rt and Ct 001aae660 (1) 8 Δfosc (%) 4 (2) (3) (4) 0 (5) −4 (6) −8 −12 −50 0 50 100 150 Tamb (°C) Lines (1) and (2): VDD = 15 V. Lines (3) and (4): VDD = 10 V. Lines (5) and (6): VDD = 5 V. Lines (1), (3), (6): Rt = 100 k; Ct = 1 nF; R2 = 0 W. Lines (2), (4), (5): Rt = 100 k; Ct = 1 nF; R2 = 300 k. Referenced at: fosc at Tamb = 25 C and VDD = 10 V. Fig 11. Oscillator frequency deviation (fosc) as a function of ambient temperature HEF4060B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 16 November 2011 © NXP B.V. 2011. All rights reserved. 9 of 15 HEF4060B NXP Semiconductors 14-stage ripple-carry binary counter/divider and oscillator 13. Package outline DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4 ME seating plane D A2 A A1 L c e Z w M b1 (e 1) b b2 MH 9 16 pin 1 index E 1 8 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 min. A2 max. b b1 b2 c D (1) E (1) e e1 L ME MH w Z (1) max. mm 4.2 0.51 3.2 1.73 1.30 0.53 0.38 1.25 0.85 0.36 0.23 19.50 18.55 6.48 6.20 2.54 7.62 3.60 3.05 8.25 7.80 10.0 8.3 0.254 0.76 inches 0.17 0.02 0.13 0.068 0.051 0.021 0.015 0.049 0.033 0.014 0.009 0.77 0.73 0.26 0.24 0.1 0.3 0.14 0.12 0.32 0.31 0.39 0.33 0.01 0.03 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 95-01-14 03-02-13 SOT38-4 Fig 12. Package outline SOT38-4 (DIP16) HEF4060B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 16 November 2011 © NXP B.V. 2011. All rights reserved. 10 of 15 HEF4060B NXP Semiconductors 14-stage ripple-carry binary counter/divider and oscillator SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE v M A Z 16 9 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 8 e 0 detail X w M bp 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 0.01 0.019 0.0100 0.39 0.014 0.0075 0.38 0.039 0.016 0.028 0.020 inches 0.010 0.057 0.069 0.004 0.049 0.16 0.15 0.05 0.244 0.041 0.228 0.01 0.01 0.028 0.004 0.012 θ 8o o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT109-1 076E07 MS-012 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 13. Package outline SOT109-1 (SO16) HEF4060B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 16 November 2011 © NXP B.V. 2011. All rights reserved. 11 of 15 HEF4060B NXP Semiconductors 14-stage ripple-carry binary counter/divider and oscillator 14. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes HEF4060B v.7 20111116 Product data sheet - HEF4060B v.6 Modifications: • • • Legal pages updated. Changes in “General description” and “Features and benefits”. Section “Applications” removed. HEF4060B v.6 20110511 Product data sheet - HEF4060B v.5 HEF4060B v.5 20091127 Product data sheet - HEF4060B v.4 HEF4060B v.4 20090817 Product data sheet - HEF4060B_CNV v.3 HEF4060B_CNV v.3 19950101 Product specification - HEF4060B_CNV v.2 HEF4060B_CNV v.2 19950101 Product specification - - HEF4060B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 16 November 2011 © NXP B.V. 2011. All rights reserved. 12 of 15 HEF4060B NXP Semiconductors 14-stage ripple-carry binary counter/divider and oscillator 15. Legal information 15.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 15.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 15.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. 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Export might require a prior authorization from competent authorities. HEF4060B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 16 November 2011 © NXP B.V. 2011. All rights reserved. 13 of 15 HEF4060B NXP Semiconductors 14-stage ripple-carry binary counter/divider and oscillator Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond 15.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 16. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] HEF4060B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 16 November 2011 © NXP B.V. 2011. All rights reserved. 14 of 15 HEF4060B NXP Semiconductors 14-stage ripple-carry binary counter/divider and oscillator 17. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 12.1 12.2 13 14 15 15.1 15.2 15.3 15.4 16 17 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 Recommended operating conditions. . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4 Dynamic characteristics . . . . . . . . . . . . . . . . . . 5 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 RC oscillator. . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Timing component limitations . . . . . . . . . . . . . . 7 Typical crystal oscillator circuit . . . . . . . . . . . . . 8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 13 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Contact information. . . . . . . . . . . . . . . . . . . . . 14 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 16 November 2011 Document identifier: HEF4060B