PHILIPS 74HCT4060-Q100

74HC4060-Q100; 74HCT4060-Q100
14-stage binary ripple counter with oscillator
Rev. 1 — 2 August 2012
Product data sheet
1. General description
The 74HC4060-Q100; 74HCT4060-Q100 are high-speed Si-gate CMOS devices that
comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky
TTL (LSTTL).
The 74HC4060-Q100; 74HCT4060-Q100 are 14-stage ripple-carry counter/dividers and
oscillators with three oscillator terminals (RS, RTC and CTC), ten buffered outputs (Q3 to
Q9 and Q11 to Q13) and an overriding asynchronous master reset (MR). The oscillator
configuration allows design of either RC or crystal oscillator circuits. The oscillator may be
replaced by an external clock signal at input RS. In this case keep the other oscillator pins
(RTC and CTC) floating. The counter advances on the negative-going transition of RS. A
HIGH level on MR resets the counter (Q3 to Q9 and Q11 to Q13 = LOW), independent of
other input conditions. In the HCT version, the MR input is TTL compatible, but the RS
input has CMOS input switching levels and can be driven by a TTL output by using a
pull-up resistor to VCC.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
 Automotive product qualification in accordance with AEC-Q100 (Grade 1)
 Specified from 40 C to +85 C and from 40 C to +125 C
 All active components on chip
 RC or crystal oscillator configuration
 ESD protection:
 MIL-STD-883, method 3015 exceeds 2000 V
 HBM JESD22-A114F exceeds 2000 V
 MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
 Multiple package options
3. Applications




Control counters
Timers
Frequency dividers
Time-delay circuits
74HC4060-Q100; 74HCT4060-Q100
NXP Semiconductors
14-stage binary ripple counter with oscillator
4. Ordering information
Table 1.
Ordering information
Type number
Package
Temperature range
Name
Description
Version
40 C to +125 C
SO16
plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
74HC4060PW-Q100
40 C to +125 C
TSSOP16
plastic thin shrink small outline package; 16 leads; SOT403-1
body width 4.4 mm
74HC4060BQ-Q100
40 C to +125 C
DHVQFN16 plastic dual in-line compatible thermal-enhanced
SOT763-1
very thin quad flat package; no leads; 16 terminals;
body 2.5  3.5  0.85 mm
74HC4060D-Q100
74HCT4060D-Q100
74HCT4060BQ-Q100
5. Functional diagram
10
9
RTC CTC
11
12
RS
MR
Q3
7
Q4
5
Q5
4
Q6
6
Q7
14
Q8
13
Q9
15
Q11
1
Q12
2
Q13
3
001aai467
Fig 1.
Logic symbol
CTR14
!G
9
CX
10
RX
11
RCX
12
CTR14
3
7
3
5
CT
CT = 0
5
4
+
4
6
11
14
12
AND
15
11
1
6
+
14
CT
13
9
CT = 0
13
9
11
2
13
7
1
2
3
(a)
15
13
3
(b)
001aai468
Fig 2.
IEC logic symbol
74HC_HCT4060_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 2 August 2012
© NXP B.V. 2012. All rights reserved.
2 of 24
NXP Semiconductors
74HC4060-Q100; 74HCT4060-Q100
14-stage binary ripple counter with oscillator
10
9
RTC
11
12
CTC
RS
CP
MR
14-STAGE BINARY COUNTER
MR
Q4
Q3
7
5
Q5
4
Q6
6
Q7
14
Q8
13
Q9
Q11 Q12 Q13
15
1
2
3
001aai113
Fig 3.
Functional diagram
CTC
RTC
RS
FF
1
FF
4
CP
CP
MR
FF
12
CP
Q
Q
MR
FF
10
CP
Q
MR
CP
Q
MR
Q3
FF
14
Q
MR
Q9
MR
Q11
Q13
001aai114
Fig 4.
Logic diagram
74HC_HCT4060_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 2 August 2012
© NXP B.V. 2012. All rights reserved.
3 of 24
74HC4060-Q100; 74HCT4060-Q100
NXP Semiconductors
14-stage binary ripple counter with oscillator
6. Pinning information
6.1 Pinning
+&4
+&74
WHUPLQDO
LQGH[DUHD
9&&
4
+&4
+&74
9&&
4
4
4
4
4
4
4
4
4
4
4
4
4
05
4
4
56
4
57&
*1'
&7&
9&&
56
57&
4
&7&
05
*1'
4
4
DDD
7UDQVSDUHQWWRSYLHZ
DDD
(1) The die substrate is attached to this pad using
conductive die attach material. It cannot be used as
supply pin or input.
Fig 5.
Pin configuration SO16 and TSSOP16
Fig 6.
Pin configuration DHVQFN16
6.2 Pin description
Table 2.
Pin description
Symbol
Pin
Description
Q11 to Q13
1, 2, 3
counter output
Q3 to Q9
7, 5, 4, 6, 14, 13, 15
counter output
GND
8
ground (0 V)
CTC
9
external capacitor connection
RTC
10
external resistor connection
RS
11
clock input /oscillator pin
MR
12
master reset input (active HIGH)
VCC
16
supply voltage
74HC_HCT4060_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 2 August 2012
© NXP B.V. 2012. All rights reserved.
4 of 24
74HC4060-Q100; 74HCT4060-Q100
NXP Semiconductors
14-stage binary ripple counter with oscillator
7. Functional description
1
2
4
8
16
32
64
128
256
512
1024
2048
4096
8192 16384
RS
MR
Q3
Q4
Q5
Q6
Q7
Q8
Q9
Q11
Q12
Q13
001aai117
Fig 7.
Timing diagram
8. Limiting values
Table 3.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
VCC
supply voltage
IIK
input clamping current
VI < 0.5 V or VI > VCC + 0.5 V
IOK
output clamping current
VO < 0.5 V or VO > VCC + 0.5 V
IO
output current
0.5 V < VO < VCC + 0.5 V
-
25
mA
ICC
supply current
-
50
mA
IGND
ground current
50
-
mA
Tstg
storage temperature
65
+150
C
74HC_HCT4060_Q100
Product data sheet
Conditions
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 2 August 2012
Min
Max
Unit
0.5
+7
V
[1]
-
20
mA
[1]
-
20
mA
© NXP B.V. 2012. All rights reserved.
5 of 24
NXP Semiconductors
74HC4060-Q100; 74HCT4060-Q100
14-stage binary ripple counter with oscillator
Table 3.
Limiting values …continued
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Ptot
total power dissipation
Tamb = 40 C to +125 C
Min
Max
Unit
SO16 package
[2]
-
500
mW
TSSOP16 package
[3]
-
500
mW
DHVQFN16 package
[4]
-
500
mW
[1]
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2]
Ptot derates linearly with 8 mW/K above 70 C.
[3]
Ptot derates linearly with 5.5 mW/K above 60 C.
[4]
Ptot derates linearly with 4.5 mW/K above 60 C.
9. Recommended operating conditions
Table 4.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V)
Symbol Parameter
Conditions
74HC4060-Q100
74HCT4060-Q100
Unit
Min
Typ
Max
Min
Typ
Max
VCC
supply voltage
2.0
5.0
6.0
4.5
5.0
5.5
V
VI
input voltage
0
-
VCC
0
-
VCC
V
VO
output voltage
0
-
VCC
0
-
VCC
V
Tamb
ambient temperature
40
-
+125
40
-
+125
C
t/V
input transition rise and fall rate
VCC = 2.0 V
-
-
625
-
-
-
ns/V
VCC = 4.5 V
-
1.67
139
-
1.67
139
ns/V
VCC = 6.0 V
-
-
83
-
-
-
ns/V
10. Static characteristics
Table 5.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
25 C
Conditions
40 C to +85 C 40 C to +125 C Unit
Min
Typ
Max
Min
Max
Min
Max
VCC = 2.0 V
1.5
1.3
-
1.5
-
1.5
-
V
VCC = 4.5 V
3.15
2.4
-
3.15
-
3.15
-
V
VCC = 6.0 V
4.2
3.1
-
4.2
-
4.2
-
V
VCC = 2.0 V
1.7
-
-
1.7
-
1.7
-
V
VCC = 4.5 V
3.6
-
-
3.6
-
3.6
-
V
VCC = 6.0 V
4.8
-
-
4.8
-
4.8
-
V
74HC4060-Q100
VIH
HIGH-level
input voltage
MR input
RS input
74HC_HCT4060_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 2 August 2012
© NXP B.V. 2012. All rights reserved.
6 of 24
NXP Semiconductors
74HC4060-Q100; 74HCT4060-Q100
14-stage binary ripple counter with oscillator
Table 5.
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
25 C
Conditions
Min
VIL
LOW-level
input voltage
Typ
40 C to +85 C 40 C to +125 C Unit
Max
Min
Max
Min
Max
MR input
VCC = 2.0 V
-
0.8
0.5
-
0.5
-
0.5
V
VCC = 4.5 V
-
2.1
1.35
-
1.35
-
1.35
V
VCC = 6.0 V
-
2.8
1.8
-
1.8
-
1.8
V
VCC = 2.0 V
-
-
0.3
-
0.3
-
0.3
V
VCC = 4.5 V
-
-
0.9
-
0.9
-
0.9
V
VCC = 6.0 V
-
-
1.2
-
1.2
-
1.2
V
IO = 20 A; VCC = 2.0 V
1.9
2.0
-
1.9
-
1.9
-
V
IO = 20 A; VCC = 4.5 V
4.4
4.5
-
4.4
-
4.4
-
V
IO = 20 A; VCC = 6.0 V
5.9
6.0
-
5.9
-
5.9
-
V
IO = 2.6 mA; VCC = 4.5 V
3.98
-
-
3.84
-
3.7
-
V
IO = 3.3 mA; VCC = 6.0 V
5.48
-
-
5.34
-
5.2
-
V
IO = 20 A; VCC = 2.0 V
1.9
2.0
-
1.9
-
1.9
-
V
IO = 20 A; VCC = 4.5 V
4.4
4.5
-
4.4
-
4.4
-
V
IO = 20 A; VCC = 6.0 V
5.9
6.0
-
5.9
-
5.9
-
V
IO = 0.65 mA; VCC = 4.5 V
3.98
-
-
3.84
-
3.7
-
V
IO = 0.85 mA; VCC = 6.0 V
5.48
-
-
5.34
-
5.2
-
V
IO = 3.2 mA; VCC = 4.5 V
3.98
-
-
3.84
-
3.7
-
V
IO = 4.2 mA; VCC = 6.0 V
5.48
-
-
5.34
-
5.2
-
V
IO = 20 A; VCC = 2.0 V
1.9
2.0
-
1.9
-
1.9
-
V
IO = 20 A; VCC = 4.5 V
4.4
4.5
-
4.4
-
4.4
-
V
IO = 20 A; VCC = 6.0 V
5.9
6.0
-
5.9
-
5.9
-
V
IO = 4.0 mA; VCC = 4.5 V
3.98
-
-
3.84
-
3.7
-
V
IO = 5.2 mA; VCC = 6.0 V
5.48
-
-
5.34
-
5.2
-
V
RS input
VOH
HIGH-level
output
voltage
RTC output; RS = MR = GND
RTC output; RS = MR = VCC
CTC output;
RS = VIH; MR = VIL
VI = VIH or VIL;
except RTC output
VI = VIH or VIL;
except RTC and CTC outputs
74HC_HCT4060_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 2 August 2012
© NXP B.V. 2012. All rights reserved.
7 of 24
NXP Semiconductors
74HC4060-Q100; 74HCT4060-Q100
14-stage binary ripple counter with oscillator
Table 5.
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
VOL
LOW-level
output
voltage
25 C
Conditions
40 C to +85 C 40 C to +125 C Unit
Min
Typ
Max
Min
Max
Min
Max
IO = 20 A; VCC = 2.0 V
-
0
0.1
-
0.1
-
0.1
V
IO = 20 A; VCC = 4.5 V
-
0
0.1
-
0.1
-
0.1
V
IO = 20 A; VCC = 6.0 V
-
0
0.1
-
0.1
-
0.1
V
IO = 2.6 mA; VCC = 4.5 V
-
-
0.26
-
0.33
-
0.4
V
IO = 3.3 mA; VCC = 6.0 V
-
-
0.26
-
0.33
-
0.4
V
IO = 3.2 mA; VCC = 4.5 V
-
-
0.26
-
0.33
-
0.4
V
IO = 4.2 mA; VCC = 6.0 V
-
-
0.26
-
0.33
-
0.4
V
IO = 20 A; VCC = 2.0 V
-
0
0.1
-
0.1
-
0.1
V
IO = 20 A; VCC = 4.5 V
-
0
0.1
-
0.1
-
0.1
V
IO = 20 A; VCC = 6.0 V
-
0
0.1
-
0.1
-
0.1
V
IO = 4.0 mA; VCC = 4.5 V
-
-
0.26
-
0.33
-
0.4
V
IO = 5.2 mA; VCC = 6.0 V
-
-
0.26
-
0.33
-
0.4
V
RTC output; RS = VCC;
MR = GND
CTC output; RS = VIL;
MR = VIH
VI = VIH or VIL;
except RTC output
VI = VIH or VIL;
except RTC and CTC outputs
II
input leakage VI = VCC or GND; VCC = 6.0 V
current
-
-
0.1
-
1.0
-
1.0
A
ICC
supply
current
-
-
8.0
-
80
-
160
A
CI
input
capacitance
-
3.5
-
-
-
-
-
pF
VI = VCC or GND; IO = 0 A;
VCC = 6.0 V
74HCT4060-Q100
VIH
HIGH-level
input voltage
MR input;
VCC = 4.5 V to 5.5 V
[1]
2.0
-
-
2.0
-
2.0
-
V
VIL
LOW-level
input voltage
MR input;
VCC = 4.5 V to 5.5 V
[1]
-
-
0.8
-
0.8
-
0.8
V
74HC_HCT4060_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 2 August 2012
© NXP B.V. 2012. All rights reserved.
8 of 24
NXP Semiconductors
74HC4060-Q100; 74HCT4060-Q100
14-stage binary ripple counter with oscillator
Table 5.
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
VOH
HIGH-level
output
voltage
25 C
Conditions
40 C to +85 C 40 C to +125 C Unit
Min
Typ
Max
Min
Max
Min
Max
IO = 20 A; VCC = 4.5 V
4.4
4.5
IO = 0.65 mA; VCC = 4.5 V
3.98
-
-
4.4
-
4.4
-
V
-
3.84
-
3.7
-
V
IO = 20 A; VCC = 4.5 V
4.4
4.5
-
4.4
-
4.4
-
V
IO = 2.6 mA; VCC = 4.5 V
3.98
-
-
3.84
-
3.7
-
V
3.98
-
-
3.84
-
3.7
-
V
4.4
4.5
-
4.4
-
4.4
-
V
3.98
-
-
3.84
-
3.7
-
V
IO = 20 A; VCC = 4.5 V
-
0
0.1
-
0.1
-
0.1
V
IO = 2.6 mA; VCC = 4.5 V
-
-
0.26
-
0.33
-
0.4
V
-
-
0.26
-
0.33
-
0.4
V
-
0
0.1
-
0.1
-
0.1
V
-
-
0.26
-
0.33
-
0.4
V
RTC output; RS = MR = VCC
RTC output; RS = MR = GND
CTC output; RS = VIH;
MR = VIL
IO = 3.2 mA; VCC = 4.5 V
VI = VIH or VIL;
except RTC output
IO = 20 A; VCC = 4.5 V
VI = VIH or VIL;
except RTC and CTC outputs
IO = 4.0 mA; VCC = 4.5 V
LOW-level
output
voltage
VOL
RTC output; RS = VCC;
MR = GND
CTC output; RS = VIL;
MR = VIH
IO = 3.2 mA; VCC = 4.5 V
VI = VIH or VIL;
except RTC output
IO = 20 A; VCC = 4.5 V
VI = VIH or VIL;
except RTC and CTC outputs
IO = 4.0 mA; VCC = 4.5 V
II
input leakage VI = VCC or GND; VCC = 5.5 V
current
-
-
0.1
-
1.0
-
1.0
A
ICC
supply
current
VI = VCC or GND;
VCC = 5.5 V; IO = 0 A
-
-
8.0
-
80
-
160
A
ICC
additional
supply
current
per input pin;
VI = VCC  2.1 V; other inputs
at VCC or GND;
VCC = 4.5 V to 5.5 V; IO = 0 A
-
40
144
-
180
-
196
A
CI
input
capacitance
-
3.5
-
-
-
-
-
pF
[1]
For HCT4060-Q100, only input MR (pin 12) has TTL input switching levels.
74HC_HCT4060_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 2 August 2012
© NXP B.V. 2012. All rights reserved.
9 of 24
NXP Semiconductors
74HC4060-Q100; 74HCT4060-Q100
14-stage binary ripple counter with oscillator
11. Dynamic characteristics
Table 6.
Dynamic characteristics
GND = 0 V; CL = 50 pF unless otherwise specified; for test circuit see Figure 11.
Symbol Parameter
25 C
Conditions
40 C to +85 C 40 C to +125 C Unit
Min
Typ
Max
Min
Max
Min
Max
VCC = 2.0 V
-
99
300
-
375
-
450
ns
VCC = 4.5 V
-
36
60
-
75
-
90
ns
VCC = 5.0 V; CL = 15 pF
-
31
-
-
-
-
-
ns
VCC = 6.0 V
-
29
51
-
64
-
77
ns
-
22
80
-
100
-
120
ns
VCC = 4.5 V
-
8
16
-
20
-
24
ns
VCC = 5.0 V; CL = 15 pF
-
6
-
-
-
-
-
ns
VCC = 6.0 V
-
6
14
-
17
-
20
ns
74HC4060-Q100
tpd
propagation
delay
[1]
RS to Q3; see Figure 8
Qn to Qn+1; see Figure 9
[2]
VCC = 2.0 V
tPHL
HIGH to LOW MR to Qn; see Figure 10
propagation
VCC = 2.0 V
delay
VCC = 4.5 V
-
55
175
-
220
-
265
ns
-
20
35
-
44
-
53
ns
-
17
-
-
-
-
-
ns
-
16
30
-
37
-
45
ns
VCC = 2.0 V
-
19
75
-
95
-
110
ns
VCC = 4.5 V
-
7
15
-
19
-
22
ns
VCC = 6.0 V
-
6
13
-
16
-
19
ns
VCC = 2.0 V
80
17
-
100
-
120
-
ns
VCC = 4.5 V
16
6
-
20
-
24
-
ns
VCC = 6.0 V
14
5
-
17
-
20
-
ns
VCC = 2.0 V
80
25
-
100
-
120
-
ns
VCC = 4.5 V
16
9
-
20
-
24
-
ns
VCC = 6.0 V
14
7
-
17
-
20
-
ns
VCC = 2.0 V
100
28
-
125
-
150
-
ns
VCC = 4.5 V
20
10
-
25
-
30
-
ns
VCC = 6.0 V
17
8
-
21
-
26
-
ns
VCC = 5.0 V; CL = 15 pF
VCC = 6.0 V
tt
tW
[3]
transition time Qn; see Figure 8
pulse width
RS (HIGH or LOW);
see Figure 8
MR (HIGH); see Figure 10
trec
recovery time
74HC_HCT4060_Q100
Product data sheet
MR to RS; see Figure 10
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© NXP B.V. 2012. All rights reserved.
10 of 24
NXP Semiconductors
74HC4060-Q100; 74HCT4060-Q100
14-stage binary ripple counter with oscillator
Table 6.
Dynamic characteristics …continued
GND = 0 V; CL = 50 pF unless otherwise specified; for test circuit see Figure 11.
Symbol Parameter
25 C
Conditions
Min
fmax
maximum
frequency
Min
Max
Min
Max
VCC = 2.0 V
6
26
-
4.8
-
4
-
MHz
VCC = 4.5 V
30
80
-
24
-
20
-
MHz
-
87
-
-
-
-
-
MHz
35
95
-
28
-
24
-
MHz
-
40
-
-
-
-
-
pF
-
33
66
-
83
-
99
ns
-
31
-
-
-
-
-
ns
VCC = 4.5 V
-
8
16
-
20
-
24
ns
VCC = 5.0 V; CL = 15 pF
-
6
-
-
-
-
-
ns
-
21
44
-
55
-
66
ns
-
18
-
-
-
-
-
ns
-
7
15
-
19
-
22
ns
16
6
-
20
-
24
-
ns
16
6
-
20
-
24
-
ns
26
13
-
33
-
39
-
ns
30
80
-
24
-
20
-
MHz
-
88
-
-
-
-
-
MHz
VCC = 6.0 V
power
dissipation
capacitance
Max
RS; see Figure 8
VCC = 5.0 V; CL = 15 pF
CPD
Typ
40 C to +85 C 40 C to +125 C Unit
VI = GND to VCC;
VCC = 5 V; fi = 1 MHz
[4]
RS to Q3; see Figure 8
[1]
74HCT4060-Q100
tpd
propagation
delay
VCC = 4.5 V
VCC = 5.0 V; CL = 15 pF
Qn to Qn+1; see Figure 9
tPHL
[2]
HIGH to LOW MR to Qn; see Figure 10
propagation
VCC = 4.5 V
delay
VCC = 5.0 V; CL = 15 pF
tt
[3]
transition time Qn; see Figure 8
VCC = 4.5 V
tW
pulse width
RS (HIGH or LOW);
see Figure 8
VCC = 4.5 V
MR (HIGH); see Figure 10
VCC = 4.5 V
trec
recovery time
MR to RS; see Figure 10
VCC = 4.5 V
fmax
maximum
frequency
RS; see Figure 8
VCC = 4.5 V
VCC = 5.0 V; CL = 15 pF
74HC_HCT4060_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 2 August 2012
© NXP B.V. 2012. All rights reserved.
11 of 24
74HC4060-Q100; 74HCT4060-Q100
NXP Semiconductors
14-stage binary ripple counter with oscillator
Table 6.
Dynamic characteristics …continued
GND = 0 V; CL = 50 pF unless otherwise specified; for test circuit see Figure 11.
25 C
Symbol Parameter
Conditions
CPD
VI = GND to VCC  1.5 V;
VCC = 5 V; fi = 1 MHz
power
dissipation
capacitance
40 C to +85 C 40 C to +125 C Unit
Min
Typ
Max
Min
Max
Min
Max
-
40
-
-
-
-
-
[4]
[1]
tpd is the same as tPHL and tPLH.
[2]
Qn+1 is the next Qn output.
[3]
tt is the same as tTHL and tTLH.
[4]
CPD is used to determine the dynamic power dissipation (PD in W):
pF
PD = CPD  VCC2  fi  N + (CL  VCC2  fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL  VCC2  fo) = sum of outputs.
12. Waveforms
1/fmax
VI
RS input
VM
GND
tW
tPHL
VOH
tPLH
90 %
90 %
VM
Q3 output
VOL
10 %
10 %
tTHL
tTLH
001aai118
Measurement points are given in Table 7.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 8.
Waveforms showing the clock (RS) to output (Q3) propagation delays, the clock pulse width, the output
transition times and the maximum clock frequency
74HC_HCT4060_Q100
Product data sheet
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Rev. 1 — 2 August 2012
© NXP B.V. 2012. All rights reserved.
12 of 24
74HC4060-Q100; 74HCT4060-Q100
NXP Semiconductors
14-stage binary ripple counter with oscillator
VOH
Qn output
VM
VOL
tPLH
tPHL
VOH
VM
Qn+1 output
VOL
001aai120
Measurement points are given in Table 7.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 9.
Waveforms showing the output Qn to output Qn+1 propagation delays
VI
MR input
VM
GND
TW
trec
VI
RS input
VM
GND
tPHL
VOH
VM
Qn output
VOL
001aai119
Measurement points are given in Table 7.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 10. Waveforms showing the master reset (MR) pulse width, the master reset to output (Qn) propagation
delays and the master reset to clock (RS) recovery time
Table 7.
Measurement points
Type
Input
Output
VM
VM
74HC4060-Q100
0.5  VCC
0.5  VCC
74HCT4060-Q100
1.3 V
1.3 V
74HC_HCT4060_Q100
Product data sheet
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Rev. 1 — 2 August 2012
© NXP B.V. 2012. All rights reserved.
13 of 24
NXP Semiconductors
74HC4060-Q100; 74HCT4060-Q100
14-stage binary ripple counter with oscillator
VI
negative
pulse
tW
90 %
VM
VM
10 %
GND
tr
tf
tr
tf
VI
90 %
positive
pulse
GND
VM
VM
10 %
tW
VCC
G
VI
VO
DUT
RT
CL
001aah768
Test data is given in Table 8.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
Fig 11. Test circuit for measuring switching times
Table 8.
Test data
Type
Input
VI
74HC4060-Q100
Load
tr, tf
CL
VCC
6 ns
15 pF, 50 pF
74HCT4060-Q100 3 V
6 ns
15 pF, 50 pF
74HC_HCT4060_Q100
Product data sheet
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Rev. 1 — 2 August 2012
© NXP B.V. 2012. All rights reserved.
14 of 24
NXP Semiconductors
74HC4060-Q100; 74HCT4060-Q100
14-stage binary ripple counter with oscillator
13. RC oscillator
13.1 Timing component limitations
The oscillator frequency is mainly determined by RtCt, provided R2  2Rt and
R2C2 << RtCt. The function of R2 is to minimize the influence of the forward voltage
across the input protection diodes on the frequency. The stray capacitance C2 should be
kept as small as possible. In consideration of accuracy, Ct must be larger than the
inherent stray capacitance. Rt must be larger than the ON resistance in series with it,
which typically is 280  at VCC = 2.0 V, 130  at VCC = 4.5 V and 100  at VCC = 6.0 V.
+&4
+&74
05IURPORJLF
56
&
5
57&
&7&
5W
&W
DDD
1
2.5  Rt  C t
Typical formula for oscillator frequency: f osc = ------------------------------
Fig 12. Example of an RC oscillator
The recommended values for these components to maintain agreement with the typical
oscillation formula are:
Ct > 50 pF, up to any practical value and 10 k < Rt < 1 M.
In order to avoid start-up problems, Rt  1 k.
13.2 Typical crystal oscillator circuit
In Figure 13, R2 is the power limiting resistor. For starting and maintaining oscillation, a
minimum transconductance is necessary, so R2 must not be too large. A practical value
for R2 is 2.2 k.
74HC_HCT4060_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 2 August 2012
© NXP B.V. 2012. All rights reserved.
15 of 24
74HC4060-Q100; 74HCT4060-Q100
NXP Semiconductors
14-stage binary ripple counter with oscillator
05IURPORJLF
+&4
+&74
Rbias
560 kΩ
VDD
56
5ELDV
100 μF
0.47 pF
57&
VI
(fi = 1 kHz)
N WR0
input
output
A
IO
GND
5
N
001aai123
gfs = IO / VI at VO is constant; MR = LOW.
&
S)WRS)
&
S)
See also Figure 15.
DDD
Fig 13. External component connection for a crystal
oscillator
Fig 14. Test set-up for measuring forward
transconductance
001aai124
14
(1)
gfs
(mA/V)
(2)
10
(3)
6
2
0
2
4
6
VCC (V)
Tamb = 25 C.
(1) Maximum.
(2) Typical.
(3) Minimum.
Fig 15. Typical forward transconductance as function of the supply voltage
74HC_HCT4060_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 2 August 2012
© NXP B.V. 2012. All rights reserved.
16 of 24
74HC4060-Q100; 74HCT4060-Q100
NXP Semiconductors
14-stage binary ripple counter with oscillator
001aai125
105
fosc
(Hz)
001aai127
105
fosc
(Hz)
Rt
104
104
103
103
102
102
Ct
10
103
104
105
106
10
10−4
10−3
10−2
10−1
Rt (Ω)
Ct (μF)
VCC = 2.0 V to 6.0 V; Tamb = 25 C.
VCC = 2.0 V to 6.0 V; Tamb = 25 C.
For Rt curve: Ct = 1 nF; R2 = 2  Rt.
For Ct curve: Rt = 100 k; R2 = 200 k.
Fig 16. RC oscillator frequency as a function of Rt
74HC_HCT4060_Q100
Product data sheet
Fig 17. RC oscillator frequency as a function of Ct
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 2 August 2012
© NXP B.V. 2012. All rights reserved.
17 of 24
74HC4060-Q100; 74HCT4060-Q100
NXP Semiconductors
14-stage binary ripple counter with oscillator
14. Package outline
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
D
E
A
X
c
y
HE
v M A
Z
16
9
Q
A2
A
(A 3)
A1
pin 1 index
θ
Lp
1
L
8
e
0
detail X
w M
bp
2.5
5 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HE
L
Lp
Q
v
w
y
Z (1)
mm
1.75
0.25
0.10
1.45
1.25
0.25
0.49
0.36
0.25
0.19
10.0
9.8
4.0
3.8
1.27
6.2
5.8
1.05
1.0
0.4
0.7
0.6
0.25
0.25
0.1
0.7
0.3
0.01
0.019 0.0100 0.39
0.014 0.0075 0.38
0.039
0.016
0.028
0.020
inches
0.010 0.057
0.069
0.004 0.049
0.16
0.15
0.05
0.244
0.041
0.228
0.01
0.01
0.028
0.004
0.012
θ
8o
o
0
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT109-1
076E07
MS-012
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
Fig 18. Package outline SOT109-1 (SO16)
74HC_HCT4060_Q100
Product data sheet
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Rev. 1 — 2 August 2012
© NXP B.V. 2012. All rights reserved.
18 of 24
74HC4060-Q100; 74HCT4060-Q100
NXP Semiconductors
14-stage binary ripple counter with oscillator
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
SOT403-1
E
D
A
X
c
y
HE
v M A
Z
9
16
Q
(A 3)
A2
A
A1
pin 1 index
θ
Lp
L
1
8
e
detail X
w M
bp
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (2)
e
HE
L
Lp
Q
v
w
y
Z (1)
θ
mm
1.1
0.15
0.05
0.95
0.80
0.25
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
0.65
6.6
6.2
1
0.75
0.50
0.4
0.3
0.2
0.13
0.1
0.40
0.06
8o
o
0
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT403-1
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-18
MO-153
Fig 19. Package outline SOT403-1 (TSSOP16)
74HC_HCT4060_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 2 August 2012
© NXP B.V. 2012. All rights reserved.
19 of 24
74HC4060-Q100; 74HCT4060-Q100
NXP Semiconductors
14-stage binary ripple counter with oscillator
DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
SOT763-1
16 terminals; body 2.5 x 3.5 x 0.85 mm
A
B
D
A
A1
E
c
detail X
terminal 1
index area
terminal 1
index area
C
e1
e
2
7
y
y1 C
v M C A B
w M C
b
L
1
8
Eh
e
16
9
15
10
Dh
X
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
mm
A(1)
max.
A1
b
1
0.05
0.00
0.30
0.18
c
D (1)
Dh
E (1)
Eh
0.2
3.6
3.4
2.15
1.85
2.6
2.4
1.15
0.85
e
0.5
e1
L
v
w
y
y1
2.5
0.5
0.3
0.1
0.05
0.05
0.1
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
JEITA
SOT763-1
---
MO-241
---
EUROPEAN
PROJECTION
ISSUE DATE
02-10-17
03-01-27
Fig 20. Package outline SOT763-1 (DHVQFN16)
74HC_HCT4060_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 2 August 2012
© NXP B.V. 2012. All rights reserved.
20 of 24
74HC4060-Q100; 74HCT4060-Q100
NXP Semiconductors
14-stage binary ripple counter with oscillator
15. Abbreviations
Table 9.
Abbreviations
Acronym
Description
CMOS
Complementary Metal-Oxide Semiconductor
DUT
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
MM
Machine Model
TTL
Transistor-Transistor Logic
MIL
Military
16. Revision history
Table 10.
Revision history
Document ID
Release date
Data sheet status
Change notice Supersedes
74HC_HCT4060_Q100 v.1
20120802
Product data sheet
-
74HC_HCT4060_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 2 August 2012
-
© NXP B.V. 2012. All rights reserved.
21 of 24
NXP Semiconductors
74HC4060-Q100; 74HCT4060-Q100
14-stage binary ripple counter with oscillator
17. Legal information
17.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
17.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
17.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
74HC_HCT4060_Q100
Product data sheet
Suitability for use in automotive applications — This NXP
Semiconductors product has been qualified for use in automotive
applications. Unless otherwise agreed in writing, the product is not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 2 August 2012
© NXP B.V. 2012. All rights reserved.
22 of 24
NXP Semiconductors
74HC4060-Q100; 74HCT4060-Q100
14-stage binary ripple counter with oscillator
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
17.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
18. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
74HC_HCT4060_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 2 August 2012
© NXP B.V. 2012. All rights reserved.
23 of 24
NXP Semiconductors
74HC4060-Q100; 74HCT4060-Q100
14-stage binary ripple counter with oscillator
19. Contents
1
2
3
4
5
6
6.1
6.2
7
8
9
10
11
12
13
13.1
13.2
14
15
16
17
17.1
17.2
17.3
17.4
18
19
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 4
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
Functional description . . . . . . . . . . . . . . . . . . . 5
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5
Recommended operating conditions. . . . . . . . 6
Static characteristics. . . . . . . . . . . . . . . . . . . . . 6
Dynamic characteristics . . . . . . . . . . . . . . . . . 10
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
RC oscillator. . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Timing component limitations . . . . . . . . . . . . . 15
Typical crystal oscillator circuit . . . . . . . . . . . . 15
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 18
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 21
Legal information. . . . . . . . . . . . . . . . . . . . . . . 22
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 22
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Contact information. . . . . . . . . . . . . . . . . . . . . 23
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2012.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 2 August 2012
Document identifier: 74HC_HCT4060_Q100