UM10455 User manual for the BGU7003 100MHz LNA evaluation board Rev. 1.1 — 14 December 2011 User manual Document information Info Content Keywords 100MHz LNA, BGU7003. Application Board ordering info: Abstract This document explains the BGU7003 100MHz LNA evaluation Board. Ordering info Board-number: OM7800/BGU7003/100,598 12NC: 934066069598 Contact information For more information, please visit: http://www.nxp.com UM10455 NXP Semiconductors BGU7003 100MHz LNA EVB Revision history Rev Date Description 1.1 1 Board order numbers added Initial document 20111214 20110729 Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] UM10455 User manual All information provided in this document is subject to legal disclaimers. Rev. 1.1 — 14 December 2011 © NXP B.V. 2011. All rights reserved. 2 of 14 UM10455 NXP Semiconductors BGU7003 100MHz LNA EVB 1. Introduction NXP Semiconductors’ BGU7003 is wideband Silicon Germanium Amplifier MMICs for high speed, low noise applications. It can be used mainly for LNA applications up to 6 GHz like GPS, Satellite radio, Cordless Phone. The BGU7003 contains one RF stage and internal bias that is temperature stabilized. It also contains a power down function to shutdown the amplifier by means of a logic signal on the enable pin. The BGU7003 is ideal for use in portable electronic devices, such as mobile phones, Personal Digital Assistants (PDAs), Personal Navigation Devices (PNDs) etc. The 100MHz LNA BGU7003 Universal Evaluation Board (EVB) see Fig 1 is designed to evaluate the performance of the BGU7003 applied as a 100MHz LNA. In this document, the application diagram, board layout, bill of material, and some typical results are given. Fig 1. BGU7003 100MHz LNA evaluation board. UM10455 User manual All information provided in this document is subject to legal disclaimers. Rev. 1.1 — 14 December 2011 © NXP B.V. 2011. All rights reserved. 3 of 14 UM10455 NXP Semiconductors BGU7003 100MHz LNA EVB 2. General Description NXP Semiconductors’ BGU7003 consist of a wideband Silicon Germanium SiGe transistor with internal bias circuit. This bias circuit is temperature stabilized, which keeps the current constant over temperature. The bias current for the RF stage can be set via an external bias resistor enabling flexibility in choosing the bias current. The BGU7003 is also supplied with an enable function that allows it to be controlled with a logic signal. This disable mode it only consumes less than 0.4 µA. In Fig 2 the simplified internal circuit of the BGU7003 is given. 1 Rb 6 Bias AND Enable Circuit RFin GND 2 5 3 4 Vcc Enable RFout Fig 2. Simplified internal circuit of the BGU7003 The BGU7003 is not internally matched so for both input and output a matching circuit needs to be designed. The fact that no internal matching is available makes the product suitable for different application/frequency areas. In the next paragraphs the BGU7003 applied as a 100MHz LNA is described. 3. Application Board The BGU7003 Universal Evaluation Board 100MHz LNA simplifies the evaluation of the BGU7003 wideband amplifier MMIC, for the 100MHz application area. The BGU7003 Universal Evaluation Board enables testing of the device performance and requires no additional support circuitry. The board is fully assembled with the BGU7003 IC, including input- and output matching, to optimize the performance. The board is supplied with two SMA connectors for input and output connection to RF test equipment. UM10455 User manual All information provided in this document is subject to legal disclaimers. Rev. 1.1 — 14 December 2011 © NXP B.V. 2011. All rights reserved. 4 of 14 UM10455 NXP Semiconductors BGU7003 100MHz LNA EVB 3.1 Application Circuit The circuit diagram of the BGU7003 Universal Evaluation Board is given in Fig 3. Fig 3. Circuit diagram of the BGU7003 Universal Evaluation Board 3.2 Board Layout Fig 4. Printed circuit board lay-out of the BGU7003 Universal Evaluation Board. UM10455 User manual All information provided in this document is subject to legal disclaimers. Rev. 1.1 — 14 December 2011 © NXP B.V. 2011. All rights reserved. 5 of 14 UM10455 NXP Semiconductors BGU7003 100MHz LNA EVB 3.3 PCB layout A good PCB Layout is an essential part of an RF circuit design. The BGU7003 Universal Evaluation Board can serve as a guideline for laying out a board using the BGU7003. Use controlled impedance lines for all high frequency inputs and outputs. Bypass V CC with decoupling capacitors, preferable located as close as possible to the device. For long bias lines it may be necessary to add decoupling capacitors along the line further away from the device. Proper grounding the GND pin is also essential for good RF performance. Either connect the GND pin directly to the ground plane or through vias, or do both. The material that has been used for the EVB is FR4 using the stack shown in Fig 5. Material supplier is ISOLA DURAVER; r= 4.6-4.9: =0.02. 20um Cu 0.2mm FR4 Critical 20um Cu 0.9mm FR4 only for mechanical rigidity of PCB 20um Cu Fig 5. Stack of the PCB material. 3.4 Bill of materials Table 1: BOM of the BGU7003 100MHz LNA evaluation board. Designator Description Footprint Value Supplier Name/type Comment Z1 L 0402 82nH muRata / LQW15 (wire wound) Input Match Z2 C 0402 16pF Input Match Z3 C 0402 470pF DC-Block Z4 C 0402 470pF DC-Block Z5 R 0402 1.8kΩ Z6 n.m. 0402 - Z7 L 0402 270nH Z8 C 0402 27pF Z9 R 0402 100Ω Z10 C 0402 470pF Z11 R 0402 0Ω C1 C 0402 470pF Decoupling C2 C 0402 470pF Decoupling R1 R 0402 3k9Ω Various Bias setting. R2 R 0402 0Ω Various Short B3 MMIC BGU7003 NXP - UM10455 User manual Various RF Feedback - muRata / LQG15 Output Match Output Match Various Output Match / Stability DC-Block Various All information provided in this document is subject to legal disclaimers. Rev. 1.1 — 14 December 2011 Short © NXP B.V. 2011. All rights reserved. 6 of 14 UM10455 NXP Semiconductors BGU7003 100MHz LNA EVB 4. Required Equipment In order to measure the BGU7003 Universal Evaluation Board the following is necessary. DC Power Supply up to 30 mA at 2 to 2.8 V (up to 15V for bias control) An RF signal generator capable of generating an RF signal at the operating frequency of 1GHz. An RF spectrum analyzer that covers at least the operating frequency of 1GHz as well as a few of the harmonics, so up to 6 GHz should be sufficient. ”Optional” a version with the capability of measuring noise figure is convenient. Amp meter to measure the supply current (optional). A network analyzer for measuring gain, return loss and reverse Isolation. Noise figure analyzer and noise source. Proper RF cables 5. Connections and Set_up The BGU7003 Universal Evaluation Board 100MHz LNA is fully assembled and tested. Please follow the steps below for a step-by-step guide to operate the BGU7003 Universal Evaluation Board and testing the device functions. 1. Connect the DC power supply set to 2.8V to the VCC, VRb Ven and GND terminals. Set the power supply to the desired supply voltage, between 2.2 and 2.85V, but never exceed 3.0V as it might damage the BGU7003. 2. Connect the RF signal generator and the Spectrum Analyzer; to the RF input and the RF output of the BGU7003 Universal Evaluation Board respectively. Do not turn on the RF output of the signal generator yet, set it to -40dBm output power at 100MHz, set the spectrum analyzer on 100MHz center frequency and a reference level of 0dBm. 3. Turn on the DC power supply and it should read approximately 5mA. 4. Enable the RF output of the generator; the spectrum analyzer displays a tone of 100MHz at around –26 dBm. 5. In order to evaluate the board on different bias currents through RF stage of the MMIC the Voltage on Rb (VRb) can be connected to a separate power supply. This is enabling the control of the bias current. 6. To evaluate the enable function the Ven terminal of the board can also be connected to a separate DC power supply that either gives a voltage >0.6V (amplifier on) or <0.5V amplifier off. 7. Instead of using a signal generator and spectrum analyzer one can also use a network analyzer in order to measure Gain as well as in- and output return loss. 8. For Noise figure evaluation, either a noise-figure analyzer or a spectrum analyzer with noise option can be used. The use of a 5 dB noise source, like the Agilent 364A is recommended. When measuring the noise figure of the evaluation board, any kind of adaptors, cables etc between the noise source and the BGU7003 Universal Evaluation Board should be avoided, since this affects the noise performance. UM10455 User manual All information provided in this document is subject to legal disclaimers. Rev. 1.1 — 14 December 2011 © NXP B.V. 2011. All rights reserved. 7 of 14 UM10455 NXP Semiconductors BGU7003 100MHz LNA EVB Fig 6. BGU7003 Universal Evaluation Board 100MHz LNA including its connections UM10455 User manual All information provided in this document is subject to legal disclaimers. Rev. 1.1 — 14 December 2011 © NXP B.V. 2011. All rights reserved. 8 of 14 UM10455 NXP Semiconductors BGU7003 100MHz LNA EVB 6. Typical EVB Results The tables and figures in this paragraph show the results measured for a numbers of EVB’s. Table 2: typical results measured on the Evaluation Boards. Operating Frequency is 100MHz; Vcc and Ven = 2.8V (Icc~5mA) Temp = 25 C, unless otherwise specified. Parameter Symbol BGU7003 EVB Unit Comment Noise Figure NF 1.6 dB [1] Power Gain Gp 20.5 dB [2] Input Return Loss IRL 15 dB [2] Output Return Loss ORL 19 dB [2] 29 dB [2] OP1dB 0 dBm OIP3 16 dBm T on/off 0.7 µs Reverse Isolation Output 1dB Gain Compression Output third order intercept point on/off switching time intercept point [3] [1] The NF and Gain figures are being measured at the SMA connectors of the EVB, so the losses of the connectors and the PCB are not subtracted. If you do so the NF will improve approximately 0.1 dB. [2] Pin=-45dBm [3] 2-Tone test with F1=100MHz, F2=101MHz (Spacing 1MHz). Highest spurious used for calculations. The figures on the next page give measured S-Parameter results of a typical BGU7003 100MHz LNA made with the Universal Board. This 100MHz LNA was designed with a trade-off between optimal input-match and lowest NF. UM10455 User manual All information provided in this document is subject to legal disclaimers. Rev. 1.1 — 14 December 2011 © NXP B.V. 2011. All rights reserved. 9 of 14 UM10455 NXP Semiconductors BGU7003 100MHz LNA EVB S12(dB) S21 (dB) 0 25 -5 -10 15 10 S21 (dB) S12 [dB] S21 [dB] 20 -15 -20 S12(dB) -25 -30 5 -35 0 5.0E+07 7.5E+07 1.0E+08 1.3E+08 -40 1.5E+08 5.0E+07 7.5E+07 Freq [Hz] 1.0E+08 1.3E+08 1.5E+08 Freq [Hz] Vsup=2.8V / ~5mA. Vsup=2.8V / ~5mA. Fig 7. BGU7003 UNI EVB 100MHz LNA: S21 Fig 8. BGU7003 UNI EVB 100MHz LNA: S12 S22 (dB) S11 (dB) 0 0 -5 -5 -15 S11 (dB) S22 [dB] S11 [dB] -10 -10 S22 (dB) -20 -15 -25 -30 5.0E+07 7.5E+07 1.0E+08 1.3E+08 -20 1.5E+08 5.00E+07 7.50E+07 Freq [Hz] 1.00E+08 1.25E+08 1.50E+08 Freq [Hz] Vsup=2.8V / ~5mA. Vsup=2.8V / ~5mA. Fig 9. BGU7003 UNI EVB 100MHz LNA: S11 Fig 10. BGU7003 UNI EVB 100MHz LNA: S22 K-f actor 100000 10000 K-factor 1000 100 K 10 1 0.1 1.0E+09 2.0E+09 3.0E+09 4.0E+09 5.0E+09 6.0E+09 7.0E+09 Freq [Hz] Vsup=2.8V / ~5mA. Fig 11. BGU7003 UNI EVB 100MHz LNA: K-Factor UM10455 User manual All information provided in this document is subject to legal disclaimers. Rev. 1.1 — 14 December 2011 © NXP B.V. 2011. All rights reserved. 10 of 14 UM10455 NXP Semiconductors BGU7003 100MHz LNA EVB 7. Legal information 7.1 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. 7.2 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or UM10455 User manual customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Evaluation products — This product is provided on an “as is” and “with all faults” basis for evaluation purposes only. NXP Semiconductors, its affiliates and their suppliers expressly disclaim all warranties, whether express, implied or statutory, including but not limited to the implied warranties of noninfringement, merchantability and fitness for a particular purpose. The entire risk as to the quality, or arising out of the use or performance, of this product remains with customer. In no event shall NXP Semiconductors, its affiliates or their suppliers be liable to customer for any special, indirect, consequential, punitive or incidental damages (including without limitation damages for loss of business, business interruption, loss of use, loss of data or information, and the like) arising out the use of or inability to use the product, whether or not based on tort (including negligence), strict liability, breach of contract, breach of warranty or any other theory, even if advised of the possibility of such damages. Notwithstanding any damages that customer might incur for any reason whatsoever (including without limitation, all damages referenced above and all direct or general damages), the entire liability of NXP Semiconductors, its affiliates and their suppliers and customer’s exclusive remedy for all of the foregoing shall be limited to actual damages incurred by customer based on reasonable reliance up to the greater of the amount actually paid by customer for the product or five dollars (US$5.00). The foregoing limitations, exclusions and disclaimers shall apply to the maximum extent permitted by applicable law, even if any remedy fails of its essential purpose. 7.3 Trademarks Notice: All referenced brands, product names, service names and trademarks are property of their respective owners. All information provided in this document is subject to legal disclaimers. Rev. 1.1 — 14 December 2011 © NXP B.V. 2011. All rights reserved. 11 of 14 UM10455 NXP Semiconductors BGU7003 100MHz LNA EVB 8. List of figures Fig 1. Fig 2. Fig 3. Fig 4. Fig 5. Fig 6. Fig 7. Fig 8. Fig 9. Fig 10. Fig 11. BGU7003 100MHz LNA evaluation board......... 3 Simplified internal circuit of the BGU7003 ......... 4 Circuit diagram of the BGU7003 Universal Evaluation Board............................................... 5 Printed circuit board lay-out of the BGU7003 Universal Evaluation Board. .............................. 5 Stack of the PCB material. ................................ 6 BGU7003 Universal Evaluation Board 100MHz LNA including its connections ........................... 8 BGU7003 UNI EVB 100MHz LNA: S21............ 10 BGU7003 UNI EVB 100MHz LNA: S12............ 10 BGU7003 UNI EVB 100MHz LNA: S11............ 10 BGU7003 UNI EVB 100MHz LNA: S22............ 10 BGU7003 UNI EVB 100MHz LNA: K-Factor ... 10 UM10455 User manual All information provided in this document is subject to legal disclaimers. Rev. 1.1 — 14 December 2011 © NXP B.V. 2011. All rights reserved. 12 of 14 UM10455 NXP Semiconductors BGU7003 100MHz LNA EVB 9. List of tables Table 1: Table 2: BOM of the BGU7003 100MHz LNA evaluation board. ................................................................ 6 typical results measured on the Evaluation Boards............................................................... 9 UM10455 User manual All information provided in this document is subject to legal disclaimers. Rev. 1.1 — 14 December 2011 © NXP B.V. 2011. All rights reserved. 13 of 14 UM10455 NXP Semiconductors BGU7003 100MHz LNA EVB 10. Contents 1. 2. 3. 3.1 3.2 3.3 3.4 4. 5. 6. 7. 7.1 7.2 7.3 8. 9. 10. Introduction ......................................................... 3 General Description ............................................ 4 Application Board ............................................... 4 Application Circuit .............................................. 5 Board Layout ...................................................... 5 PCB layout ......................................................... 6 Bill of materials ................................................... 6 Required Equipment ........................................... 7 Connections and Set_up .................................... 7 Typical EVB Results ............................................ 9 Legal information .............................................. 11 Definitions ........................................................ 11 Disclaimers....................................................... 11 Trademarks ...................................................... 11 List of figures..................................................... 12 List of tables ...................................................... 13 Contents ............................................................. 14 Please be aware that important notices concerning this document and the product(s) described herein, have been included in the section 'Legal information'. © NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 14 December 2011 Document identifier: UM10455