UESD16V8S4C - Union Semiconductor

UESD16V8S4C
Quad Line 12V ESD Protection Diode Array
UESD16V8S4C SOT23-6
General Description
The UESD16V8S4C of TVS diode array is designed to protect sensitive electronics from damage
or latch-up due to ESD, for high voltage applications where board space is at a premium. It is
unidirectional device and may be used on lines where the signal polarities are above ground, each
device will protect up to four lines.
TVS diodes are solid-state devices feature large cross-sectional area junctions for conducting high
transient currents, specifically for transient suppression. It offers desirable characteristics for
board level protection including fast response time, low operating, low clamping voltage, and no
device degradation.
The UESD16V8S4C may be used to meet the immunity requirements of IEC 61000-4-2, level 4.
The small package makes them ideal for use in portable electronics such as cell phones, PDA’s,
notebook computers, and digital cameras.
Applications
Features
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Cellular Handsets & Accessories
Telecom Equipment
Notebooks & Handhelds
Portable Instrumentation
Industrial PC
Industrial Automation
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Pin Configurations
Transient Protection for Data & Power Lines
to IEC 61000-4-2 (ESD) ±15kV (Air), ±8kV
(Contact)
Protect Four I/O Lines
Ultra-Small SOT23-6 Package
Working Voltages: 12V
Low Leakage Current
Low Operating and Clamping Voltage
Solid-State Silicon Avalanche Technology
Top View
M: Month Code
UESD16V8S4C
SOT23-6
Ordering Information
Part Number
Working
Voltage
Packaging
Type
Channel
Marking
Code
Shipping Qty
UESD16V8S4C
12.0V
SOT23-6
4
UCJ
3000pcs/7 Inch
Tape & Reel
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UESD16V8S4C
Absolute Maximum Ratings
RATING
SYMBOL
VALUE
UNITS
Peak Pulse Power (tp = 8/20μs)
PPK
140
Watts
Maximum Peak Pulse Current (t=8/20μs)
IPP
5.9
Amps
TL
TJ
TSTG
260 (10 sec.)
-55 to +125
-55 to +150
°C
°C
°C
Lead Soldering Temperature
Operating Temperature
Storage Temperature
Symbol Definition
PARAMETER
Maximum Reverse Peak Pulse Current
Clamping Voltage @ Ipp
Working Peak Reverse Voltage
Maximum Reverse Leakage Current @ VRWM
Breakdown Voltage @ It
Test Current
Forward Current
Forward Voltage @ IF
Peak Power Dissipation
Max. Capacitance @ VR = 0V, f = 1MHz
SYMBOL
IPP
VC
VRWM
IR
VBR
It
IF
VF
PPK
C
Electrical Characteristics
(T=25°C, Device for 12.0V Reverse Stand-off Voltage)
PARAMETER
Reverse Stand-Off
Voltage
Reverse Breakdown
Voltage
Reverse Leakage
Current
SYMBOL
CONDITIONS
MIN TYP
VRWM
16
MAX
UNIT
12
V
18
V
VBR
It = 1mA
IR
VRWM = 12V, T=25°C
0.5
μA
Clamping Voltage
VC
23
V
Junction Capacitance
CJ
IPP =5.9A, tp = 8/20μs
VR = 0V, f = 1MHz
30
pF
20
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UESD16V8S4C
Applications Information
UESD16V8S4C ESD protection diode is designed to protect quad data, I/O, or power supply line.
The device is unidirectional and may be used on lines where the signal polarity is above ground.
The cathode should be placed towards the line that is to be protected.
Device Connection for Protection of Quad Data Lines
The Quad TVS Diode Array is designed to protect up to four unidirectional data lines. The device
is connected as follows:
Unidirectional protection of four I/O lines is achieved by connecting pins 1,3,4 and 6 to the data
lines. Pin 2 is connected to ground. The ground connection should be made directly to the ground
plane for best results. The path length is kept as short as possible to reduce the effects of parasitic
inductance in the board traces.
Circuit Board Layout Recommendations for Suppression of ESD
Good circuit board layout is critical for the suppression of ESD induced transients. The following
guidelines are recommended:
Place the TVS near the input terminals or connectors to restrict transient coupling.
Minimize the path length between the TVS and the protected line.
Minimize all conductive loops including power and ground loops.
The ESD transient return path to ground should be kept as short as possible.
Never run critical signals near board edges.
Use ground planes whenever possible. For multilayer printed-circuit boards, use ground vias.
Keep parallel signal paths to a minimum.
Avoid running protection conductors in parallel with unprotected conductor.
Minimize all printed-circuit board conductive loops including power and ground loops.
Avoid using shared transient return paths to a common ground point.
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UESD16V8S4C
Package Information
UESD16V8S4C SOT23-6
Outline Drawing
D
θ
b
5
4
1
2
3
L
L1
E
E1
6
e
c
20
e1
Top View
A
A2
A1
End View
Side View
DIMENSIONS
MILLIMETERS
Symbol
Min
Max
A
1.050
1.250
A1
0.000
0.100
A2
1.050
1.150
b
0.300
0.500
c
0.100
0.200
D
2.820
3.020
E
1.500
1.700
E1
2.650
2.950
e
0.950REF
e1
1.800
2.000
L
0.600REF
L1
0.300
0.600
θ
0°
8°
INCHES
Min
Max
0.041 0.049
0.000 0.004
0.041 0.045
0.012 0.020
0.004 0.008
0.111 0.119
0.059 0.067
0.104 0.116
0.037REF
0.071 0.079
0.023REF
0.012 0.024
0°
8°
Land Pattern
2.4
0.9
0.7
0.95
0.95
NOTES:
1. Compound dimension: 2.92×1.60;
2. Unit: mm;
3. General tolerance ±0.05mm unless otherwise
specified;
4. The layout is just for reference.
UCJ
M
Tape and Reel Orientation
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UESD16V8S4C
IMPORTANT NOTICE
The information in this document has been carefully reviewed and is believed to be
accurate. Nonetheless, this document is subject to change without notice. Union assumes
no responsibility for any inaccuracies that may be contained in this document, and makes
no commitment to update or to keep current the contained information, or to notify a
person or organization of any update. Union reserves the right to make changes, at any
time, in order to improve reliability, function or design and to attempt to supply the best
product possible.
Union Semiconductor, Inc
Add: Unit 606, No.570 Shengxia Road, Shanghai 201210
Tel: 021-51093966
Fax: 021-51026018
Website: www.union-ic.com
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