FSBB10CH120DF Motion SPM® 3 Series Features General Description • UL Certified No. E209204 (UL1557) FSBB10CH120DF is an advanced Motion SPM® 3 module providing a fully-featured, high-performance inverter output stage for AC Induction, BLDC, and PMSM motors. These modules integrate optimized gate drive of the built-in IGBTs to minimize EMI and losses, while also providing multiple on-module protection features including under-voltage lockouts, over-current shutdown, thermal monitoring of drive IC, and fault reporting. The built-in, high-speed HVIC requires only a single supply voltage and translates the incoming logiclevel gate inputs to the high-voltage, high-current drive signals required to properly drive the module's internal IGBTs. Separate negative IGBT terminals are available for each phase to support the widest variety of control algorithms. • 1200 V - 10 A 3-Phase IGBT Inverter with Integral Gate Drivers and Protection • Low-Loss, Short-Circuit Rated IGBTs • Very Low Thermal Resistance Using Al2O3 DBC Substrate • Dedicated Vs Pins Simplify PCB Layout • Separate Open-Emitter Pins from Low-Side IGBTs for Three-Phase Current Sensing • Single-Grounded Power Supply • LVIC Temperature-Sensing Built-In for Temperature Monitoring • Isolation Rating: 2500 Vrms / 1 min. Applications • Motion Control - Industrial Motor (AC 400V Class) Related Resources • AN-9095 - Motion SPM® 3 Series User’s Guide • AN-9086 - SPM® 3 Package Mounting Guidance Figure 1. 3D Package Drawing (Click to Activate 3D Content) Package Marking and Ordering Information Device Device Marking Package Packing Type Quantity FSBB10CH120DF FSBB10CH120DF SPMMC-027 Rail 10 ©2015 Fairchild Semiconductor Corporation FSBB10CH120DF Rev. 1.1 1 www.fairchildsemi.com FSBB10CH120DF Motion SPM® 3 Series June 2015 FSBB10CH120DF Motion SPM® 3 Series Integrated Power Functions • 1200 V - 10 A IGBT inverter for three-phase DC / AC power conversion (Please refer to Figure 3) Integrated Drive, Protection and System Control Functions • For inverter high-side IGBTs: gate drive circuit, high-voltage isolated high-speed level shifting control circuit Under-Voltage Lock-Out Protection (UVLO) Note: Available bootstrap circuit example is given in Figures 5 and 15. • For inverter low-side IGBTs: gate drive circuit, Short-Circuit Protection (SCP) control supply circuit Under-Voltage Lock-Out Protection (UVLO) • Fault signaling: corresponding to UVLO (low-side supply) and SC faults • Input interface: active-HIGH interface, works with 3.3 / 5 V logic, Schmitt-trigger input Pin Configuration Figure 2. Top View ©2015 Fairchild Semiconductor Corporation FSBB10CH120DF Rev. 1.1 2 www.fairchildsemi.com FSBB10CH120DF Motion SPM® 3 Series Pin Descriptions Pin Number Pin Name 1 VCC(L) Pin Description Low-Side Common Bias Voltage for IC and IGBTs Driving 2 COM Common Supply Ground 3 IN(UL) Signal Input for Low-Side U Phase 4 IN(VL) Signal Input for Low-Side V Phase 5 IN(WL) Signal Input for Low-Side W Phase 6 VFO Fault Output 7 VTS Output for LVIC Temperature Sensing Voltage Output Capacitor (Low-Pass Filter) for Short-Circuit Current Detection Input 8 CSC 9 IN(UH) 10 VCC(UH) 11 VB(U) High-Side Bias Voltage for U Phase IGBT Driving Signal Input for High-Side U Phase High-Side Bias Voltage for U Phase IC 12 VS(U) High-Side Bias Voltage Ground for U Phase IGBT Driving 13 IN(VH) Signal Input for High-Side V Phase 14 VCC(VH) 15 VB(V) High-Side Bias Voltage for V Phase IGBT Driving 16 VS(V) High-Side Bias Voltage Ground for V Phase IGBT Driving 17 IN(WH) 18 VCC(WH) 19 VB(W) High-Side Bias Voltage for W Phase IGBT Driving 20 VS(W) High-Side Bias Voltage Ground for W Phase IGBT Driving 21 NU Negative DC-Link Input for U Phase 22 NV Negative DC-Link Input for V Phase 23 NW Negative DC-Link Input for W Phase 24 U Output for U Phase 25 V Output for V Phase 26 W Output for W Phase 27 P Positive DC-Link Input ©2015 Fairchild Semiconductor Corporation FSBB10CH120DF Rev. 1.1 High-Side Bias Voltage for V Phase IC Signal Input for High-Side W Phase High-Side Bias Voltage for W Phase IC 3 www.fairchildsemi.com FSBB10CH120DF Motion SPM® 3 Series Internal Equivalent Circuit and Input/Output Pins (19) VB (W) (18) VCC (WH) (17) IN(WH ) P (27) VB VC C COM IN OUT VS W (26) (20) VS (W) (15) VB (V) (14) VCC (V H) (13) IN(V H) (16) VS (V ) (11) VB (U) (10) VCC (UH) (9) IN(UH) ( 12) VS (U) (8) CS C (7) VT S (6) VF O (5) IN(WL ) VB VC C COM IN OUT VS V (25) VB VC C COM IN CSC OUT VS U (24) OUT VTS NW (23) VFO IN OUT (4) IN(V L) NV (22) IN (3) IN(UL ) IN (2) COM COM (1) VCC(L) OUT VC C NU (21) Figure 3. Internal Block Diagram Notes: 1. Inverter low-side is composed of three IGBTs, freewheeling diodes for each IGBT, and one control IC. It has gate drive and protection functions. 2. Inverter power side is composed of four inverter DC-link input terminals and three inverter output terminals. 3. Inverter high-side is composed of three IGBTs, freewheeling diodes, and three drive ICs for each IGBT. ©2015 Fairchild Semiconductor Corporation FSBB10CH120DF Rev. 1.1 4 www.fairchildsemi.com Unless Otherwise Specified) Inverter Part Symbol VPN VPN(Surge) VCES Parameter Conditions Supply Voltage Applied between P - NU, NV, NW Supply Voltage (Surge) Applied between P - NU, NV, NW Rating Unit 900 V Collector - Emitter Voltage 1000 V 1200 V ± IC Each IGBT Collector Current TC = 25°C, TJ 150°C (Note 4) 10 A ± ICP Each IGBT Collector Current (Peak) TC = 25°C, TJ 150°C, Under 1 ms Pulse Width (Note 4) 20 A PC Collector Dissipation TC = 25°C per One Chip (Note 4) 69 W TJ Operating Junction Temperature -40 ~ 150 °C Rating Unit Control Part Symbol Parameter Conditions VCC Control Supply Voltage Applied between VCC(H), VCC(L) - COM 20 V VBS High-Side Control Bias Voltage Applied between VB(U) - VS(U), VB(V) - VS(V), VB(W) - VS(W) 20 V VIN Input Signal Voltage Applied between IN(UH), IN(VH), IN(WH), IN(UL), IN(VL), IN(WL) - COM -0.3 ~ VCC+0.3 V VFO Fault Output Supply Voltage Applied between VFO - COM -0.3 ~ VCC+0.3 V IFO Fault Output Current Sink Current at VFO pin VSC Current Sensing Input Voltage Applied between CSC - COM 2 mA -0.3 ~ VCC+0.3 V Rating Unit 800 V -40 ~ 125 °C Total System Symbol VPN(PROT) TC Parameter Conditions Self Protection Supply Voltage Limit (Short Circuit Protection Capability) VCC = VBS = 13.5 ~ 16.5 V, TJ = 150°C, Non-repetitive, < 2 µs Module Case Operation Temperature See Figure 2 TSTG Storage Temperature VISO Isolation Voltage -40 ~ 125 °C 2500 Vrms Typ. Max. Unit 60 Hz, Sinusoidal, AC 1 minute, Connection Pins to Heat Sink Plate Thermal Resistance Symbol Rth(j-c)Q Rth(j-c)F Parameter Junction to Case Thermal Resistance (Note 5) Conditions Min. Inverter IGBT part (per 1 / 6 module) - - 1.80 °C / W Inverter FWD part (per 1 / 6 module) - - 2.75 °C / W Note: 4. These values had been made an acquisition by the calculation considered to design factor. 5. For the measurement point of case temperature (TC), please refer to Figure 2. ©2015 Fairchild Semiconductor Corporation FSBB10CH120DF Rev. 1.1 5 www.fairchildsemi.com FSBB10CH120DF Motion SPM® 3 Series Absolute Maximum Ratings (TJ = 25°C, Inverter Part Symbol VCE(SAT) VF HS tON Parameter Conditions Min. Typ. Max. Unit Collector - Emitter Saturation VCC = VBS = 15 V Voltage VIN = 5 V IC = 10 A, TJ = 25°C - 2.20 2.80 V FWDi Forward Voltage VIN = 0 V IF = 10 A, TJ = 25°C - 2.20 2.80 V Switching Times VPN = 600 V, VCC = 15 V, IC = 10 A TJ = 25°C VIN = 0 V 5 V, Inductive Load See Figure 5 (Note 6) 0.45 0.85 1.35 s - 0.25 0.60 s - 0.95 1.50 s - 0.10 0.45 s - 0.25 - s VPN = 600 V, VCC = 15 V, IC = 10 A TJ = 25°C VIN = 0 V 5 V, Inductive Load See Figure 5 (Note 6) 0.35 0.75 1.25 s - 0.20 0.55 s - 0.95 1.50 s - 0.10 0.45 s - 0.20 - s - - 5 mA tC(ON) tOFF tC(OFF) trr LS tON tC(ON) tOFF tC(OFF) trr ICES Collector - Emitter Leakage VCE = VCES Current Note: 6. tON and tOFF include the propagation delay time of the internal drive IC. tC(ON) and tC(OFF) are the switching time of IGBT itself under the given gate driving condition internally. For the detailed information, please see Figure 4. 100% I C 100% I C t rr V CE IC IC V CE V IN V IN t ON t OFF t C(ON) t C(OFF) 10% I C V IN(ON) 90% I C V IN(OFF) 10% V CE 10% V CE 10% I C (b) turn-off (a) turn-on Figure 4. Switching Time Definition ©2015 Fairchild Semiconductor Corporation FSBB10CH120DF Rev. 1.1 6 www.fairchildsemi.com FSBB10CH120DF Motion SPM® 3 Series Electrical Characteristics (TJ = 25°C, Unless Otherwise Specified) P DBS CBS VCC COM RBS IN VB VS U,V,W LS Switching 0V VCC VFO VTS 4.7kΩ VPN V 600V HS Switching OUT CSC V +15V Inductor IN VIN VCC LS Switching OUT HS Switching 5V IC COM NU,V,W V +5V Figure 5. Example Circuit for Switching Test Figure 6. Switching Loss Characteristics Figure 7. Temperature Profile of VTS (Typical) ©2015 Fairchild Semiconductor Corporation FSBB10CH120DF Rev. 1.1 7 www.fairchildsemi.com FSBB10CH120DF Motion SPM® 3 Series One-Leg Diagram of SPM 3 Symbol Parameter Conditions Min. Typ. Max. Unit VCC(UH,VH,WH) = 15 V, IN(UH,VH,WH) = 0 V VCC(UH) - COM, VCC(VH) - COM, VCC(WH) - COM - - 0.15 mA IQCCL VCC(L) = 15 V, IN(UL,VL, WL) = 0 V VCC(L) - COM - - 5.00 mA IPCCH VCC(UH) - COM, VCC(UH,VH,WH) = 15 V, fPWM = 20 kHz, VCC(VH) - COM, duty = 50%, applied to one VCC(WH) - COM PWM signal input for HighSide - - 0.30 mA VCC(L) - COM VCC(L) = 15V, fPWM = 20 kHz, duty = 50%, applied to one PWM signal input for LowSide - - 8.50 mA IQCCH Quiescent VCC Supply Current Operating VCC Supply Current IPCCL IQBS Quiescent VBS Supply Current VBS = 15 V, IN(UH, VH, WH) = 0 V VB(U) - VS(U), VB(V) - VS(V), VB(W) - VS(W) - - 0.30 mA IPBS Operating VBS Supply Current VB(U) - VS(U), VCC = VBS = 15 V, fPWM = 20 kHz, VB(V) - VS(V), duty = 50%, applied to one VB(W) - VS(W) PWM signal input for HighSide - - 4.50 mA VFOH Fault Output Voltage VCC = 15 V, VSC = 0 V, VFO Circuit: 4.7 k to 5 V Pull-up 4.5 - - V VCC = 15 V, VSC = 1 V, VFO Circuit: 4.7 k to 5 V Pull-up - - 0.5 V VFOL VSC(ref) Short Circuit Trip Level 0.43 0.50 0.57 V UVCCD 10.3 - 12.8 V UVCCR Supply Circuit Under- Detection Level Voltage Protection Reset Level 10.8 - 13.3 V UVBSD Detection Level 9.5 - 12.0 V Reset Level 10.0 - 12.5 V 50 - - s 880 980 1080 mV - - 2.6 V 0.8 - - V UVBSR VCC = 15 V (Note 7) CSC - COM tFOD Fault-Out Pulse Width VTS LVIC Temperature Sensing Voltage Output VCC(L) = 15 V, TLVIC = 25°C (Note 8) See Figure 7 VIN(ON) ON Threshold Voltage Applied between IN(UH, VH, WH) - COM, IN(UL, VL, WL) - COM VIN(OFF) OFF Threshold Voltage Note: 7. Short-circuit current protection is functioning only at the low - sides. 8. TLVIC is the temperature of LVIC itself. VTS is only for sensing temperature of LVIC and can not shutdown IGBTs automatically. ©2015 Fairchild Semiconductor Corporation FSBB10CH120DF Rev. 1.1 8 www.fairchildsemi.com FSBB10CH120DF Motion SPM® 3 Series Control Part Symbol Parameter Value Conditions Unit Min. Typ. Max. 300 600 800 V VPN Supply Voltage Applied between P - NU, NV, NW VCC Control Supply Voltage Applied between VCC(UH, COM - COM, VCC(L) - 13.5 15.0 16.5 V VBS High-Side Bias Voltage Applied between VB(U) - VS(U), VB(V) - VS(V), VB(W) VS(W) 13.0 15.0 18.5 V -1 - 1 V / s 2.0 - - s - 20 kHz 5 V - s VH, WH) dVCC / dt, Control Supply dVBS / dt Variation tdead Blanking Time for Preventing Arm - Short For Each Input Signal fPWM PWM Input Signal -40C TC 125°C, -40C TJ 150°C - VSEN Voltage for Current Sensing Applied between NU, NV, NW - COM (Including Surge Voltage) -5 PWIN(ON) Minimun Input Pulse Width PWIN(OFF) TJ IC 20 A, Wiring Inductance between NU, DC Link N < 10nH (Note 9) V, W and Junction Temperature 1.5 - 1.5 - - -40 - 150 C Note: 9. This product might not make response if input pulse width is less than the recommanded value. Figure 8. Allowable Maximum Output Current Note: 10. This allowable output current value is the reference data for the safe operation of this product. This may be different from the actual application and operating condition. ©2015 Fairchild Semiconductor Corporation FSBB10CH120DF Rev. 1.1 9 www.fairchildsemi.com FSBB10CH120DF Motion SPM® 3 Series Recommended Operating Conditions Parameter Limits Conditions Min. Typ. Max. 0 - +150 Unit m Device Flatness See Figure 9 Mounting Torque Mounting Screw: M3 Recommended 0.7 N • m 0.6 0.7 0.8 N•m See Figure 10 Recommended 7.1 kg • cm 6.2 7.1 8.1 kg • cm Terminal Pulling Strength Load 19.6 N 10 - - s Terminal Bending Strength Load 9.8 N, 90 deg. bend 2 - - times - 15 - g Weight (+) (+) Figure 9. Flatness Measurement Position 2 Pre - Screwing : 1 2 Final Screwing : 2 1 1 Figure 10. Mounting Screws Torque Order Note: 11. Do not make over torque when mounting screws. Much mounting torque may cause DBC cracks, as well as bolts and Al heat - sink destruction. 12. Avoid one side tightening stress. Figure 10 shows the recommended torque order for mounting screws. Uneven mounting can cause the ceramic substrate of the Motion SPM 3 product to be damaged. The Pre - Screwing torque is set to 20 ~ 30% of maximum torque rating. ©2015 Fairchild Semiconductor Corporation FSBB10CH120DF Rev. 1.1 10 www.fairchildsemi.com FSBB10CH120DF Motion SPM® 3 Series Mechanical Characteristics and Ratings FSBB10CH120DF Motion SPM® 3 Series Time Charts of SPMs Protective Function Input Signal Protection Circuit State RESET SET RESET UVCCR a1 Control Supply Voltage a6 UVCCD a3 a2 a7 a4 Output Current a5 Fault Output Signal Figure 11. Under-Voltage Protection (Low-Side) a1 : Control supply voltage rises: After the voltage rises UVCCR, the circuits start to operate when next input is applied. a2 : Normal operation: IGBT ON and carrying current. a3 : Under voltage detection (UVCCD). a4 : IGBT OFF in spite of control input condition. a5 : Fault output operation starts fixed pulse width or until control supply voltage is recovered up to UVCCR. a6 : Under voltage reset (UVCCR). a7 : Normal operation: IGBT ON and carrying current by triggering next signal from “LOW” to “HIGH”. Input Signal Protection Circuit State RESET SET RESET UVBSR Control Supply Voltage b5 b1 UVBSD b3 b6 b2 b4 Output Current High-level (no fault output) Fault Output Signal Figure 12. Under-Voltage Protection (High-Side) b1 : Control supply voltage rises: After the voltage reaches UVBSR, the circuits start to operate when next input is applied. b2 : Normal operation: IGBT ON and carrying current. b3 : Under voltage detection (UVBSD). b4 : IGBT OFF in spite of control input condition, but there is no fault output signal. b5 : Under voltage reset (UVBSR). b6 : Normal operation: IGBT ON and carrying current by triggering next signal from “LOW” to “HIGH”. ©2015 Fairchild Semiconductor Corporation FSBB10CH120DF Rev. 1.1 11 www.fairchildsemi.com c6 Protection Circuit state SET Internal IGBT Gate-Emitter Voltage FSBB10CH120DF Motion SPM® 3 Series Lower arms control input c7 RESET c4 c3 c2 Internal delay at protection circuit SC current trip level c8 c1 Output Current SC Reference Voltage Sensing Voltage of sense resistor RC Filter circuit Fault Output Signal c5 time constant delay Figure 13. Short-Circuit Current Protection (Low-Side Operation only) (with the external sense resistance and RC filter connection) c1 : Normal operation: IGBT ON and carrying current. c2 : Short circuit current detection (SC trigger). c3 : All low-side IGBT’s gate are hard interrupted. c4 : All low-side IGBTs turn OFF. c5 : Fault output operation starts with a fixed pulse width. c6 : Input “HIGH”: IGBT ON state, but during the active period of fault output the IGBT doesn’t turn ON. c7 : Fault output operation finishes, but IGBT don’t turn on until triggering next signal from “LOW” to “HIGH”. c8 : Normal operation: IGBT ON and carrying current. Input/Output Interface Circuit +5V (MCU or Control power ) SPM 4.7 kΩ IN(UH) , IN (VH) , IN(WH) IN (UL) , IN (VL) , IN(WL) MCU VFO COM Figure 14. Recommended CPU I/O Interface Circuit Note: 13. RC coupling at each input (parts shown dotted) might change depending on the PWM control scheme used in the application and the wiring impedance of the application’s printed circuit board. The input signal section of the Motion SPM 3 product integrates 5 k(typ.) pull - down resistor. Therefore, when using an external filtering resistor, please pay attention to the signal voltage drop at input terminal. ©2015 Fairchild Semiconductor Corporation FSBB10CH120DF Rev. 1.1 12 www.fairchildsemi.com (17) IN( WH) (18) VCC( WH) R2 C4 D1 C3 C4 P (27) IN VCC COM OUT (19) VB( W) (20) VS( W) W (26) VS VB D2 R1 (13) IN( VH) Gating VH (14) VCC( VH) R2 C4 D1 C3 C4 D2 M C U R1 (15) VB( V) (16) V S(V) (9) IN( UH) Gating UH (10) V CC( UH) C1 C1 C1 R2 C4 D1 C3 5V line C4 IN VCC COM VS M C7 OUT V DC U (24) VS VB (12) VS( U) V (25) IN VCC COM (11) V B(U) OUT VB D2 R3 VTS R6 B D C6 R1 CSC (7) VT S Fault OUT V TS (6) VF O NW (23) (5) IN(WL ) R1 (4) IN(VL) IN NV (22) R4 (3) IN(UL ) Gating UL E IN C1 C1 C1 C1 (2) COM 15V line C1 COM (1) VCC( L) OUT VCC D2 C2 A OUT IN R1 R4 V FO R1 Gating WL Gating VL (8) CSC C5 NU (21) Power GND Line R4 C4 C R5 W-Phase Current V-Phase Current U-Phase Current Input Signal for Short -Circuit Protection R5 Control GND Line R5 C5 C5 C5 Figure 15. Typical Application Circuit Note: 14. To avoid malfunction, the wiring of each input should be as short as possible. (less than 2 - 3 cm) 15. VFO output is open-drain type. This signal line should be pulled up to the positive side of the MCU or control power supply with a resistor that makes IFO up to 2 mA. Please refer to Figure 14. 16. Input signal is active-HIGH type. There is a 5 k resistor inside the IC to pull-down each input signal line to GND. RC coupling circuits should be adopted for the prevention of input signal oscillation. R1C1 time constant should be selected in the range 50 ~ 150 ns. (Recommended R1 = 100 Ω , C1 = 1 nF) 17. Each wiring pattern inductance of A point should be minimized (Recommend less than 10nH). Additionally, it is recommended to use the shunt resistor R4 of surface mounted (SMD) type to reduce wiring inductance. To prevent malfunction, wiring of E point should be connected to the terminal of the shunt resistor R4 as close as possible. 18. To prevent errors of the protection function, the wiring of B, C, and D point should be as short as possible. 19. In the short - circuit protection circuit, please select the R6C6 time constant in the range 1.5 ~ 2 s. R6 should be selected min. 10 times larger resistance than sense resistor R5. And, It is recommended to do enough evaluaiton on the real system because short-circuit protection time may vary wiring pattern layout and value of the R6C6 time constant. 20. Each capacitor should be mounted as close to the pins of the Motion SPM 3 product as possible. 21. To prevent surge destruction, the wiring between the smoothing capacitor C7 and the P & GND pins should be as short as possible. The use of a high frequency non - inductive capacitor of around 0.1 ~ 0.22 F between the P & GND pins is recommended. 22. Relays are used at almost every systems of electrical equipments at industrial application. In these cases, there should be sufficient distance between the CPU and the relays. 23. The zener diode or transient voltage suppressor should be adopted for the protection of ICs from the surge destruction between each pair of control supply terminals (Recommanded zener diode is 22 V / 1 W, which has the lower zener impedance characteristic than about 15 Ω ). 24. C2 of around 7 times larger than bootstrap capacitor C3 is recommended. 25. Please choose the electrolytic capacitor with good temperature characteristic in C3. Also, choose 0.1 ~ 0.2 F R - category ceramic capacitors with good temperature and frequency characteristics in C4. ©2015 Fairchild Semiconductor Corporation FSBB10CH120DF Rev. 1.1 13 www.fairchildsemi.com FSBB10CH120DF Motion SPM® 3 Series R1 Gating WH FSBB10CH120DF Motion SPM® 3 Series Detailed Package Outline Drawings (FSBB10CH120DF) Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or data on the drawing and contact a FairchildSemiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide therm and conditions, specifically the the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/dwg/MO/MOD27BA.pdf ©2015 Fairchild Semiconductor Corporation FSBB10CH120DF Rev. 1.1 14 www.fairchildsemi.com ©2015 Fairchild Semiconductor Corporation FSBB10CH120DF Rev. 1.1 15 www.fairchildsemi.com