PDFDownload - Fairchild Semiconductor

User Guide for
FEBFSL4110LR_CS01U06A
Integrated Controller
FSL4110LR
6.0 W Auxiliary Power Supply
Featured Fairchild Product:
FSL4110LR
Direct questions or comments
about this evaluation board to:
“Worldwide Direct Support”
Fairchild Semiconductor.com
© 2014 Fairchild Semiconductor Corporation
FEBFLS4110LR_CS01U06A • Rev. 1.0
Table of Contents
1. Introduction ............................................................................................................................... 3
1.1.
1.2.
1.3.
General Description.......................................................................................................... 3
Features ............................................................................................................................ 3
Internal Block Diagram .................................................................................................... 4
2. Specification for Evaluation Board ........................................................................................... 5
3. Photographs............................................................................................................................... 6
4. Printed Circuit Board ................................................................................................................ 7
5. Schematic .................................................................................................................................. 8
6. Bill of Materials ........................................................................................................................ 9
7. Transformer Design ................................................................................................................ 10
8. Test Conditions ....................................................................................................................... 11
9. Performance of Evaluation Board ........................................................................................... 12
9.1.
9.2.
9.3.
9.4.
9.5.
9.6.
9.7.
9.8.
9.9.
9.10.
9.11.
9.12.
Startup Performance ....................................................................................................... 12
Normal Operation ........................................................................................................... 13
Voltage Stress of Drain and Secondary Diode ............................................................... 14
Output Ripple and Noise ................................................................................................ 15
Load Transient................................................................................................................ 17
Output Line and Load Regulation .................................................................................. 18
Hold-up Time ................................................................................................................. 19
Output Short Test ........................................................................................................... 19
Abnormal Over Current Test.......................................................................................... 20
Efficiency.................................................................................................................... 21
Operating Temperature ............................................................................................... 22
Electromagnetic Interference (EMI) ........................................................................... 23
10. Revision History ..................................................................................................................... 25
© 2014 Fairchild Semiconductor Corporation
2
FEBFSL4110LR_CS01U06A • Rev. 1.0
This user guide supports the evaluation kit for the FSL4110LR. It should be used in
conjunction with the FSL4110LR datasheet as well as Fairchild’s application notes and
technical support team. Please visit Fairchild’s website at www.fairchildsemi.com.
1.
Introduction
This document is an engineering report describing measured performance of the
FSL4110LR. The input voltage range is 85 VRMS – 460 VRMS, there is one DC output of
300 mA at 20V MAX. This document contains a general description of FSL4110LR, the
power supply specification, schematic, bill of materials, and the typical operating
characteristics.
1.1. General Description
The FSL4110LR is an integrated Pulse Width Modulation (PWM) controller and 1000 V
avalanche rugged SenseFET specifically designed for high input voltage offline
Switching Mode Power Supplies (SMPS) with minimal external components. VCC can
be supplied through integrated high-voltage power regulator without auxiliary bias
winding.
The integrated PWM controller includes a fixed-frequency oscillator, Under-Voltage
Lockout (UVLO), Leading-Edge Blanking (LEB), optimized gate driver, soft-start,
temperature-compensated precise current sources for loop-compensation, and variable
protection circuitry.
Compared with a discrete MOSFET and PWM controller solution, the FSL4110LR
reduces total cost, component count, PCB size, and weight; while simultaneously
increasing efficiency, productivity, and system reliability. This device provides a basic
platform for cost-effective design of a flyback converter.
1.2. Features









Built-in Avalanche Rugged 1000 V SenseFET
Precise Fixed Operating Frequency: 50 kHz
VCC can be supplied from either bias-winding or self-biasing.
Soft Burst-Mode Operation Minimizing Audible Noise
Random Frequency Fluctuation for Low EMI
Pulse-by-Pulse Current Limit
Various Protection Functions: Overload Protection (OLP), Over-Voltage Protection
(OVP), Abnormal Over-Current Protection (AOCP), Internal Thermal Shutdown
(TSD) with Hysteresis. Under-Voltage Lockout (UVLO) and Line Over-Voltage
Protection (LOVP) with Hysteresis.
Built-in Internal Startup and Soft-Start Circuit
Fixed 1.6 s Restart Time for Safe Auto-Restart Mode of All Protections
© 2014 Fairchild Semiconductor Corporation
3
FEBFSL4110LR_CS01U06A • Rev. 1.0
1.3. Internal Block Diagram
Internal
Bias
VSTR
Drain
2
5
6,7
HVREG
VCC Good
VSTART
/ VSTOP
VREF
Soft
Burst
VBURH
/VBURL
VCC
VCC
Random
VREF
OSC
S Q
IFB
RDLY
FB
3R
3
PWM
SoftStart
R
Line
Comp.
CFB
Gate
Driver
R Q
LEB
RSENSE
VIN
100 ms
Delay
4
1.6 s Auto Restart
Timing Control
1
GND
VOLP
VINH
VAOCP
VCC
TSD
VOVP
Figure 1.
© 2014 Fairchild Semiconductor Corporation
Block Diagram
4
FEBFSL4110LR_CS01U06A • Rev. 1.0
2.
Specification for Evaluation Board
Table 1. Evaluation Board Specifications
Main Controller
Input
FSL4110LRN
Frequency Range
60 Hz
Voltage Range
85 VAC ~ 460 VAC
Power
<6W
Voltage
< 20 V
Current
Typ. 0.3 A
Output
Board Dimensions
143 mm x 40 mm
All data of the evaluation board were measured under a condition where the board was
enclosed in a case and external temperature was around 25°C.
© 2014 Fairchild Semiconductor Corporation
5
FEBFSL4110LR_CS01U06A • Rev. 1.0
3.
Photographs
To measure drain current, change from jumper to wire.
But keep the jumper in the other cases.
Figure 2.
Figure 3.
© 2014 Fairchild Semiconductor Corporation
Top View
Bottom View
6
FEBFSL4110LR_CS01U06A • Rev. 1.0
4.
Printed Circuit Board
Figure 4.
Figure 5.
Figure 6.
© 2014 Fairchild Semiconductor Corporation
Board Layout
Printed PCB, Top Side
Printed PCB, Bottom Side
7
FEBFSL4110LR_CS01U06A • Rev. 1.0
Schematic
5.
Fuse
D1
S1M
D2
S1M
D3
S1M
MOV
510VAC
Open
85 VAC ~ 460 VAC
D4
S1M
C101
22µF
400V
C102
22µF
400V
R101
2MΩ
3216
R102
2MΩ
3216
R103
2MΩ
3216
R104
2MΩ
3216
L101
1mH
R113
Open
C103
22µF
400V
C104
22µF
400V
R114
0Ω
3216
L102
Open
RSTR
100kΩ
3216
R105
3.9MΩ
3216
R106
3.9MΩ
3216
R108
3MΩ
3216/1%
R109
3MΩ
3216/1%
R110
3MΩ
3216/1%
R107
RVIN
100kΩ
27kΩ
3216 3216/1%
C105
10nF
C106
68nF
VSTR
2
6,7
R111
150kΩ
1W
VCC
Drain
FSL4110LR
C107
2.2nF
1kV
5
4
VIN
3 FB
GND
1
C108
100nF
D101
S1M
R112
0Ω
3216
C109
22µF
50V
RDLY
4.7MΩ
1%
CY201
2.2nF
Np
4
1
3
2
Naux
Wire
For
Current
Probe
D102
S1M
5
T1
EPC17
9
C201
330pF
1kV
R203
3.3kΩ
2012
R202
510Ω
2012
C202
1000µF
35V
D201
EGP30J
R201
150Ω
1W
Ns
7
IC201
FOD817A
IC202
KA431LZ
L202
3.3µH
C203
1000µF
35V
R204
20kΩ
2012
C205
47nF
2012
C204
100nF
50V
R205
33kΩ
2012
R206
4.7kΩ
2012
20V, 0.3A
FEBFSL4110LR_CS01U06A • Rev. 1.0
8
© 2014 Fairchild Semiconductor Corporation
Evaluation Board Schematic
Figure 7.
6.
Bill of Materials
Item
No.
Part Reference
Part Number
Qty.
1
IC101
FSL4110LRN
1
7-DIP, Fairchild Semiconductor
2
IC201
FOD817A
1
4-DIP, Fairchild Semiconductor
3
IC202
KA431LZ
1
TO-92, Fairchild Semiconductor
4
D1, D2, D3, D4, D101, D102
S1M
6
1000 V / 1 A General Purpose Rectifiers,
SMA, Fairchild Semiconductor
5
D202
EGP30J
1
1000 V / 3 A Rectifiers, DO-201AD,
Fairchild Semiconductor
6
F1
SS-5-1A
1
1 A Fuse
7
MOV
Open
8
L101
1 mH
9
L102
Open
10
L202
3.3 µH
1
Filter Inductor, 8Φ
11
T1
Lm = 1.4 mH
1
EPC17 Core
12
R101, R102, R103, R104
2 MΩ
4
SMD Resistor 3216
13
RSTR, R107
100 kΩ
2
SMD Resistor 3216
14
R105, R106
3.9 MΩ
2
SMD Resistor 3216
15
R108, R109, R110
3 MΩ
3
SMD Resistor 3216
16
RVIN
27 kΩ
1
SMD Resistor 3216 / 1%
17
R111
150 kΩ
1
Resistor 1 W
18
R112, R114
0Ω
2
SMD Resistor 3216
19
R113
Open
20
RDLY
4.7 MΩ
1
SMD Resistor 2012 / 1%
21
R201
150 Ω
1
Resistor 1 W
22
R202
510 Ω
1
SMD Resistor 2012
23
R203
3.3 kΩ
1
SMD Resistor 2012
24
R204
20 kΩ
1
SMD Resistor 2012
25
R205
33 kΩ
1
SMD Resistor 2012 / 1%
26
R206
4.7 kΩ
1
SMD Resistor 2012 / 1%
27
C101, C102, C103, C104
22 µF / 400 V
4
Electrolytic Capacitor, 105°C
28
C105
10 nF / 50 V
1
SMD Capacitor 2012
29
C106
68 nF / 50 V
1
SMD Capacitor 2012
30
C107
2.2 nF / 1 kV
1
Ceramic Capacitor
31
C108
100 nF / 50 V
1
SMD Capacitor 2012
32
C109
22 µF / 50 V
1
Electrolytic Capacitor, 105°C
33
C201
330 pF / 1 kV
1
Ceramic Capacitor
34
C202, C203
1000 µF / 35 V
2
Ultra-Low Impedance Electrolytic
Capacitor, 105°C
35
C204
100 nF / 50 V
1
SMD Capacitor 2012
36
C205
47 nF / 50 V
1
SMD Capacitor 2012
37
CY201
2.2 nF
1
Y-Capacitor
© 2014 Fairchild Semiconductor Corporation
Description
Open
1
Filter Inductor, 10Φ
Open
Open
9
FEBFSL4110LR_CS01U06A • Rev. 1.0
7.
Transformer Design


Core: EPC17 (PC-40)
Bobbin: 10 Pins
EPC17
1
10
2
9
NP2 12
NP2
NS
NA 5
4
NP1
8
3
7
4
7
9
NS
NP1
2
3
NA
6
5
Figure 8.
Secondary-Side
Primary-Side
Transformer Specifications & Construction
Table 2. Winding Specifications
No.
Winding
Pin (S  F)
Wire
Turns
Winding Method
1
NP1
32
0.20 Φ * 1
72 Ts
Solenoid Winding
2
3
Insulation: Polyester Tape t = 0.05 mm, 3-Layer
NS
4
5
0.20 Φ (TEX) * 1
27 Ts
Solenoid Winding
Insulation: Polyester Tape t = 0.05 mm, 3-Layer
NA
6
7
97
0.15 Φ * 1
45
20 Ts
Solenoid Winding
Insulation: Polyester Tape t = 0.05 mm, 3-Layer
NP2
8
0.20 Φ * 1
21
33 Ts
Center Solenoid Winding
Outer Insulation: Polyester Tape t = 0.05 mm, 3-Layer
Table 3. Electrical Characteristics
Pin
Specification
Remark
Inductance
1-3
1.4 mH ±7%
1 kHz, 1 V
Leakage
1-3
Max. 20 µH
Short All Output Pins
© 2014 Fairchild Semiconductor Corporation
10
FEBFSL4110LR_CS01U06A • Rev. 1.0
8.
Test Conditions
Table 4. Test Conditions & Test Equipment
Evaluation Board #
Test Date
Test Equipment
Test Items
© 2014 Fairchild Semiconductor Corporation
FEBFSL4110LR_CS01U06A
November 04, 2014
AC Source: 6800 Series by EXTECH
Electronic Load: EML-05B by FUJITSU
Oscilloscope: WaveRunner 104Xi-A by LeCroy
Power Meter: PZ4000 by YOKOGAWA
Multi Meter: 45 by FLUKE
1. Startup Performance
2. Normal Operation
3. Voltage Stress of Drain and Secondary Diode
4. Output Ripple and Noise
5. Load Transient
6. Output Line & Load Regulation
7. Hold-Up Time
8. Output Short Test
9. Abnormal Over Current Test
10. Efficiency
11. Operating Temperature
12. Electromagnetic Interference (EMI)
11
FEBFSL4110LR_CS01U06A • Rev. 1.0
9.
Performance of Evaluation Board
9.1. Startup Performance
Test Condition: Measure the time interval between AC plug-in and stable output.
Figure 9.
Startup Time = 409 ms,
85 VAC, Full-Load Condition (CH1:
VCC (10 V/div), CH2: VDS (100 V/div),
CH3: VFB (5 V/div), CH4: VOUT
(10 V/div), Time: 100 ms/div)
Figure 10. Startup Time = 293 ms,
460 VAC, Full-Load Condition (CH1:
VCC (10 V/div), CH2: VDS (200 V/div),
CH3: VFB (5 V/div), CH4: VOUT
(10 V/div), Time: 100 ms/div)
Figure 11. Startup Time = 329 ms,
85 VAC, No-Load Condition (CH1: VCC
(10 V/div), CH2: VDS (100 V/div), CH3:
VFB (5 V/div), CH4: VOUT (10 V/div),
Time: 100 ms/div)
Figure 12. Startup Time = 216 ms,
460 VAC, Full-Load Condition (CH1:
VCC (10 V/div), CH2: VDS (200 V/div),
CH3: VFB (5 V/div), CH4: VOUT
(10 V/div), Time: 100 ms/div)
© 2014 Fairchild Semiconductor Corporation
12
FEBFSL4110LR_CS01U06A • Rev. 1.0
9.2. Normal Operation
Test Condition: Measure normal operation.
Figure 13. 85 VAC, Full-Load Condition
(CH1: VCC (10 V/div), CH2: VDS
(100 V/div), CH4: IDS (200 mA/div),
Time: 10 µs/div)
Figure 14. 460 VAC, Full-Load Condition
(CH1: VCC (10 V/div), CH2: VDS
(500 V/div), CH4: IDS (500 mA/div),
Time: 10 µs/div)
Figure 15. 85 VAC, No-Load Condition
(CH1: VCC (10 V/div), CH2: VDS
(100 V/div), CH4: IDS (200 mA/div),
Time: 5 ms/div)
Figure 16. 460 VAC, No-Load Condition
(CH1: VCC (10 V/div), CH2: VDS
(500 V/div), CH4: IDS (500 mA/div),
Time: 20 ms/div)
© 2014 Fairchild Semiconductor Corporation
13
FEBFSL4110LR_CS01U06A • Rev. 1.0
9.3. Voltage Stress of Drain and Secondary Diode
Test Condition: Measure the voltage stress on the FSL4110LR and secondary diode.
Figure 17. VDS=768 V, VDIODE=328 V,
Startup, Full-Load Condition,
460 VAC, (CH1: VDIODE (200 V/div),
CH2: VDS (200 V/div), Time: 5 ms/div)
Figure 19. VDS=731 V, VDIODE=328 V,
Output Short, Full-Load Condition,
460 VAC, (CH1: VDIODE (200 V/div),
CH2: VDS (200 V/div), Time:
50 ms/div)
© 2014 Fairchild Semiconductor Corporation
14
Figure 18. VDS=786 V, VDIODE=249 V,
Steady-State, Full-Load Condition,
460 VAC, (CH1: VDIODE (200 V/div),
CH2: VDS (200 V/div), Time: 5 µs/div)
Figure 20. VDS=936 V, Secondary Diode
Short (AOCP), Full-Load Condition,
460 VAC, (CH1: VDIODE (200 V/div),
CH2: VDS (200 V/div), Time:
200 µs/div)
FEBFSL4110LR_CS01U06A • Rev. 1.0
9.4. Output Ripple and Noise
Test Condition: Ripple and noise are measured by using 20 MHz bandwidth limited
oscilloscope with a 10 µF / 50 V capacitor paralleled with a high-frequency 0.1 µF
capacitor across a output as Figure 21.
Figure 21.
Recommended Test Setup
Table 5. Test Result
No-Load
25% Load
50% Load
75% Load
Full-Load
85 VAC
22.4 mVp-p
20.5 mVp-p
27.5 mVp-p
35.8 mVp-p
37.8 mVp-p
110 VAC
23.7 mVp-p
20.5 mVp-p
28.2 mVp-p
35.2 mVp-p
38.4 mVp-p
230 VAC
42.2 mVp-p
27.5 mVp-p
31.4 mVp-p
36.5 mVp-p
39 mVp-p
265 VAC
43.5 mVp-p
30.1 mVp-p
32.6 mVp-p
37.1 mVp-p
39.7 mVp-p
350 VAC
46.1 mVp-p
35.2 mVp-p
36.5 mVp-p
39 mVp-p
41.6 mVp-p
400 VAC
55.7 mVp-p
39 mVp-p
39.4 mVp-p
41 mVp-p
43.5 mVp-p
460 VAC
62.7 mVp-p
44.8 mVp-p
42.9 mVp-p
42.2 mV-p
44.2 mVp-p
Figure 22. VOUT_RIPPLE = 37.8 mVp-p,
Output with 85 VAC and Full-Load
Condition, (CH1: VOUT (20 mVAC/div),
Time: 10 ms/div)
© 2014 Fairchild Semiconductor Corporation
15
Figure 23. VOUT_RIPPLE = 44.2 mVp-p,
Output with 460 VAC and Full-Load
Condition, (CH1: VOUT (20 mVAC/div),
Time: 10 ms/div)
FEBFSL4110LR_CS01U06A • Rev. 1.0
Figure 24. VOUT_RIPPLE = 27.5 mVp-p,
Output with 85 VAC and 50% Load
Condition, (CH1: VOUT (20 mVAC/div),
Time: 10 ms/div)
Figure 26. VOUT_RIPPLE = 22.4 mVp-p,
Output with 85 VAC and No-Load
Condition, (CH1: VOUT (20 mVAC/div),
Time: 10 ms/div)
© 2014 Fairchild Semiconductor Corporation
16
Figure 25. VOUT_RIPPLE = 42.9 mVp-p,
Output with 460 VAC and 50% Load
Condition, (CH1: VOUT (20 mVAC/div),
Time: 10 ms/div)
Figure 27.
VOUT_RIPPLE = 62.7 mVp-p, Output
with 460 VAC and No-Load Condition, (CH1:
VOUT (20 mVAC/div), Time: 10 ms/div)
FEBFSL4110LR_CS01U06A • Rev. 1.0
9.5. Load Transient
Test Condition: Load Transient is measured by using 20 MHz bandwidth limited
oscilloscope with a 10 µF / 50 V capacitor paralleled with a high-frequency 0.1 µF
capacitor across a output as Figure 21.
Table 6. Test Result
FullLoad

NoLoad
NoLoad

FullLoad
85 VAC
110 VAC 230 VAC 265 VAC 350 VAC 400 VAC 460 VAC
Overshoot
143 mV
146 mV
143 mV
150 mV
140 mV
147 mV
140 mV
Undershoot
57 mV
59 mV
59 mV
57 mV
57 mV
56 mV
54 mV
Peak-Peak
200 mV
205 mV
202 mV
207 mV
197 mV
203 mV
194 mV
Overshoot
79 mV
78 mV
72 mV
72 mV
69 mV
67 mV
75 mV
Undershoot
271 mV
284 mV
269 mV
283 mV
253 mV
268 mV
250 mV
Peak-Peak
350 mV
362 mV
341 mV
355 mV
322 mV
335 mV
325 mV
Figure 28. VOUT_RIPPLE = 200 mVp-p,
Output with 85 VAC, Full-Load  NoLoad (CH1: VOUT (100 mVAC/div),
CH4: IOUT (200 mA/div), Time:
20 ms/div)
Figure 29. VOUT_RIPPLE = 350 mVp-p,
Output with 85 VAC, No-Load  FullLoad (CH1: VOUT (100 mVAC/div), CH4:
IOUT (200 mA/div), Time: 20 ms/div)
Figure 30. VOUT_RIPPLE = 194 mVp-p,
Output with 460 VAC, Full-Load 
No-Load (CH1: VOUT (100 mVAC/div),
CH4: IOUT (200 mA/div), Time: 20
ms/div)
Figure 31. VOUT_RIPPLE = 325 mVp-p,
Output with 460 VAC, No-Load  FullLoad (CH1: VOUT (100 mVAC/div), CH4:
IOUT (200 mA/div), Time: 20 ms/div)
© 2014 Fairchild Semiconductor Corporation
17
FEBFSL4110LR_CS01U06A • Rev. 1.0
9.6. Output Line and Load Regulation
Test Condition: Line and Load regulation are measured output voltage regulations
according to changing input voltage and output load.
Table 7. Test Result
85 VAC
110 VAC
230 VAC
265 VAC
350 VAC
400 VAC
460 VAC
Full-Load
20.03 V
20.03 V
20.03 V
20.03 V
20.03 V
20.03 V
20.03 V
No-Load
20.04 V
20.04 V
20.04 V
20.04 V
20.04 V
20.04 V
20.04 V
VOUT [V]
VAC
Figure 32.
© 2014 Fairchild Semiconductor Corporation
Line and Load Regulation
18
FEBFSL4110LR_CS01U06A • Rev. 1.0
9.7. Hold-up Time
Test Condition: Measure the time interval between AC plug-out and VOUT * 0.9. Load
condition is 5% of full-load.
Table 8. Test Result
IOUT = 15 mA
85 VAC
110 VAC
230 VAC
265 VAC
350 VAC
400 VAC
460 VAC
0.64 s
0.88 s
2.9 s
3.77 s
5.87 s
7.06 s
8.76 s
Figure 33. tHOLD = 0.6 s, 85 VAC, (CH1:
VOUT (5 V/div), CH4: VAC (100 V/div),
Time: 500 ms/div)
Figure 34. tHOLD = 8.8 s, 460 VAC, (CH1:
VOUT (5 V/div), CH4: VAC (350 V/div),
Time: 2 s/div)
9.8. Output Short Test
Test Condition: Measure “Hiccup” mode operation. Remove R108 because LOVP can be
triggered over 400 VAC.
Figure 35. OLP Triggered, Output Short
with 85 VAC, Full-Load, (CH1: VCC
(10 V/div), CH2: VDS (100 V/div), CH3:
VFB (5 V/div), CH4: VOUT (10 V/div),
Time: 500 ms/div)
© 2014 Fairchild Semiconductor Corporation
19
Figure 36. OLP Triggered, Output Short
with 460 VAC, Full-Load, (CH1: VCC
(10 V/div), CH2: VDS (500 V/div), CH3:
VFB (5 V/div), CH4: VOUT (10 V/div),
Time: 500 ms/div)
FEBFSL4110LR_CS01U06A • Rev. 1.0
9.9. Abnormal Over Current Test
Test Condition: Short secondary diode and measure “Hiccup” mode operation. Remove
R108 because LOVP can be triggered over 400 VAC.
Figure 37. AOCP Triggered, Output
Short with 85 VAC, Full-Load, (CH1:
VCC (10 V/div), CH2: VDS (100 V/div),
CH3: VFB (5 V/div), CH4: VOUT
(10 V/div), Time: 500 ms/div)
© 2014 Fairchild Semiconductor Corporation
20
Figure 38. AOCP Triggered, Output
Short with 460 VAC, Full-Load, (CH1:
VCC (10 V/div), CH2: VDS (500 V/div),
CH3: VFB (5 V/div), CH4: VOUT
(10 V/div), Time: 500 ms/div)
FEBFSL4110LR_CS01U06A • Rev. 1.0
9.10. Efficiency
Test Condition: Measure the input and output power after 30 minutes aging.
Table 9.
Test Results
25% Load
50% Load
75% Load
Full-Load
85 VAC
81.05%
84.20%
84.13%
83.97%
110 VAC
80.71%
84.18%
84.82%
84.85%
230 VAC
72.76%
80.34%
83.07%
83.71%
265 VAC
70.25%
78.87%
82.20%
82.78%
350 VAC
63.58%
74.59%
79.53%
80.29%
400 VAC
59.52%
71.72%
77.61%
78.69%
460 VAC
55.08%
68.13%
75.01%
76.60%
Efficiency
Figure 39.
© 2014 Fairchild Semiconductor Corporation
Efficiency Curve
21
FEBFSL4110LR_CS01U06A • Rev. 1.0
9.11. Operating Temperature
Test Condition Measure the saturated temperature.
Table 10. Test Results
85 VAC
460 VAC
Remark
FSL4110LRN
42.0°C
48.4°C
Box 2
Transformer
47.0°C
51.5°C
Circle 1
Secondary Rectifier with
Snubber
41.8°C
49.0°C
Box 3
Temperature Photos
Transformer
(47.0°C)
FSL4110LRN
(42.0°C)
Figure 40.
© 2014 Fairchild Semiconductor Corporation
Transformer
(57.9°C)
Secondary
Diode
(41.8°C)
85 VAC; Top Side
22
FSL4110LRN
(55.9°C)
Snubber of
Secondary Diode
(67.6°C)
Figure 41.
460 VAC; Top Side
FEBFSL4110LR_CS01U06A • Rev. 1.0
9.12. Electromagnetic Interference (EMI)
Test Conditions:



Frequency Subrange: 150 kHz – 30 MHz,
Measuring: QuasiPeak; Average
Load is 65.5 Ω Resistor
Table 11. Test Results
Figure 42. Conduction Line: 110 VAC
Figure 43. Conduction Neutral: 110 VAC
© 2014 Fairchild Semiconductor Corporation
23
FEBFSL4110LR_CS01U06A • Rev. 1.0
Figure 44. Conduction Line: 220 VAC
Figure 45. Conduction Neutral: 220 VAC
© 2014 Fairchild Semiconductor Corporation
24
FEBFSL4110LR_CS01U06A • Rev. 1.0
10. Revision History
Rev.
Date
Description
1.0
Dec.16. 2014
Initial Release
WARNING AND DISCLAIMER
Replace components on the Evaluation Board only with those parts shown on the parts list (or Bill of Materials) in the Users’ Guide. Contact an
authorized Fairchild representative with any questions.
This board is intended to be used by certified professionals, in a lab environment, following proper safety procedures. Use at your own risk. The
Evaluation board (or kit) is for demonstration purposes only and neither the Board nor this User’s Guide constitute a sales contract or create any kind
of warranty, whether express or implied, as to the applications or products involved. Fairchild warrantees that its products meet Fairchild’s published
specifications, but does not guarantee that its products work in any specific application. Fairchild reserves the right to make changes without notice to
any products described herein to improve reliability, function, or design. Either the applicable sales contract signed by Fairchild and Buyer or, if no
contract exists, Fairchild’s standard Terms and Conditions on the back of Fairchild invoices, govern the terms of sale of the products described herein.
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO
IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR
USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR
THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS
WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems which, (a)
are intended for surgical implant into the body, or (b) support or
sustain life, or (c) whose failure to perform when properly used in
accordance with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the user.
2. A critical component is any component of a life support device or
system whose failure to perform can be reasonably expected to
cause the failure of the life support device or system, or to affect its
safety or effectiveness.
ANTI-COUNTERFEITING POLICY
Fairchild Semiconductor Corporation's Anti-Counterfeiting Policy. Fairchild's Anti-Counterfeiting Policy is also stated on our external website,
www.fairchildsemi.com, under Sales Support.
Counterfeiting of semiconductor parts is a growing problem in the industry. All manufacturers of semiconductor products are experiencing
counterfeiting of their parts. Customers who inadvertently purchase counterfeit parts experience many problems such as loss of brand reputation,
substandard performance, failed applications, and increased cost of production and manufacturing delays. Fairchild is taking strong measures to
protect ourselves and our customers from the proliferation of counterfeit parts. Fairchild strongly encourages customers to p urchase Fairchild parts
either directly from Fairchild or from Authorized Fairchild Distributors who are listed by country on our web page cited above. Products customers buy
either from Fairchild directly or from Authorized Fairchild Distributors are genuine parts, have full traceability, meet Fairchild's quality standards for
handling and storage and provide access to Fairchild's full range of up-to-date technical and product information. Fairchild and our Authorized
Distributors will stand behind all warranties and will appropriately address any warranty issues that may arise. Fairchild will not provide any warranty
coverage or other assistance for parts bought from Unauthorized Sources. Fairchild is committed to combat this global problem and encourage our
customers to do their part in stopping this practice by buying direct or from authorized distributors.
EXPORT COMPLIANCE STATEMENT
These commodities, technology, or software were exported from the United States in accordance with the Export Administration Regulations for the
ultimate destination listed on the commercial invoice. Diversion contrary to U.S. law is prohibited.
U.S. origin products and products made with U.S. origin technology are subject to U.S Re-export laws. In the event of re-export, the user will be
responsible to ensure the appropriate U.S. export regulations are followed.
© 2014 Fairchild Semiconductor Corporation
25
FEBFSL4110LR_CS01U06A • Rev. 1.0