FAN100 Primary-Side-Control PWM Controller Features Description Constant-Voltage (CV) and Constant-Current (CC) Control without Secondary-Feedback Circuitry Accurate Constant Current Achieved by Fairchild’s Proprietary TRUECURRENT™ Technique Green Mode: Frequency Reduction at Light Load The primary-side PWM controller FAN100 significantly simplifies power supply design that requires CV and CC regulation capabilities. The FAN100 controls the output voltage and current precisely with the information in the primary side of the power supply, not only removing the output current sensing loss, but eliminating secondary feedback circuitry. Low Startup Current: 10 μA Maximum Fixed PWM Frequency at 42 kHz with Frequency Hopping to Reduce EMI Low Operating Current: 3.5 mA The green-mode function with a low startup current (10µA) maximizes the light-load efficiency so the power supply can meet stringent standby power regulations. Over-Temperature Protection with Auto-Restart Compared with a conventional secondary-side regulation approach, the FAN100 can reduce total cost, component count, size, and weight; while simultaneously increasing efficiency, productivity, and system reliability. Brownout Protection with Auto-Restart FAN100 controller is available in an 8-pin SOP package. VDD Over-Voltage Protection with Auto-Restart A typical output CV/CC characteristic envelope is shown in Figure 1. Peak-Current-Mode Control in CV Mode Cycle-by-Cycle Current Limiting VDD Under-Voltage Lockout (UVLO) Gate Output Maximum Voltage Clamped at 18V VO SOP-8 Package Applications Battery Chargers for Cellular Phones, Cordless Phones, PDA, Digital Cameras, Power Tools Replaces Linear Transformer and RCC SMPS Offline High Brightness (HB) LED Drivers IO Related Resources Figure 1. Typical Output V-I Characteristic AN-6067 — Design Guide for FAN100/102 and FSEZ1016A/1216 Ordering Information Part Number Operating Temperature Range Package Packing Method FAN100MY -40°C to +125°C 8-Lead, Small Outline Package (SOP-8) Tape & Reel For Fairchild’s definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html. © 2009 Fairchild Semiconductor Corporation FAN100 Rev. 1.0.3 www.fairchildsemi.com FAN100 — Primary-Side-Control PWM Controller January 2014 FAN100 — Primary-Side-Control PWM Controller Application Diagram C SN2 R SN2 VO Bridge rectifier diode VDL + C DL R SN1 C SN1 R START - NS NP IO DR CO D SN D DD C DD AC line FAN100 1 2 3 4 CS GATE GND VDD COMI GND COMV VS NA R GATE 8 R S1 7 6 RCS 5 R S2 C COMV C COMI CS R COMV R COMI Figure 2. Typical Application Internal Block Diagram + VDD 7 OVP VDD Auto-Restart Protection 28V Internal Bias Brownout OTP + Soft-Driver 8 - Gate 16V/5V S OSC with Freq Hopping Q - R Q PWM Comparator 1.3V + + PWM Comparator Leading-Edge Blanking 1 CS + PWM Comparator Slope Compensation IO Estimator + EA_V GND 2.5V - Green-Mode Controller + EA_I 2.5V Brownout Protection tDIS Detector 5 VS Temp. Compensation 6 VO Estimator 3 4 COMI 2 COMV GND Figure 3. Functional Block Diagram © 2009 Fairchild Semiconductor Corporation FAN100 Rev. 1.0.3 www.fairchildsemi.com 2 5 6 7 8 F- Fairchild logo Z- Plant Code X- 1-Digit Year Code Y- 1-Digit Week Code TT: 2-Digit Die Run Code T: Package Type (M=SOP) P: Z: Pb free, Y: Green Package M: Manufacture Flow Code 4 3 2 1 ZXYTT FAN100 TPM Figure 4. Top Mark Pin Configuration GATE CS GND VDD COMI GND COMV VS FAN100 — Primary-Side-Control PWM Controller Marking Information Figure 5. Pin Configuration Pin Definitions Pin # Name Description 1 CS 2 GND Ground. 3 COMI Constant Current Loop Compensation. this pin connects a capacitor and a resistor between COMI and GND for compensation current loop gain. 4 COMV Constant Voltage Loop Compensation. this pin connects a capacitor and a resistor between COMV and GND for compensation voltage loop gain. 5 VS 6 GND Ground. 7 VDD Supply. The power supply pin. IC operating current and MOSFET driving current are supplied using this pin. This pin is connected to an external VDD capacitor of typically 10 µF. The threshold voltages for startup and turn-off are 16 V and 5 V, respectively. The operating current is lower than 5 mA. 8 GATE PWM Signal Output. This pin outputs PWM signal and includes the internal totem-pole output driver to drive the external power MOSFET. The clamped gate output voltage is 18 V. Current Sense. This pin connects a current-sense resistor to sense the MOSFET current for peak-current-mode control in CV mode and provides for output-current regulation in CC mode. Voltage Sense. This pin detects the output voltage information and discharge time based on voltage of auxiliary winding. This pin connects two divider resistors and one capacitor. © 2009 Fairchild Semiconductor Corporation FAN100 Rev. 1.0.3 www.fairchildsemi.com 3 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Min. (1,2) Max. Unit 30 V VDD DC Supply Voltage VVS VS Pin Input Voltage -0.3 7.0 V VCS CS Pin Input Voltage -0.3 7.0 V VCOMV Voltage Error Amplifier Output Voltage -0.3 7.0 V VCOMI Voltage Error Amplifier Output Voltage -0.3 7.0 V PD Power Dissipation (TA＜50°C) 660 mW ΘJA Thermal Resistance (Junction-to-Air) 150 °C /W ΘJC Thermal Resistance (Junction-to-Case) TJ TSTG TL ESD Operating Junction Temperature Storage Temperature Range -55 Lead Temperature (Wave Soldering or IR, 10 Seconds) Electrostatic Discharge Capability 39 °C /W +150 °C +150 °C +260 °C Human Body Model, JEDEC: JESD22-A114 4.5 Charged Device Model, JEDEC: JESD22-C101 2.0 FAN100 — Primary-Side-Control PWM Controller Absolute Maximum Ratings KV Notes: 1. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. 2. All voltage values, except differential voltages, are given with respect to GND pin. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol TA Parameter Conditions Operating Ambient Temperature © 2009 Fairchild Semiconductor Corporation FAN100 Rev. 1.0.3 Min. -40 Typ. Max. Unit +125 °C www.fairchildsemi.com 4 VDD=15 V and TA=-40°C~+125°C (TA=TJ), unless otherwise specified. Symbol Parameter Conditions Min. Typ. Max. Units 25 V VDD Section VOP Continuously Operating Voltage VDD-ON Turn-On Threshold Voltage 15 16 17 V VDD-OFF Turn-Off Threshold Voltage 4.5 5.0 5.5 V IDD-OP Operating Current VDD=20 V, fS=fOSC, VVS=2 V, VCS=3 V, CL=1 nF 3.5 5.0 mA IDD-ST Startup Current 0< VDD < VDD-ON-0.16 V 3.7 10.0 μA IDD-GREEN Green Mode Operating Supply Current VDD=20 V, VVS=2.7 V, fS=fOSC-N-MIN, VCS=0 V, CL=1 nF, VCOMV=0 V 1.0 2.5 mA VDD-OVP VDD Over-Voltage Protection Level VCS=3 V, VVS=2.3 V 27 28 29 V tD-VDDOVP VDD Over-Voltage Protection Debounce Time fS=fOSC, VVS=2.3 V 100 250 400 μs Center Frequency TA=25°C 39.0 42.0 45.0 Frequency Hopping Range TA=25°C ±1.8 ±2.6 ±3.6 Oscillator Section fOSC tFHR fOSC-N-MIN Frequency FAN100 — Primary-Side-Control PWM Controller Electrical Characteristics KHz Frequency Hopping Period TA=25°C Minimum Frequency at No Load fOSC-CM-MIN Minimum Frequency at CCM 3 ms VVS=2.7 V, VCOMV=0 V 550 Hz VVS=2.3 V, VCS=0.5 V 20 KHz fDV Frequency Variation vs. VDD Deviation fDT Frequency Variation vs. Temperature TA=-40°C to 125°C Deviation TA=25°C, VDD=10 V to 25 V 5 % 20 % Voltage-Sense Section IVS-UVP Itc VBIAS-COMV Sink Current for Brownout Protection RVS=20 KΩ IC Compensation Bias Current Adaptive Bias Voltage Dominated by VCOMV VCOMV=0 V, TA=25°C, RVS=20 KΩ 180 μA 9.5 μA 1.4 V Current-Sense Section tPD Propagation Delay to GATE Output 100 200 ns tMIN-N Minimum On Time at No Load VVS=-0.8 V, RS=2 KΩ, VCOMV=1 V 1100 ns tMINCC Minimum On Time in CC Mode VVS=0 V, VCOMV=2 V 300 ns 1.3 V VTH Threshold Voltage for Current Limit Continued on following page… © 2009 Fairchild Semiconductor Corporation FAN100 Rev. 1.0.3 www.fairchildsemi.com 5 VDD=15 V and TA=-40°C~+125°C (TA=TJ), unless otherwise specified. Symbol Parameter Conditions Min. Typ. Max. Units 2.475 2.500 2.525 V Voltage-Error-Amplifier Section VVR Reference Voltage VN Green Mode Starting Voltage on COMV Pin fS=fOSC-2 KHz VVS=2.3 V 2.8 V VG Green Mode Ending Voltage on COMV Pin fS=1 KHz 0.8 V Output Sink Current VVS=3 V, VCOMV=2.5 V 90 μA Output Source Current VVS=2 V, VCOMV=2.5 V 90 μA Output High Voltage VVS=2.3 V IV-SINK IV-SOURCE VV-HGH 4.5 V Current-Error-Amplifier Section VIR Reference Voltage II-SINK Output Sink Current VCS=3 V, VCOMI=2.5 V 55 μA Output Source Current VCS=0 V, VCOMI=2.5 V 55 μA Output High Voltage VCS=0 V II-SOURCE VI-HGH 2.475 2.500 2.525 4.5 V V FAN100 — Primary-Side-Control PWM Controller Electrical Characteristics (Continued) Gate Section DCYMAX Maximum Duty Cycle 75 % VOL Output Voltage Low VDD=20 V, IO=10 mA VOH Output Voltage High VDD=8 V, IO=1 mA 5 V VOH_MIN Output Voltage High VDD=5.5 V, IO=1 mA 4 V tr Rising Time VDD=20 V, CL=1 nF 200 300 ns tf Falling Time VDD=20 V, CL=1 nF 80 150 ns Output Clamp Voltage VDD=25 V 15 18 V VCLAMP 1.5 V Over-Temperature-Protection Section TOTP Threshold Temperature for OTP © 2009 Fairchild Semiconductor Corporation FAN100 Rev. 1.0.3 +140 o C www.fairchildsemi.com 6 5.5 16.6 5.3 VDD-OFF (V) VDD-ON (V) 17 16.2 15.8 15.4 5.1 4.9 4.7 15 4.5 -40 -30 -15 0 25 50 75 85 100 125 -40 -30 -15 0 Temperature (ºC) Figure 6. Turn-On Threshold Voltage (VDD-ON) vs. Temperature 75 85 100 125 47 45 fOSC (KHz) 3.6 IDD-OP (mA) 50 Figure 7. Turn-Off Threshold Voltage (VDD-OFF) vs. Temperature 4 3.2 2.8 2.4 43 41 39 37 2 35 -40 -30 -15 0 25 50 75 85 100 125 -40 -30 -15 Temperature (ºC) 0 25 50 75 85 100 125 Temperature (ºC) Figure 8. Operating Current (IDD-OP) vs. Temperature Figure 9. Center Frequency (fOSC) vs. Temperature 2.525 2.525 2.515 2.515 2.505 2.505 VIR (V) VVR (V) 25 Temperature (ºC) FAN100 — Primary-Side-Control PWM Controller Typical Performance Characteristics 2.495 2.485 2.495 2.485 2.475 2.475 -40 -30 -15 0 25 50 75 85 100 125 -40 Temperature (ºC) -15 0 25 50 75 85 100 125 Temperature (ºC) Figure 10. Reference Voltage (VVR) vs. Temperature © 2009 Fairchild Semiconductor Corporation FAN100 Rev. 1.0.3 -30 Figure 11. Reference Voltage (VIR) vs. Temperature www.fairchildsemi.com 7 23 600 22 fOSC-CM-MIN (KHz) fOSC-N-MIN (Hz) 580 560 540 520 21 20 19 18 500 17 -40 -30 -15 0 25 50 75 85 100 125 -40 -30 -15 Temperature (ºC) 25 50 75 85 100 125 Temperature (ºC) Figure 12. Minimum Frequency at No Load (fOSC-N-MIN) vs. Temperature Figure 13. Minimum Frequency at CCM (fOSC-CM-MIN) vs. Temperature 1250 30 25 1170 20 tMIN-N (ns) SG (kHz/V) 0 15 10 FAN100 — Primary-Side-Control PWM Controller Typical Performance Characteristics 1090 1010 930 5 0 850 -40 -30 -15 0 25 50 75 85 100 125 -40 -30 -15 0 Temperature (ºC) 25 50 75 85 100 125 Temperature (ºC) Figure 14. Green Mode Frequency Decreasing Rate (SG) vs. Temperature Figure 15. Minimum On Time at No Load (tMIN-N) vs. Temperature 3 1 2.5 0.8 VG (V) VN (V) 2 1.5 0.6 0.4 1 0.2 0.5 0 0 -40 -30 -15 0 25 50 75 85 100 125 -40 Temperature (ºC) -15 0 25 50 75 85 100 125 Temperature (ºC) Figure 16. Green Mode Starting Voltage on COMV Pin (VN) vs. Temperature © 2009 Fairchild Semiconductor Corporation FAN100 Rev. 1.0.3 -30 Figure 17. Green Mode Ending Voltage on COMV Pin (VG) vs. Temperature www.fairchildsemi.com 8 95 95 92 91 IV-SOURCE (µA) IV-SINK (µA) 89 86 83 80 87 83 79 77 74 75 -40 -30 -15 0 25 50 75 85 100 125 -40 -30 -15 0 Temperature (ºC) Figure 18. Output Sink Current (IV-SINK) vs. Temperature 50 75 85 100 125 Figure 19. Output Source Current (IV-SOURCE) vs. Temperature 60 60 58 58 II-SOURCE (µA) II-SINK (µA) 25 Temperature (ºC) 56 54 52 FAN100 — Primary-Side-Control PWM Controller Typical Performance Characteristics 56 54 52 50 50 -40 -30 -15 0 25 50 75 85 100 125 -40 Temperature (ºC) -30 -15 0 25 50 75 85 100 125 Temperature (ºC) Figure 20. Output Sink Current (II-SINK) vs. Temperature Figure 21. Output Source Current (II-SOURCE) vs. Temperature 80 DCYMAX (%) 76 72 68 64 60 -40 -30 -15 0 25 50 75 85 100 125 Temperature (ºC) Figure 22. Maximum Duty Cycle (DCYMAX) vs. Temperature © 2009 Fairchild Semiconductor Corporation FAN100 Rev. 1.0.3 www.fairchildsemi.com 9 Figure 23 shows the basic circuit diagram of a primaryside regulated flyback converter and its typical waveforms are shown in Figure 24. Generally, discontinuous conduction mode (DCM) operation is preferred for primary-side regulation since it allows better output regulation. The operation principles of DCM flyback converter are as follows: Of the two error voltages, VCOMV and VCOMI, the smaller determines the duty cycle. During constant voltage regulation mode, VCOMV determines the duty cycle while VCOMI is saturated to HIGH. During constant current regulation mode, VCOMI determines the duty cycle while VCOMV is saturated to HIGH. ID Np:Ns During the MOSFET on time (tON), input voltage (VDL) is applied across the primary side inductor (Lm). Then, MOSFET current (Ids) increases linearly from zero to the peak value (Ipk). During this time, the energy is drawn from the input and stored in the inductor. Io D + VDL - VAC When the MOSFET is turned off, the energy stored in the inductor forces the rectifier diode (D) to be turned on. While the diode is conducting, the output voltage (Vo), together with diode forward-voltage drop (VF), is 2 applied across the secondary-side inductor (Lm×Ns / 2 Np ) and the diode current (ID) decreases linearly from the peak value (Ipk× Np/Ns) to zero. At the end of inductor current discharge time (tDIS), all the energy stored in the inductor has been delivered to the output. Lm VO L O A D Ids EA_I CS IO Estimator VCOMI RCS Ref VS tDIS Detector PWM Control NA VDD VCOMV VO Estimator EA_V + - Gate When the diode current reaches zero, the transformer auxiliary winding voltage (Vw) begins to oscillate by the resonance between the primary-side inductor (Lm) and the effective capacitor loaded across the MOSFET. + VF - RS1 Ref RS2 Primary-Side Regulation Controller + Vw - FAN100 — Primary-Side-Control PWM Controller Functional Description Figure 23. Simplified PSR Flyback Converter Circuit During the inductor current discharge time, the sum of output voltage and diode forward-voltage drop is reflected to the auxiliary winding side as (Vo+VF)× Na/Ns. Since the diode forward-voltage drop decreases as current decreases, the auxiliary winding voltage reflects the output voltage best at the end of diode conduction time where the diode current diminishes to zero. Thus, by sampling the winding voltage at the end of the diode conduction time, the output voltage information can be obtained. The internal error amplifier for output voltage regulation (EA_V) compares the sampled voltage with internal precise reference to generate error voltage (VCOMV), which determines the duty cycle of the MOSFET in CV mode. IDS (MOSFET Drain-to-Source Current) I pk ID (Diode Current) I pk ⋅ NP NS I D.avg = I o Meanwhile, the output current can be estimated using the peak drain current and inductor current discharge time since output current is the same as average of the diode current in steady state. Vw (Auxiliary Winding Voltage) VF ⋅ The output current estimator detects the peak value of the drain current with a peak detection circuit and calculates the output current using the inductor discharge time (tDIS) and switching period (ts). This output information is compared with the internal precise reference to generate error voltage (VCOMI), which determines the duty cycle of the MOSFET in CC mode. With Fairchild’s innovative technique, TRUECURRENT™, constant current (CC) output can be precisely controlled. NA NS VO ⋅ tON NA NS tDIS tS Figure 24. Key Waveforms of DCM Flyback Converter © 2009 Fairchild Semiconductor Corporation FAN100 Rev. 1.0.3 www.fairchildsemi.com 10 Built-in temperature compensation provides constant voltage regulation over a wide range of temperature variation. This internal compensation current compensates the forward-voltage drop variation of the secondary side rectifier diode. ts ts Green-Mode Operation The FAN100 uses voltage regulation error amplifier output (VCOMV) as an indicator of the output load and modulates the PWM frequency as shown in Figure 25 such that the switching frequency decreases as load decreases. In heavy-load conditions, the switching frequency is fixed at 42 KHz. Once VCOMV decreases below 2.8 V, the PWM frequency starts to linearly decrease from 42 KHz to 550Hz to reduce the switching losses. As VCOMV decreases below 0.8V, the switching frequency is fixed at 550Hz and FAN100 enters into “deep green” mode, where the operating current reduces to 1mA, reducing the standby power consumption. ts fs 44.6kHz 42.0kHz 39.4kHz t 3ms Switching Frequency Figure 26. Frequency Hopping 42kHz Startup Deep Green Mode Green Mode Figure 27 shows the typical startup circuit and transformer auxiliary winding for FAN100 application. Before FAN100 begins switching, it consumes only startup current (maximum 10 μA) and the current supplied through the startup resistor charges the VDD capacitor (CDD). When VDD reaches turn-on voltage of 16 V (VDD-ON), FAN100 begins switching, and the current consumed increases to 3.5 mA. Then, the power required for FAN100 is supplied from the transformer auxiliary winding. The large hysteresis of VDD provides more hold-up time, which allows using small capacitor for VDD. Normal Mode 550Hz 0.8V 2.8V FAN100 — Primary-Side-Control PWM Controller Gate Drive Signal Temperature Compensation VCOMV Figure 25. Switching Frequency in Green Mode VDL + Leading-Edge Blanking (LEB) At the instant the MOSFET is turned on, a high-current spike occurs through the MOSFET, caused by primaryside capacitance and secondary-side rectifier reverse recovery. Excessive voltage across the RCS resistor can lead to premature turn-off of the MOSFET. FAN100 employs an internal leading edge blanking (LEB) circuit to inhibit the PWM comparator for a short time after the MOSFET turns on. External RC filtering is not required. CDL - Np RSTART DDD CDD AC line NA FAN100 1 Frequency Hopping 2 EMI reduction is accomplished by frequency hopping, which spreads the energy over a wider frequency range than the bandwidth measured by the EMI test equipment. FAN100 has an internal frequency-hopping circuit that changes the switching frequency between 39.4 kHz and 44.6 kHz with a period of 3 ms, as shown in Figure 26. 3 4 CS COMR COMI COMV GATE 8 VDD SGND VS 7 RS1 6 5 RS2 Figure 27. Startup Circuit © 2009 Fairchild Semiconductor Corporation FAN100 Rev. 1.0.3 www.fairchildsemi.com 11 VDD Over-Voltage Protection (OVP) VDD over-voltage protection prevents damage from overvoltage conditions. If the VDD voltage exceeds 28 V by open-feedback condition, OVP is triggered. The OVP has a debounce time (typical 250 µs) to prevent false triggering by switching noise. It also protects other switching devices from over voltage. The FAN100 has several self-protective functions, such as Over-Voltage Protection (OVP), Over-Temperature Protection (OTP), and brownout protection. All the protections are implemented as auto-restart mode. When auto-restart protection is triggered, switching is terminated and the MOSFET remains off. This causes VDD to fall. When VDD reaches the VDD turn-off voltage of 5 V, the current consumed by FAN100 reduces to the startup current (maximum 10 µA) and the current supplied startup resistor charges the VDD capacitor. When VDD reaches the turn-on voltage of 16 V, FAN100 resumes normal operation. In this manner, the autorestart alternately enables and disables the switching of the MOSFET until the fault condition is eliminated (see Figure 28). VDS Over-Temperature Protection (OTP) The built-in temperature-sensing circuit shuts down PWM output if the junction temperature exceeds 140°C. Brownout Protection FAN100 detects the line voltage using auxiliary winding voltage since the auxiliary winding voltage reflects the input voltage when the MOSFET is turned on. VS pin is clamped at 1.15 V while the MOSFET is turned on and brownout protection is triggered if the current out of VS pin is less than IVS-UVP (typical 180 µA) during the MOSFET conduction. Fault Occurs Power On Fault Removed Pulse-by-pulse Current Limit When the sensing voltage across the current sense resistor exceeds the internal threshold of 1.3 V, the MOSFET is turned off for the remainder of the switching cycle. In normal operation, the pulse-by-pulse current limit is not triggered since the peak current is limited by the control loop. VDD FAN100 — Primary-Side-Control PWM Controller Protections 16V 5V Operating Current 3.5mA 10µA Normal Operation Fault Situation Normal Operation Figure 28. Auto-Restart Operation © 2009 Fairchild Semiconductor Corporation FAN100 Rev. 1.0.3 www.fairchildsemi.com 12 Application Fairchild Devices Input Voltage Range Output Offline LED Driver FAN100 90~265 VAC 24 V/0.35 A (8.4 W) Features High Efficiency (>77% at Full Load) Tight Output Regulation (CC:±5%) 34 82 32 AC90V AC120V AC230V AC264V 30 81 28 80 26 24 79 Output Voltage (V) Efficiency (%) 22 78 77 76 20 18 16 14 12 75 FAN100 — Primary-Side-Control PWM Controller Typical Application Circuit (Primary-Side Regulated Offline LED Driver) 10 8 74 6 4 73 2 72 0 90 120 150 180 210 240 270 0 50 100 150 200 250 300 350 400 Output current (mA) Line Voltage (Vac) Figure 29. Measured Efficiency and Output Regulation 1nF 47Ω CSN2 RSN2 IO 1mH VO BD 0.5A/600V 2A/200V VDL + CDL2 4.7µF CDL1 4.7µF DR RSN1 CSN1 120kΩ 4.7nF N1 N3 CO RSTART - 220µF DSN 2M DDD 1N4007 CDD AC line 1N4007 N2 10µF FAN100 1 CS 2 3 4 GATE 8 GND VDD COMI GND COMV VS 7 RGATE 2N60 RS1 10Ω 150kΩ 6 RCS 5 0.8Ω RS2 100Ω 20kΩ 4.7nF 68nF CCOMI 200kΩ R COMI CCOMV CS RCOMV 47pF 51kΩ Figure 30. Typical Application Circuit Schematic © 2009 Fairchild Semiconductor Corporation FAN100 Rev. 1.0.3 www.fairchildsemi.com 13 FAN100 — Primary-Side-Control PWM Controller Typical Application Circuit (Continued) Transformer Specification Core: EFD-20 Bobbin: EFD-20 Pin Specification Primary-Side Inductance 3－4 1.08 mH ± 5% Primary-Side Effective Leakage 3－4 35 µH ± 5%. © 2009 Fairchild Semiconductor Corporation FAN100 Rev. 1.0.3 Remark 100 kHz, 1 V Short one of the secondary windings www.fairchildsemi.com 14 FAN100 — Primary-Side-Control PWM Controller Physical Dimensions 0.65 A 4.90±0.10 (0.635) 5 8 B 1.75 6.00±0.20 1 PIN ONE INDICATOR 5.60 3.90±0.10 4 1.27 1.27 0.25 C B A LAND PATTERN RECOMMENDATION SEE DETAIL A 0.175±0.75 0.22±0.30 C 1.75 MAX 0.10 0.42±0.09 OPTION A - BEVEL EDGE (0.86) x 45° R0.10 GAGE PLANE R0.10 OPTION B - NO BEVEL EDGE 0.36 NOTES: UNLESS OTHERWISE SPECIFIED 8° 0° A) THIS PACKAGE CONFORMS TO JEDEC MS-012, VARIATION AA. B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS. D) LANDPATTERN STANDARD: SOIC127P600X175-8M. E) DRAWING FILENAME: M08Arev15 F) FAIRCHILD SEMICONDUCTOR. SEATING PLANE 0.65±0.25 (1.04) DETAIL A SCALE: 2:1 Figure 31. 8-Lead, Small Outline Package (SOP-8) Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2009 Fairchild Semiconductor Corporation FAN100 Rev. 1.0.3 www.fairchildsemi.com 15 FAN100 — Primary-Side-Control PWM Controller © 2009 Fairchild Semiconductor Corporation FAN100 Rev. 1.0.3 www.fairchildsemi.com 16