FAIRCHILD FSEZ1216

FSEZ1216 — Primary-Side-Regulation PWM Integrated
Power MOSFET
Features
Description
ƒ
Constant-Voltage (CV) and Constant-Current (CC)
Control without Secondary-Feedback Circuitry
ƒ
Green-Mode Function: PWM Frequency Linearly
Decreasing
ƒ
Fixed PWM Frequency at 42kHz with Frequency
Hopping to Solve EMI Problem
ƒ
Cable Compensation in CV Mode
This highly integrated PWM controller, FSEZ1216,
provides several features to enhance the performance
of low-power flyback converters. The proprietary
topology of FSEZ1216 enables simplified circuit design
for battery charger applications. A low-cost, smaller, and
lighter charger results when compared to a conventional
design or a linear transformer. The startup current is
only 10µA, which allows use of large startup resistance
for further power saving.
ƒ
Low Startup Current: 10μA
ƒ
Low Operating Current: 3.5mA
ƒ
Peak-Current-Mode Control in CV Mode
ƒ
Cycle-by-Cycle Current Limiting
ƒ
VDD Over-Voltage Protection with Auto-Restart
Using FSEZ1216, a charger can be implemented with
few external components and minimized cost. A typical
output CV/CC characteristic is shown in Figure 1.
ƒ
VDD Under-Voltage Lockout (UVLO)
FSEZ1216 controller is available in an 8-pin DIP package.
ƒ
Fixed Over-Temperature Protection with Latch
ƒ
DIP-8 Package Available
To minimize the standby power consumption, the
proprietary green-mode function provides off-time
modulation to linearly decrease PWM frequency under
light-load conditions. This green-mode function assists
the power supply in meeting power conservation
requirements.
Applications
ƒ
Battery chargers for cellular phones, cordless
phones, PDA, digital cameras, power tools
ƒ
Replaces linear transformer and RCC SMPS
Figure 1.
Typical Output V-I Characteristic
Ordering Information
Part Number
Operating
Temperature Range
Eco
Status
FSEZ1216NY
-40°C to +105°C
Green
Package
8-Lead, Dual Inline Package (DIP-8)
Packing
Method
Tube
For Fairchild’s definition of “green” Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.
© 2008 Fairchild Semiconductor Corporation
FSEZ1216 • Rev. 1.0.0
www.fairchildsemi.com
FSEZ1216 — Primary-Side-Regulation PWM Integrated Power MOSFET
September 2008
FSEZ1216 — Primary-Side-Regulation PWM Integrated Power MOSFET
Application Diagram
Figure 2.
Typical Application
Internal Block Diagram
Brownout
Protection
Vsah
Vsah
IPK
Figure 3.
© 2008 Fairchild Semiconductor Corporation
FSEZ1216 • Rev. 1.0.0
Functional Block Diagram
www.fairchildsemi.com
2
F- Fairchild logo
Z- Plant Code
X- 1 digit year code
Y- 1 digit week code
TT: 2 digits die run code
T: Package type (N=DIP)
P: Z: Pb free, Y: Green package
M: Manufacture flow code
DXYTT
ZXYTT
EZ1216
TPM
Figure 4.
Top Mark
Pin Configuration
DRAIN
CS
COMR
GND
COMI
VDD
COMV
VS
Figure 5.
Pin Configuration
Pin Definitions
Pin #
Name
Description
1
CS
2
COMR
Analog output, cable compensation. Connect a resistor between COMR and GND for cable loss
compensation in CV mode.
3
COMI
Analog output, current compensation. Output of the current error amplifier. Connect a capacitor
between COMI pin and GND for frequency compensation.
4
COMV
Analog output, voltage compensation. Output of the voltage error amplifier. Connect a capacitor
between COMV pin and GND for frequency compensation.
5
VS
6
VDD
Supply, power supply.
7
GND
Voltage reference, ground.
8
DRAIN
Analog input, current sense. Connected to a current-sense resistor for peak-current-mode
control in CV mode. The current-sense signal is also provided for output-current regulation in
CC mode.
FSEZ1216 — Primary-Side-Regulation PWM Integrated Power MOSFET
Marking Information
Analog input, voltage sense. Output-voltage-sense input for output-voltage regulation.
Driver output, power MOSFET drain. This pin is the high-voltage power MOSFET drain.
© 2008 Fairchild Semiconductor Corporation
FSEZ1216 • Rev. 1.0.0
www.fairchildsemi.com
3
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
Min.
(1)
VVDD
DC Supply Voltage
Max.
Unit
30
V
VVS
VS Pin Input Voltage
-0.3
7.0
V
VCS
CS Pin Input Voltage
-0.3
7.0
V
VCOMV
Voltage Error Amplifier Output Voltage
-0.3
7.0
V
VCOMI
Voltage Error Amplifier Output Voltage
-0.3
7.0
V
VDS
Drain-Source Voltage
ID
Continuous Drain Current
600
V
TC=25°C
1
A
TC=100°C
0.6
A
IDM
Pulsed Drain Current
4
A
EAS
Single Pulse Avalanche Energy
33
mJ
IAR
Avalanche Current
1
A
PD
Power Dissipation (TA＜50°C)
800
mW
ΘJA
Thermal Resistance (Junction-to-Air)
113
°C /W
ΘJC
Thermal Resistance (Junction-to-Case)
67
°C /W
+150
°C
TJ
TSTG
TL
ESD
Operating Junction Temperature
Storage Temperature Range
+150
°C
Lead Temperature (Wave Soldering or IR, 10 seconds)
-55
+260
°C
Electrostatic Discharge Capability, Human Body Model,
JEDEC: JESD22-A114
2.5
KV
1250
V
Electrostatic Discharge Capability, Charged Device
Model, JEDEC: JESD22-C101
FSEZ1216 — Primary-Side-Regulation PWM Integrated Power MOSFET
Absolute Maximum Ratings
Note:
1. All voltage values, except differential voltages, are given with respect to GND pin.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
TA
Parameter
Conditions
Operating Ambient Temperature
© 2008 Fairchild Semiconductor Corporation
FSEZ1216 • Rev. 1.0.0
Min.
-40
Typ.
Max.
Unit
+105
°C
www.fairchildsemi.com
4
VDD=15V and TA=25°C unless otherwise specified.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Units
VDD Section
25
V
VDD-ON
VOP
Turn-On Threshold Voltage
15
16
17
V
VDD-OFF
Turn-Off Threshold Voltage
4.5
5.0
5.5
V
10
20
μA
3.5
5.0
mA
1
2
mA
IDD-ST
IDD-OP
Continuously Operating Voltage
Startup Current
Operating Current
0< VDD < VDD-ON-0.16V
VDD=20V, fS=fOSC, VVS=2V,
VCS=3V, CL=1nF
VDD=20V, VVS=2.7V,
fS=fOSC-N-MIN, VCS=0V, CL=1nF,
VCOMV=0V
IDD-GREEN
Green Mode Operating Supply
Current
VDD-OVP
VDD Over-Voltage-Protection
Level
VCS=3V, VVS=2.3V
27
28
29
V
tD-VDDOVP
VDD Over-Voltage-Protection
Debounce Time
fs= fOSC, VVS=2.3V
100
250
400
μs
Center Frequency
TA=25°C
39
42
45
Frequency
Hopping Range
TA=25°C
±1.8
±2.6
±3.6
Oscillator Section
fOSC
Frequency
tFHR
Frequency Hopping Period
TA=25°C
3
KHz
ms
fOSC-N-MIN
Minimum Frequency at No Load
VVS=2.7V, VCOMV=0V
550
Hz
fOSC-CM-MIN
Minimum Frequency at CCM
VVS=2.3V, VCS=0.5V
20
KHz
fDV
Frequency Variation vs. VDD
Deviation
VDD=10V to 25V
5
%
fDT
Frequency Variation vs.
Temperature Deviation
TA=-40°C to +85°C
15
%
FSEZ1216 — Primary-Side-Regulation PWM Integrated Power MOSFET
Electrical Characteristics
Voltage-Sense Section
IVS-UVP
Itc
VBIAS-COMV
Sink Current for Brownout
Protection
RVS=20KΩ
IC Compensation Bias Current
Adaptive Bias Voltage
Dominated by VCOMV
VCOMV=0V, TA=25°C, RVS=20KΩ
125
μA
9.5
μA
1.4
V
Current-Sense Section
tPD
Propagation Delay to GATE
Output
100
200
ns
tMIN-N
Minimum On Time at No Load
VVS=-0.8V, RS=2KΩ, VCOMV=1V
1100
ns
tMINCC
Minimum On Time in CC Mode
VVS=0V, VCOMV=2V
400
ns
Duty Cycle of SAW Limiter
40
%
Threshold Voltage for Current
Limit
1.3
V
DSAW
VTH
Continued on following page…
© 2008 Fairchild Semiconductor Corporation
FSEZ1216 • Rev. 1.0.0
www.fairchildsemi.com
5
VDD=15V and TA=25°C unless otherwise specified.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Units
2.475
2.500
2.525
V
Voltage-Error-Amplifier Section
VVR
Reference Voltage
VN
Green Mode Starting Voltage on
fS=fOSC-2KHz, VVS=2.3V
COMV Pin
2.8
V
VG
Green Mode Ending Voltage on
COMV Pin
fS=1KHz
0.8
V
Output Sink Current
VVS=3V, VCOMV=2.5V
90
μA
Output Source Current
VVS=2V, VCOMV=2.5V
90
μA
Output High Voltage
VVS=2.3V
IV-SINK
IV-SOURCE
VV-HGH
4.5
V
Current-Error-Amplifier Section
VIR
Reference Voltage
II-SINK
Output Sink Current
VCS=3V, VCOMI=2.5V
55
μA
Output Source Current
VCS=0V, VCOMI=2.5V
55
μA
Output High Voltage
VCS=0V
II-SOURCE
VI-HGH
2.475
2.500
2.525
V
4.5
V
Cable Compensation Section
VCOMR
Variation Test Voltage on COMR
RCOMR=100k
Pin for Cable Compensation
0.735
V
75
%
Internal MOSFET Section
DCYMAX
Maximum Duty Cycle
BVDSS
Drain-Source Breakdown
Voltage
ID=250μA, VGS=0V
∆BVDSS /∆TJ
Breakdown Voltage
Temperature Coefficient
ID=250μA, Referenced to 25°C
600
V
0.6
V/°C
IS
Maximum Continuous DrainSource Diode Forward Current
1
A
ISM
Maximum Pulsed Drain-Source
Diode Forward Current
4
A
11.5
Ω
1
μA
RDS(ON)
Static Drain-Source OnResistance
IDSS
Drain-Source Leakage Current
tD-ON
Turn-On Delay Time
tr
tD-OFF
tf
ID=0.5A, VGS=10V
9.3
VDS=600V, VGS=0V, TC=25°C
10
μA
7
24
ns
Rise Time
21
52
ns
Turn-Off Delay Time
13
36
ns
(2,3)
VDS=480V, VGS=0V, TC=100°C
VDS=300V, ID=1.1A, RG=25Ω
Fall Time
CISS
Input Capacitance
COSS
Output Capacitance
VGS=0V, VDS=25V, fS=1MHz
27
64
ns
130
170
pF
19
25
pF
FSEZ1216 — Primary-Side-Regulation PWM Integrated Power MOSFET
Electrical Characteristics
Over-Temperature-Protection Section
TOTP
Threshold Temperature for
(4)
OTP
+140
°C
Notes:
2. Pulse test: pulse width ≦ 300µs, duty cycle ≦ 2%.
3. Essentially independent of operating temperature.
4. When over-temperature protection is activated, the power system enters latch mode and output is disabled.
© 2008 Fairchild Semiconductor Corporation
FSEZ1216 • Rev. 1.0.0
www.fairchildsemi.com
6
5.5
16.6
5.3
VDD-OFF (V)
VDD-ON (V)
17
16.2
15.8
15.4
5.1
4.9
4.7
15
4.5
-40
-30
-15
0
25
50
75
85
100
125
-40
-30
-15
0
Temperature (ºC)
Figure 6.
Turn-on Threshold Voltage (VDD-ON)
vs. Temperature
Figure 7.
4.5
75
85
100
125
Turn-off Threshold Voltage (VDD-OFF)
vs. Temperature
44
fOSC (KHz)
IDD-OP (mA)
50
45
4.1
3.7
3.3
2.9
43
42
41
40
2.5
39
-40
-30
-15
0
25
50
75
85
100
125
-40
-30
-15
Temperature (ºC)
Figure 8.
0
25
50
75
85
100
125
Temperature (ºC)
Operating Current (IDD-OP)
vs. Temperature
Figure 9.
2.525
2.525
2.515
2.515
2.505
2.505
VIR (V)
VVR (V)
25
Temperature (ºC)
2.495
2.485
FSEZ1216 — Primary-Side-Regulation PWM Integrated Power MOSFET
Typical Performance Characteristics
Center Frequency (fOSC) vs. Temperature
2.495
2.485
2.475
2.475
-40
-30
-15
0
25
50
75
85
100
125
-40
Temperature (ºC)
-15
0
25
50
75
85
100
125
Temperature (ºC)
Figure 10. Reference Voltage (VVR) vs. Temperature
© 2008 Fairchild Semiconductor Corporation
FSEZ1216 • Rev. 1.0.0
-30
Figure 11. Reference Voltage (VIR) vs. Temperature
www.fairchildsemi.com
7
25
560
23
fOSC-CM-MIN (KHz)
fOSC-N-MIN (Hz)
600
520
480
440
21
19
17
400
15
-40
-30
-15
0
25
50
75
85
100
125
-40
-30
-15
Temperature (ºC)
25
75
85
100
125
Figure 13. Minimum Frequency at CCM (fOSC-CM-MIN)
vs. Temperature
1000
25
950
20
900
tMIN-N (ns)
30
15
10
5
850
800
750
0
700
-40
-30
-15
0
25
50
75
85
100
125
-40
-30
-15
0
Temperature (ºC)
25
50
75
85
100
125
Temperature (ºC)
Figure 15. Minimum On Time at No Load (tMIN-N)
vs. Temperature
Figure 14. Green Mode Frequency Decreasing Rate
(SG) vs. Temperature
5
1
4
0.8
3
0.6
VG (V)
VN (V)
50
Temperature (ºC)
Figure 12. Minimum Frequency at No Load
(fOSC-N-MIN) vs. Temperature
SG (KHz/V)
0
FSEZ1216 — Primary-Side-Regulation PWM Integrated Power MOSFET
Typical Performance Characteristics (Continued)
2
0.4
0.2
1
0
0
-40
-30
-15
0
25
50
75
85
100
-40
125
Figure 16. Green Mode Starting Voltage on
COMV Pin (VN) vs. Temperature
© 2008 Fairchild Semiconductor Corporation
FSEZ1216 • Rev. 1.0.0
-30
-15
0
25
50
75
85
100
125
Temperature (ºC)
Temperature (ºC)
Figure 17. Green Mode Ending Voltage on
COMV Pin (VG) vs. Temperature
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8
95
92
91
IV-SOURCE (µA)
IV-SINK (µA)
95
89
86
83
87
83
79
80
75
-40
-30
-15
0
25
50
75
85
100
125
-40
-30
-15
0
25
Temperature (ºC)
75
85
100
125
Figure 19. Output Source Current (IV-SOURCE)
vs. Temperature
65
65
62
62
II-SOURCE (µA)
II-SINK (µA)
Figure 18. Output Sink Current (IV-SINK)
vs. Temperature
59
56
53
59
56
53
50
50
-40
-30
-15
0
25
50
75
85
100
125
-40
-30
-15
Temperature (ºC)
0
25
50
75
85
100
125
Temperature (ºC)
Figure 20. Output Sink Current (II-SINK)
vs. Temperature
Figure 21. Output Source Current (II-SOURCE)
vs. Temperature
2
80
1.6
76
DCYMAX (%)
VCOMR (V)
50
Temperature (ºC)
FSEZ1216 — Primary-Side-Regulation PWM Integrated Power MOSFET
Typical Performance Characteristics (Continued)
1.2
0.8
0.4
72
68
64
0
60
-40
-30
-15
0
25
50
75
85
100
125
-40
Temperature (ºC)
-15
0
25
50
75
85
100
125
Temperature (ºC)
Figure 22. Variation Test Voltage on COMR Pin for
Cable Compensation (VCOMR) vs.
Temperature
© 2008 Fairchild Semiconductor Corporation
FSEZ1216 • Rev. 1.0.0
-30
Figure 23. Maximum Duty Cycle (DCYMAX)
vs. Temperature
www.fairchildsemi.com
9
The proprietary topology of FSEZ1216 enables
simplified circuit design for battery charger applications.
Without secondary feedback circuitry, the CV and CC
control can be achieved accurately. As shown in Figure
24, with the frequency-hopping and PWM operation,
EMI problems can be solved by using minimized filter
components. FSEZ1216 also provides many protection
functions. The VDD pin is equipped with over-voltage
protection, and under-voltage lockout. Pulse-by-pulse
current limiting and CC control ensure over-current
protection at heavy loads. The internal overtemperature-protection function shuts down the
controller with latch when over heated.
Figure 25. Green-Mode Operation
(Frequency vs. VCOMV)
Constant Voltage (CV) and Constant
Current (CC) Operation
The startup current is only 10µA, which allows a startup
resistor with a high resistance and a low-wattage to
supply the startup power for the controller. A 1.5MΩ,
0.25W, startup resistor and a 10µF/25V VDD hold-up
capacitor are sufficient for an AC-to-DC power adapter
with a wide input range (100VAC to 240VAC).
An innovative technique of the FSEZ1216 can
accurately achieve CV/CC characteristic output without
secondary-side voltage or current-feedback circuitry. A
feedback signal for CV/CC operation from the reflected
voltage across the primary auxiliary winding is
proportional to secondary winding, so provides
controller the feedback signal from secondary side and
achieves constant voltage output property. In constantcurrent output operation, this voltage signal is detected
and examined by the precise constant current regulation
controller, which then determines the on-time of the
MOSFET to control input power and provides constant
current output property. With feedback voltage VCS
across current sense resistor, the controller can obtain
input power of power supply. Therefore, the region of
constant current output operation can be adjusted by
current sense resistor.
Operating Current
Temperature Compensation
The operating current has been reduced to 3.5mA,
which results in higher efficiency and reduces the VDD
hold-up capacitance requirement. Once FSEZ1216
enter “deep” green mode, the operating current is
reduced to 1.2mA, assisting the power supply in
meeting the power conservation requirements.
Built-in temperature compensation provides better
constant voltage regulation at different ambient
temperatures. This internal compensation current is a
positive temperature coefficient (PTC) current that can
compensate the forward-voltage drop of the secondary
diode of varying with temperature. This variation caused
output voltage to rise at high temperature.
Figure 24. Frequency Hopping
Startup Current
FSEZ1216 — Primary-Side-Regulation PWM Integrated Power MOSFET
Functional Description
Green-Mode Operation
Figure 25 shows the characteristics of the PWM
frequency vs. the output voltage of the error amplifier
(VCOMV). The FSEZ1216 uses the positive, proportional,
output load parameter (VCOMV) as an indication of the
output load for modulating the PWM frequency. In heavy
load conditions, the PWM frequency is fixed at 42KHz.
Once VCOMV is lower than VN, the PWM frequency starts
to linearly decrease from 42KHz to 550Hz, providing
further power savings and meeting international power
conservation requirements.
© 2008 Fairchild Semiconductor Corporation
FSEZ1216 • Rev. 1.0.0
Leading-Edge Blanking (LEB)
Each time the power MOSFET is switched on, a turn-on
spike occurs at the sense-resistor. To avoid premature
termination of the switching pulse, a leading-edge
blanking time is built in. Conventional RC filtering can
therefore be omitted. During this blanking period, the
current-limit comparator is disabled and cannot switch
off gate driver.
www.fairchildsemi.com
10
Under-Voltage Lockout (UVLO)
Gate Output
The turn-on and turn-off thresholds of the FSEZ1216
are fixed internally at 16V and 5V. During startup, the
hold-up capacitor must be charged to 16V through the
startup resistor to enable the FSEZ1216. The hold-up
capacitor continues to supply VDD until power can be
delivered from the auxiliary winding of the main
transformer. VDD must not drop below 5V during startup.
The UVLO hysteresis window ensures the hold-up
capacitor is adequate to supply VDD during startup.
The BiCMOS output stage is a fast totem-pole gate
driver. Cross conduction has been avoided to minimize
heat dissipation, increase efficiency, and enhance
reliability. The output driver is clamped by an internal
15V Zener diode to protect the internal power MOSFET
transistors against undesired over-voltage gate signals.
Built-in Slope Compensation
The sensed voltage across the current-sense resistor is
used for current-mode control and pulse-by-pulse
current limiting. Built-in slope compensation improves
stability and prevents sub-harmonic oscillations due to
peak-current-mode control. A synchronized, positively
sloped ramp is built-in at each switching cycle.
VDD Over-Voltage Protection (OVP)
VDD over-voltage protection prevents damage due to
over-voltage conditions. When the VDD voltage exceeds
28V due to abnormal conditions, PWM pulses are
disabled until the VDD voltage drops below the UVLO,
then starts again. Over-voltage conditions are usually
caused by open feedback loops.
Noise Immunity
Noise from the current sense or the control signal can
cause significant pulse-width hopping, particularly in
continuous-conduction
mode.
While
slope
compensation helps alleviate these problems, further
precautions should still be taken. Good placement and
layout practices should be followed. Avoiding long PCB
traces and component leads, locating compensation
and filter components near the FSEZ1216.
Over-Temperature Protection (OTP)
The FSEZ1216 has a built-in temperature sensing
circuit to shut down PWM output once the junction
temperature exceeds 140°C. While PWM output is shut
down, the VDD voltage gradually drops to the UVLO
voltage. Some of the internal circuits are shut down and
VDD gradually starts increasing again. When VDD
reaches 16V, all the internal circuits, including the
temperature-sensing circuit, start operating normally. If
the junction temperature is still higher than 140°C, the
PWM controller shuts down immediately. This situation
continues until the temperature drop below 110°C.
© 2008 Fairchild Semiconductor Corporation
FSEZ1216 • Rev. 1.0.0
FSEZ1216 — Primary-Side-Regulation PWM Integrated Power MOSFET
Functional Description (Continued)
www.fairchildsemi.com
11
2
R3
CR22R
100K
N7
4.7nF/1KV N6
+C3
10uF/400V
D6
1N4007
1
L4 1mH
1
N14
5A60
2
R5
750K
N9
L2
2
+
N10
4
C7
D7
FR103
3
2
N17
P1
+
C8
R8
R6
CR270R
P2
8
AGND
EE16
AGND
+
C6
1
10uF/50V
R7
137K
U1
CS
1
2
COMR
3
COMI
COMV
4
CS
DRAIN
COMR
GND
COMI
VDD
COMV
VS
8
7
6
VDD
5
VS
R14
C12 30K
47pF
FSEZ1216
C9
R12
1R3
R9
68K 1uF
C10
R10
200K
68nF
R11
10nF
C11
56K
Figure 26. 5W (5V/1A) Application Circuit
BOM
Designator
Part Type
Designator
Part Type
D1, D2, D3, D4, D6
1N4007
D5
SB560
R3
R 22Ω
D7
FR103
R4, R5
R 750KΩ
C1
1nF
R6
R 270Ω
C2
EC 1µF/400V
R7
R 137KΩ
C3
EC 10µF/400V
R8
R 510Ω
C5
4.7nF/1KV
R9
R 68KΩ
C6
EC 10µF/50V
R10
R 200KΩ
C7
EC 470µF/16V
R11
R 56KΩ
C8
EC 220µF/10
R12
R 1.3Ω
C9
1µF
R14
R 30Ω
C10
68nF
L2
5µH
C11
10nF
L4
1mH
C12
47pF
T1
EE16 (1.5mH)
R1
R 18Ω
U1
IC FSEZ1216
© 2008 Fairchild Semiconductor Corporation
FSEZ1216 • Rev. 1.0.0
R2
VO
VO
5uH
12
N2
2
1
1
2
N4
N
1
D5
510R/1206
+ C2
1uF/400V
C5
102P
2
R4
750K
2
2
D4
1N4007
R2
TR1
470uF/16V
1
1
D3
1N4007
1
N3
C1
N13
N12
10
1
2
N1
2
L
L1
220uF/10V
1
2
D2
1N4007
2
D1
1N4007
1
1
N1
R1
18 ohm /Wire Wound
R 100KΩ
FSEZ1216 — Primary-Side-Regulation PWM Integrated Power MOSFET
Applications Information
www.fairchildsemi.com
12
9.83
9.00
6.67
6.096
8.255
7.61
3.683
3.20
5.08 MAX
7.62
0.33 MIN
3.60
3.00
(0.56)
2.54
0.56
0.355
0.356
0.20
1.65
1.27
9.957
7.87
7.62
FSEZ1216 — Primary-Side-Regulation PWM Integrated Power MOSFET
Physical Dimensions
NOTES: UNLESS OTHERWISE SPECIFIED
A) THIS PACKAGE CONFORMS TO
JEDEC MS-001 VARIATION BA
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH, AND TIE BAR EXTRUSIONS.
D) DIMENSIONS AND TOLERANCES PER
ASME Y14.5M-1994
E) DRAWING FILENAME AND REVSION: MKT-N08FREV2.
Figure 27. 8-Lead, Dual Inline Package (DIP-8)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2008 Fairchild Semiconductor Corporation
FSEZ1216 • Rev. 1.0.0
www.fairchildsemi.com
13
FSEZ1216 — Primary-Side-Regulation PWM Integrated Power MOSFET
© 2008 Fairchild Semiconductor Corporation
FSEZ1216 • Rev. 1.0.0
www.fairchildsemi.com
14