TSM4N70 Taiwan Semiconductor N-Channel Power MOSFET 700V, 3.5A, 3.3Ω FEATURES KEY PERFORMANCE PARAMETERS ● High power and current handling capability ● Pb-free plating ● RoHS compliant ● Halogen-free mold compound PARAMETER VALUE UNIT VDS 700 V RDS(on) (max) 3.3 Ω Qg 14 nC APPLICATION ● Power Supply ● Lighting TO-251 (IPAK) ITO-220 TO-252 (DPAK) Notes: Moisture sensitivity level: level 3. Per J-STD-020 ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise noted) PARAMETER SYMBOL LIMIT ITO-220 IPAK/DPAK UNIT Drain-Source Voltage VDS 700 V Gate-Source Voltage VGS ±30 V Continuous Drain Current Pulsed Drain Current TC = 25°C (Note 1) 2 3.5 1.3 1.6 IDM 8 14 A PDTOT 38 56 W ID TC = 100°C (Note 2) Total Power Dissipation @ TC = 25°C A Single Pulsed Avalanche Energy (Note 3) EAS 43 mJ Single Pulsed Avalanche Current (Note 3) IAS 3.5 A TJ, TSTG - 55 to +150 °C Operating Junction and Storage Temperature Range THERMAL PERFORMANCE PARAMETER SYMBOL LIMIT ITO-220 IPAK/DPAK UNIT Junction to Case Thermal Resistance RӨJC 3.6 2.2 °C/W Junction to Ambient Thermal Resistance RӨJA 62 50 °C/W Notes: RӨJA is the sum of the junction-to-case and case-to-ambient thermal resistances. The case thermal reference is defined at the solder mounting surface of the drain pins. RӨJA is guaranteed by design while RӨCA is determined by the user’s board design. RӨJA shown below for single device operation on FR-4 PCB in still air Document Number: DS_P0000167 1 Version: A15 TSM4N70 Taiwan Semiconductor ELECTRICAL SPECIFICATIONS (TA = 25°C unless otherwise noted) PARAMETER Static CONDITIONS SYMBOL MIN TYP MAX UNIT (Note 4) Drain-Source Breakdown Voltage VGS = 0V, ID = 250µA BVDSS 700 -- -- V Gate Threshold Voltage VDS = VGS, ID = 250µA VGS(TH) 2 -- 4 V Gate Body Leakage VGS = ±30V, VDS = 0V IGSS -- -- ±100 nA Zero Gate Voltage Drain Current VDS = 700V, VGS = 0V IDSS -- -- 25 µA Drain-Source On-State Resistance VGS = 10V, ID = 2A RDS(on) -- 2.5 3.3 Ω Qg -- 14 -- Qgs -- 3 -- Qgd -- 6 -- Ciss -- 595 -- Coss -- 80 -- Crss -- 20 -- td(on) -- 18 -- tr -- 17 -- td(off) -- 40.5 -- tf -- 19 -- VSD -- -- 1.5 Dynamic (Note 5) Total Gate Charge VDS = 480V, ID = 4A, Gate-Source Charge VGS = 10V Gate-Drain Charge Input Capacitance VDS = 25V, VGS = 0V, Output Capacitance Reverse Transfer Capacitance Switching f = 1.0MHz nC pF (Note 6) Turn-On Delay Time VDD = 300V, Turn-On Rise Time RGEN = 25Ω, Turn-Off Delay Time ID = 4A, VGS = 10V, Turn-Off Fall Time Source-Drain Diode ns (Note 4) Forward On Voltage IS = 2.5A, VGS = 0V V Notes: 1. Current limited by package 2. Pulse width limited by the maximum junction temperature 3. L = 7mH, IAS = 3.5A, VDD = 50V, RG = 25Ω, Starting TJ = 25 C 4. Pulse test: PW ≤ 300µs, duty cycle ≤ 2% 5. For DESIGN AID ONLY, not subject to production testing. 6. Switching time is essentially independent of operating temperature. o Document Number: DS_P0000167 2 Version: A15 TSM4N70 Taiwan Semiconductor ORDERING INFORMATION PART NO. TSM4N70CI C0G TSM4N70CH C5G TSM4N70CP ROG PACKAGE PACKING ITO-220 50pcs / Tube TO-251 (IPAK) 75pcs / Tube TO-252 (DPAK) 2,500pcs / 13” Reel Note: 1. Compliant to RoHS Directive 2011/65/EU and in accordance to WEEE 2002/96/EC 2. Halogen-free according to IEC 61249-2-21 definition Document Number: DS_P0000167 3 Version: A15 TSM4N70 Taiwan Semiconductor CHARACTERISTICS CURVES (TC = 25°C unless otherwise noted) Output Characteristics Transfer Characteristics Normalized Vth vs. Junction Temperature Gate Charge On-Resistance Variation vs. Temperature Maximum Safe Operating Area (ITO-220) Document Number: DS_P0000167 4 Version: A15 TSM4N70 Taiwan Semiconductor CHARACTERISTICS CURVES (TC = 25°C unless otherwise noted) Maximum Safe Operating Area (DPAK,IPAK) Normalized Thermal Transient Impedance Curve (ITO-220) Normalized Thermal Transient Impedance Curve (DPAK,IPAK) Document Number: DS_P0000167 5 Version: A15 TSM4N70 Taiwan Semiconductor PACKAGE OUTLINE DIMENSIONS (Unit: Millimeters) ITO-220 MARKING DIAGRAM G Y WW F = Halogen Free = Year Code = Week Code (01~52) = Factory Code Document Number: DS_P0000167 6 Version: A15 TSM4N70 Taiwan Semiconductor PACKAGE OUTLINE DIMENSIONS (Unit: Millimeters) TO-251 (IPAK) MARKING DIAGRAM Y = Year Code M = Month Code for Halogen Free Product O =Jan P =Feb Q =Mar R =Apr ` S =May T =Jun U =Jul V =Aug W =Sep X =Oct Y =Nov Z =Dec L = Lot Code (1~9, A~Z) Document Number: DS_P0000167 7 Version: A15 TSM4N70 Taiwan Semiconductor PACKAGE OUTLINE DIMENSIONS (Unit: Millimeters) TO-252 (DPAK) SUGGESTED PAD LAYOUT (Unit: Millimeters) MARKING DIAGRAM Y = Year Code M = Month Code for Halogen Free Product O =Jan P =Feb Q =Mar R =Apr ` S =May T =Jun U =Jul V =Aug W =Sep X =Oct Y =Nov Z =Dec L = Lot Code (1~9, A~Z) Document Number: DS_P0000167 8 Version: A15 TSM4N70 Taiwan Semiconductor Notice Specifications of the products displayed herein are subject to change without notice. TSC or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies. Information contained herein is intended to provide a product description only. No license, express or implied, to any intellectual property rights is granted by this document. Except as provided in TSC’s terms and conditions of sale for such products, TSC assumes no liability whatsoever, and disclaims any express or implied warranty, relating to sale and/or use of TSC products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications. Customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify TSC for any damages resulting from such improper use or sale. Document Number: DS_P0000167 9 Version: A15