RT7307

RT7307
Fast Startup Primary-Side Regulation Dimmable LED Driver
Controller with Active-PFC
General Description
Features
The RT7307 is a constant current LED driver with active
power factor correction. It supports high power factor
across a wide range of line voltages, and it drives the
converter in the Quasi-Resonant (QR) mode to achieve
higher efficiency. By using Primary Side Regulation
(PSR), the RT7307 controls the output current
accurately without a shunt regulator and an opto-coupler
at the secondary side, reducing the external component

count, the cost, and the volume of the driver board.

RT7307 is compatible with analog dimming. The output
current can be modulated by the DIM pin. A self
oscillation fast startup circuit is integrated in the RT7307
to minimize the power loss and shorten the start-up
time.










Tight LED Current Regulation
No Opto-Coupler and TL431 Required
Power Factor Correction (PFC)
Compatible with Analog Dimming
Fast Startup
Quasi-Resonant
Maximum/Minimum Switching Frequency
Clamping
Maximum/Minimum on-Time Limitation
Wide VDD Range (up to 34V)
THD Optimization
Input-Voltage Feed-Forward Compensation
Multiple Protection Features

LED Open-Circuit Protection
LED Short-Circuit Protection
Output Diode Short-Circuit Protection
VDD Under-Voltage Lockout
VDD Over-Voltage Protection
Over-Temperature Protection

Cycle-by-Cycle Current Limitation


The RT7307 embeds comprehensive protection
functions for robust designs, including LED open-circuit
protection, LED short-circuit protection, output diode
short-circuit protection, VDD Under-Voltage Lockout



(UVLO), VDD Over-Voltage Protection (VDD OVP),
Over-Temperature Protection (OTP), and cycle-by-cycle
current limitation.
Applications

AC/DC LED Lighting Driver
Simplified Application Circuit
For SOT-23-6 Buck-Boost Converter
TX1
BD
VOUT-
Line
CIN
COUT
RHG
DOUT
VDD
Neutral
VOUT+
Q1
RT7307 GD
CVDD
COMP
CS
CCOMP
ZCD
RPC
RCS
GND
DAUX
RZCD1
RZCD2
Copyright © 2015 Richtek Technology Corporation. All rights reserved.
DS7307-00
September
2015
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
1
RT7307
Ordering Information
Pin Configurations
(TOP VIEW)
RT7307
Package Type
S : SOP-8
E : SOT-23-6
8
NC
Lead Plating System
G : Green (Halogen Free and Pb Free)
7
GD
COMP
3
6
CS
DIM
4
5
ZCD
Note :
SOP-8
Richtek products are :

COMP ZCD CS
RoHS compliant and compatible with the current
requirements of IPC/JEDEC J-STD-020.

VDD
GND
2
6
Suitable for use in SnPb or Pb-free soldering processes.
5
4
2
3
GND VDD GD
Marking Information
SOT-23-6
RT7307GS
RT7307GS : Product Number
YMDNN : Date Code
RT7307
GSYMDNN
RT7307GE
13= : Product Code
DNN : Date Code
13=DNN
Functional Pin Description
Pin No.
Pin Name
Pin Function
SOP-8
SOT-23-6
1
--
NC
No Internal Connection.
2
1
GND
Ground of the Controller.
3
6
COMP
Compensation Node. Output of the internal trans-conductance amplifier.
4
--
DIM
Analog Dimming Signal Input. LED driving current can be adjusted by an
analog voltage.
5
5
ZCD
Zero Current Detection Input. This pin is used to sense the voltage at auxiliary
winding of the transformer.
6
4
CS
Current Sense Input. Connect this pin to the current sense resistor.
7
3
GD
Gate Driver Output for External Power MOSFET.
8
2
VDD
Supply Voltage (VDD) Input. The controller will be enabled when VDD exceeds
VTH_ON and disabled when VDD is lower than VTH_OFF.
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is a registered trademark of Richtek Technology Corporation.
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2015
RT7307
Function Block Diagram
For SOP-8 Package
Valley Signal
Valley
Detector
ZCD
Clamping
Circuit
THD
Optimizer
Feed-Forward
Compensator
Ramp
Generator
Starter
Circuit
+
VDD OVP
Constant on-Time
Comparator
Constant
Current
Control
ICS
PWM
Control
Logic
PWM
Output
Over-Voltage
Protection
CS
VCS_CL
1.2V
Leading
CS
Edge
Blanking
Under-Voltage
Lockout
(16V/9V)
UVLO
+
VDD
Over-Voltage
Protection
Gate Driver with
Self Oscillation
Startup
Current-Limit
Comparator
VDD
GD
CS
Output Diode
Short-Circuit
Protection
GND
Dimming
Control
DIM
OverTemperature
Protection
OTP
Output OVP
COMP
For SOT-23-6 Package
Valley Signal
Valley
Detector
ZCD
Clamping
Circuit
Feed-Forward
Compensator
THD
Optimizer
Ramp
Generator
Starter
Circuit
+
Constant on-Time
Comparator
Constant
Current
Control
ICS
VDD OVP
PWM
Control
Logic
PWM
Output
Over-Voltage
Protection
CS
VCS_CL
1.2V
Leading
CS
Edge
Blanking
Under-Voltage
Lockout
(16V/9V)
UVLO
+
Current-Limit
Comparator
VDD
VDD
Over-Voltage
Protection
Gate Driver with
Self Oscillation
Startup
GD
CS
Output Diode
Short-Circuit
Protection
GND
OverTemperature
Protection
OTP
Output OVP
COMP
Copyright © 2015 Richtek Technology Corporation. All rights reserved.
DS7307-00
September
2015
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
3
RT7307
Operation
Critical-Conduction Mode (CRM) with Constant
On-Time Control
Figure 1 shows a typical flyback converter with input
voltage (VIN). When main switch Q1 is turned on with
a fixed on-time (tON), the peak current (IL_PK) of the
magnetic inductor (Lm) can be calculated by the
following equation :
V
IL_PK  IN  tON
Lm
TX1
NP:NS DOUT
IL
+
COUT
Lm
VIN
VOUT
-
IOUT
ROUT
Q1
Figure 1. Typical Flyback Converter
If the input voltage is the output voltage of the
full-bridge rectifier with sinusoidal input voltage
(VIN_PKsin()), the inductor peak current (IL_PK) can be
expressed as the following equation :
IL_PK 
VIN_PK  sin(θ)  tON
Lm
When the converter operates in CRM with constant
on-time control, the envelope of the peak inductor
current will follow the input voltage waveform with
in-phase. Thus, high power factor can be achieved, as
shown in Figure 2.
VIN
Input Voltage
IL_PK
Peak Inductor Current
IQ1_DS
MOSFET Current
Iin_avg
Average Input Current
IDo
Output Diode Current
VQ1_GS
MOSFET Gate Voltage
Figure 2. Inductor Current of CRM with Constant
On-Time Control
RT7307 needs no shunt regulator and opto-coupler at
the secondary side to achieve the output current
regulation. Figure 3 shows several key waveforms of a
conventional flyback converter in Quasi-Resonant (QR)
mode, in which VAUX is the voltage on the auxiliary
winding of the transformer.
VDS
VIN
0
GD
(VGS)
VAUX
(VOUT + Vf) x Naux / NS
0
VIN x Naux / NP
Clamped by Controller
IQ1
IDOUT
Figure 3. Key Waveforms of a Flyback Converter
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is a registered trademark of Richtek Technology Corporation.
DS7307-00
September
2015
RT7307
Voltage Clamping Circuit
which is proportional to line voltage on CS to
compensate the propagation delay effect. Thus, the
output current can be equal at high and low line
voltage.
Quasi-Resonant Operation
Figure 4 illustrates how valley signal triggers PWM.
～
～
Valley
Signal
PWM
～
～
The RT7307 provides a voltage clamping circuit at ZCD
pin since the voltage on the auxiliary winding is
negative when the main switch is turned on. The lowest
voltage on ZCD pin is clamped near zero to prevent the
IC from being damaged by the negative voltage.
Meanwhile, the sourcing ZCD current (IZCD_SH),
flowing through the upper resistor (RZCD1), is sampled
and held to be a line-voltage-related signal for
propagation delay compensation. The RT7307 embeds
the programmable propagation delay compensation
through CS pin. A sourcing current ICS (equal to
IZCD_SH x KPC) applies a voltage offset (ICS x RPC)
tSTART
Valley
Signal
PWM
tS(MIN)
Valley
Signal
PWM
tS(MIN)
Valley
Signal
PWM
If
no valley signal detected for a long time, the next PWM
is triggered by a starter circuit at end of the interval
(tSTART, 130s typ.) which starts at the rising edge of
the previous PWM signal. A blanking time (tS(MIN),
8.5μs typ.), which starts at the rising edge of the
previous PWM signal, limits minimum switching period.
When the tS(MIN) interval is on-going, all of valley
signals are not allowed to trigger the next PWM signal.
After the end of the tS(MIN) interval, the coming valley
will trigger the next PWM signal. If one or more valley
signals are detected during the tS(MIN) interval and no
valley is detected after the end of the tS(MIN) interval,
the next PWM signal will be triggered automatically at
end of the tS(MIN) + 5s (typ.).
tS(MIN)
5μs
Figure 4. PWM Triggered Method
Dimming Function
An analog dimming function is embedded in RT7307.
When the voltage on the DIM pin (VDIM) is within
VDIM_LOW and VDIM_HIGH, the regulation factor of
constant current control (KCC) is linearly proportional to
VDIM, as shown in Figure 5.
KCC (V)
KCC(MAX)
0 VDIM_LOW V
DIM_HIGH
VDIM (V)
Figure 5. Dimming Curve
Copyright © 2015 Richtek Technology Corporation. All rights reserved.
DS7307-00
September
2015
is a registered trademark of Richtek Technology Corporation.
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5
RT7307
Protections
LED Open-Circuit Protection
In an event of output open circuit, the converter will be
shut down to prevent being damaged, and it will be
auto-restarted when the output is recovered. Once the
LED is open-circuit, the output voltage keeps rising,
causing the voltage on ZCD pin VZCD rising accordingly.
When the sample-and-hold ZCD voltage (VZCD_SH)
exceeds its OV threshold (VZCD_OVP, 3.2V typ.), output
OVP will be activated and the PWM output (GD pin) will
be forced low to turn off the main switch. If the output is
still open-circuit when the converter restarts, the
converter will be shut down again.
Over-Temperature Protection (OTP)
The RT7307 provides an internal OTP function to
protect the controller itself from suffering thermal stress
and permanent damage. It's not suggested to use the
function as precise control of over temperature. Once
the junction temperature is higher than the OTP
threshold (TSD, 150C typ.), the controller will shut
down until the temperature cools down by 30C (typ.).
Meanwhile, if VDD reaches falling UVLO threshold
voltage (VTH_OFF), the controller will hiccup till the over
temperature condition is removed.
Output Diode Short-Circuit Protection
When the output diode is damaged as short-circuit, the
transformer will be led to magnetic saturation and the
main switch will suffer from a high current stress. To
avoid the above situation, an output diode short-circuit
protection is built-in. When CS voltage VCS exceeds
the threshold (VCS_SD 1.7 typ.) of the output diode
short-circuit protection, RT7307 will shut down the
PWM output (GD pin) in few cycles to prevent the
converter from damage. It will be auto-restarted when
the failure condition is recovered.
VDD Under-Voltage Lockout (UVLO) and
Over-Voltage Protection (VDD OVP)
RT7307 will be enabled when VDD voltage (VDD)
exceeds rising UVLO threshold (VTH_ON, 10.4V typ.)
and disabled when VDD is lower than falling UVLO
threshold (VTH_OFF, 8.5V typ.).
When VDD exceeds its over-voltage threshold (VOVP,
37.4V typ.), the PWM output of RT7307 is shut down. It
will be auto-restarted when the VDD is recovered to a
normal level.
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is a registered trademark of Richtek Technology Corporation.
DS7307-00
September
2015
RT7307
Absolute Maximum Ratings
(Note 1)

Supply Voltage, VDD ------------------------------------------------------------------------------------------------- 0.3V to 40V

Gate Driver Output, GD --------------------------------------------------------------------------------------------- 0.3V to 20V

Other Pins -------------------------------------------------------------------------------------------------------------- 0.3V to 6V

Power Dissipation, PD @ TA = 25C
SOP-8 -------------------------------------------------------------------------------------------------------------------- 0.48W
SOT-23-6---------------------------------------------------------------------------------------------------------------- 0.42W

Package Thermal Resistance
(Note 2)
SOP-8, JA -------------------------------------------------------------------------------------------------------------- 206.9C/W
SOT-23-6, JA ---------------------------------------------------------------------------------------------------------- 235.6C/W

Lead Temperature (Soldering, 10 sec.) -------------------------------------------------------------------------- 260C

Junction Temperature ------------------------------------------------------------------------------------------------ 150C

Storage Temperature Range --------------------------------------------------------------------------------------- 65C to 150C

ESD Susceptibility
(Note 3)
HBM (Human Body Model) ----------------------------------------------------------------------------------------- 2kV
MM (Machine Model) ------------------------------------------------------------------------------------------------- 200V
Recommended Operating Conditions
(Note 4)

Supply Input Voltage, VDD ----------------------------------------------------------------------------------------- 11V to 34V

COMP Voltage, VCOMP --------------------------------------------------------------------------------------------- 0.7V to 4.3V

Junction Temperature Range -------------------------------------------------------------------------------------- 40C to 125C
Electrical Characteristics
(VDD = 15V, TA = 25C, unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Startup Section
Threshold Voltage of Current
Sense at Startup Mode_1
VCS_TH_0V
VDD = 0V
--
60
--
mV
Threshold Voltage of Current
Sense at Startup Mode_2
VCS_TH_5V
VDD = 5V
--
260
--
mV
Operating Current at Startup
Mode
IGD_ST
GD = 5V
--
7
11
A
Rising UVLO Threshold Voltage
VTH_ON
9.36
10.4
11.44
V
35.4
37.4
39.4
V
7.5
8.5
9.5
V
VDD_ET
--
10
--
V
VDD Holdup Mode Ending Point VDD_ED
--
10.5
--
V
VDD = 15V, IZCD = 0, GD open
--
2
3
mA
VDD = VTH_OFF
--
60
--
A
VDD = VTH_ON  1V
--
15
30
A
VDD Section
VDD OVP Threshold Voltage
VOVP
VDD Rising
Falling UVLO Threshold Voltage VTH_OFF
VDD Holdup Mode Entry Point
Operating Current
IDD_OP
Operating Current at Shutdown
Start-up Current
IVDD_ST
Copyright © 2015 Richtek Technology Corporation. All rights reserved.
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2015
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RT7307
ZCD Section
50
0
60
mV
VZCD_OVP
3.04
3.2
3.36
V
VDIM_LOW
250
300
350
mV
--
2.8
--
V
0.5
1
2
A
246.25
250
253.75
mV
Lower Clamp Voltage
VZCDL
ZCD OVP Threshold Voltage
IZCD = 0 to 2.5mA
Dimming Control Section
Analog Dimming Low Threshold
Voltage
Analog Dimming High Threshold
VDIM_HIGH
Voltage
DIM Sourcing Current
Constant Current Control Section
Maximum Regulated factor for
constant-current control
KCC(MAX)
Maximum Comp Voltage
VCOMP(MAX)
5
5.5
--
V
Minimum Comp Voltage
VCOMP(MIN)
--
0.5
--
V
Maximum Sourcing Current
ICOMP(MAX)
--
100
--
A
240
400
570
ns
Peak Current Shutdown Voltage
VCS_SD
Threshold
1.53
1.7
1.87
V
Peak Current Limitation at
Normal Operation
VCS_CL
1.08
1.2
1.32
V
Propagation Delay
Compensation Factor
KPC
ICS = KPC x IZCD, IZCD =
150A
--
0.042
--
A/A
Rising Time
tR
VDD = 15V, CL = 1nF
--
250
350
ns
Falling Time
tF
VDD = 15V, CL = 1nF
--
40
70
ns
Gate Output Clamping Voltage
VCLAMP
VDD = 15V, CL = 1nF
10.8
12
13.2
V
Internal Pull Low Resistor
RGD
--
40
--
k
1
1.25
1.5
s
VDIM = 3V
During start-up period
Current Sense Section
Leading Edge Blanking Time
tLEB
Gate Driver Section
Timing Control Section
IZCD = 150A
Minimum on-Time
tON(MIN)
Minimum Switching Period
tS(MIN)
7
8.5
10
s
Duration of Starter at Normal
Operation
tSTART
75
130
300
s
Maximum on-Time
tON(MAX)
--
50
--
s
Over-Temperature Protection (OTP) Section
OTP Temperature Threshold
TOTP
(Note 5)
--
150
--
C
OTP Temperature Hysteresis
TOTP-HYS
(Note 5)
--
30
--
C
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2015
RT7307
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect
device reliability.
Note 2. JA is measured at TA = 25C on a low effective two-layer thermal conductivity test board of JEDEC 51-3.
Note 3. Devices are ESD sensitive. Handling precaution recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. Guarantee by design.
Copyright © 2015 Richtek Technology Corporation. All rights reserved.
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2015
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RT7307
Typical Application Circuit
For SOP-8 with Flyback Converter
RSN2 CSN2
TX1
BD
F1
DOUT
+
Line
～
～ VOUT
COUT
RHG
CIN
CSN1
RSN1
Neutral
-
DSN
Analog
Dimming
Signal
4 DIM
8
GD
RG
6
RPC
Q1
RT7307
VDD
CVDD
CS
3
7
COMP
RCS
CCOMP
GND
5 ZCD
2
CZCD
DAUX
RAUX
RZCD1
RZCD2
For SOP-8 with Buck-Boost Converter
F1
TX1
BD
-
Line
CIN
DOUT
RHG
COUT
～ VOUT
～
+
Neutral
Analog
Dimming
Signal
4
8
GD
Q1
DIM
RT7307
VDD
CS
CVDD
3
7 RG
6
RCS
COMP
CCOMP
RPC
GND
2
5 ZCD
CZCD
RAUX
DAUX
RZCD1
RZCD2
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is a registered trademark of Richtek Technology Corporation.
DS7307-00
September
2015
RT7307
For SOT-23-6 with Flyback Converter
RSN2 CSN2
TX1
BD
F1
DOUT
+
Line
RHG
CIN
～
～ VOUT
COUT
CSN1
RSN1
Neutral
-
DSN
2
RT7307 GD 3
RG
4
RPC
Q1
VDD
CVDD
6
CS
COMP
CCOMP
RCS
5 ZCD
GND
CZCD
1
DAUX
RAUX
RZCD1
RZCD2
For SOT-23-6 with Buck-Boost Converter
F1
TX1
BD
-
Line
CIN
DOUT
RHG
COUT
～ VOUT
～
+
Neutral
RT7307 GD
2
3 RG
VDD
CVDD
6
Q1
COMP
CS
4
CCOMP
RPC
RCS
5 ZCD
CZCD
RAUX
GND
1
DAUX
RZCD1
RZCD2
Copyright © 2015 Richtek Technology Corporation. All rights reserved.
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2015
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RT7307
Typical Operating Characteristics
VOVP vs. Junction Temperature
VCS_TH_0V vs. Junction Temperature
36.7
78
36.6
76
74
VCS_TH_0V (mV)
VOVP (V)
36.5
36.4
36.3
36.2
72
70
68
66
64
36.1
62
36.0
60
-50
-25
0
25
50
75
100
125
-50
-25
Junction Temperature (°C)
25
50
75
100
125
VTH_ON vs. Junction Temperature
VCS_TH_5V vs. Junction Temperature
280
10.60
275
10.55
270
10.50
VTH_ON (V)
VCS_TH_5V (mV)
0
Junction Temperature (°C)
265
10.45
260
10.40
255
10.35
250
10.30
-50
-25
0
25
50
75
100
125
-50
-25
Junction Temperature (°C)
0
25
50
75
100
125
Junction Temperature (°C)
VTH_OFF vs. Junction Temperature
IDD_OP vs. Junction Temperature
8.60
2.00
1.95
8.56
I DD_OP (mA)
VTH_OFF (V)
1.90
8.52
8.48
1.85
1.80
1.75
8.44
1.70
8.40
1.65
-50
-25
0
25
50
75
100
125
Junction Temperature (°C)
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12
-50
-25
0
25
50
75
100
125
Junction Temperature (°C)
is a registered trademark of Richtek Technology Corporation.
DS7307-00
September
2015
RT7307
VDIM_LOW vs. Junction Temperature
VZCDL vs. Junction Temperature
25
400
20
VDIM_LOW (V)
VZCDL (mV)
380
15
10
360
340
5
0
320
-50
-25
0
25
50
75
100
125
-50
-25
Junction Temperature (°C)
0
25
50
75
100
125
Junction Temperature (°C)
KCC vs. Junction Temperature
VCOMP(MAX) vs. Junction Temperature
260
5.26
5.24
VCOMP(MAX) (V)
KCC (mV)
258
256
5.22
5.20
5.18
5.16
254
5.14
5.12
252
-50
-25
0
25
50
75
100
-50
125
-25
0
25
50
75
100
125
Junction Temperature (°C)
Junction Temperature (°C)
ICOMP(MAX) vs. Junction Temperature
tLEB vs. Junction Temperature
140
500
120
tLEB (ns)
I COMP(MAX) (A)
480
100
80
60
460
440
40
420
20
400
0
-50
-25
0
25
50
75
100
125
Junction Temperature (°C)
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DS7307-00
September
2015
-50
-25
0
25
50
75
100
125
Junction Temperature (°C)
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RT7307
VCS_SD vs. Junction Temperature
VCS_CL vs. Junction Temperature
1.850
1.30
1.28
VCS_CL (V)
VCS_SD (V)
1.825
1.800
1.26
1.24
1.22
1.775
1.20
1.750
1.18
-50
-25
0
25
50
75
100
125
-50
-25
KPC vs. Junction Temperature
25
50
75
100
125
tr vs. Junction Temperature
0.045
260
250
0.044
240
0.043
tr (ns)
KPC (A/A)
0
Junction Temperature (°C)
Junction Temperature (°C)
0.042
230
220
0.041
210
0.040
200
-50
-25
0
25
50
75
100
125
-50
-25
Junction Temperature (°C)
25
50
75
100
125
tON(MIN) vs. Junction Temperature
tf vs. Junction Temperature
1.30
51
50
1.25
tON(MIN) (μs)
49
tf (ns)
0
Junction Temperature (°C)
48
1.20
1.15
47
1.10
46
1.05
45
-50
-25
0
25
50
75
100
125
Junction Temperature (°C)
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14
-50
-25
0
25
50
75
100
125
Junction Temperature (°C)
is a registered trademark of Richtek Technology Corporation.
DS7307-00
September
2015
RT7307
tON(MAX) vs. Junction Temperature
60
140
50
130
40
tON(MAX) (μs)
tSTART (μs)
tSTART vs. Junction Temperature
150
120
110
30
20
10
100
0
90
-50
-25
0
25
50
75
100
125
Junction Temperature (°C)
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DS7307-00
September
2015
-50
-25
0
25
50
75
100
125
Junction Temperature (°C)
is a registered trademark of Richtek Technology Corporation.
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15
RT7307
Application Information
Output Current Setting
Considering the conversion efficiency, the programmed
DC level of the average output current (IOUT(t)) can be
derived as :
IOUT_CC  1  NP  KCC  CTRTX1
2 NS RCS
CTRTX1 
ISEC_PK NS

IPRI_PK NP
in which CTRTX1 is the current transfer ratio of the
transformer TX1, ISEC_PK is the peak current of the
secondary side, and IPRI_PK is the peak current of the
primary side. CTRTX1 can be estimated to be 0.9.
According to the above parameters, current sense
resistor RCS can be determined as the following
equation :
RCS  1  NP  KCC  CTRTX1
2 NS IOUT_CC
Propagation Delay Compensation Design
The VCS deviation (VCS) caused by propagation delay
IZCD_SH can be expressed as :
IZCD_SH 
KRAMP is a constant in the ramp generator, and its
typical value is 3.1109 V/(sec  A).
VD is the offset of the constant on-time comparator, and
its typical value is 0.63V. It is recommended to design
VCOMP = 2 to 3V. If the COMP voltage is over its
recommended operating range (0.7 to 4.3V), output
current regulation may be affected. Thus, the resistors
RZCD1 can be determined according to the above
parameters.
Minimum On-Time Setting
The RT7307 limits a minimum on-time (tON(MIN)) for
each switching cycle. The tON(MIN) can be derived from
the following equations.
tON(MIN)  IZCD_SH  187.5p  sec  A (typ.)
Thus, RZCD1 can be determined by:
RZCD1 
effect can be derived as:
V  t R
VCS  IN D CS ,
Lm
VIN  NA
RZCD1  NP
tON(MIN)  VIN NA

(typ.)
187.5p
NP
In addition, the current flowing out of ZCD pin must be
lower than 2.5mA (typ.). Thus, the RZCD1 is also
determined by :
in which tD is the delay period which includes the
propagation delay of RT7307 and the turn-off transition
RZCD1 
of the main MOSFET. The sourcing current from CS pin
of RT7307 (ICS) can be expressed as :
where the VAC(MAX) is maximum input AC voltage.
N
ICS  KPC  VIN  A  1
NP RZCD1
where NA is the turns number of the auxiliary winding.
RPC can be designed by :
RPC 
VCS tD  RCS  RZCD1 NP


ICS
Lm  KPC
NA
Feed-Forward Compensation Design
2  VAC(MAX) NA

2.5m
NP
Output Over-Voltage Protection Setting
Output OVP is achieved by sensing the voltage on the
auxiliary winging. It is recommended that output OV
level (VOUT_OVP) is set at 120% of nominal output
voltage (VOUT). Thus, RZCD1 and RZCD2 can be
determined by the equation as :
RZCD2
N
VOUT  A 
 120%  3.2V(typ.)
NS RZCD1  RZCD2
The COMP voltage, VCOMP, is a function of the
sample-and-hold ZCD current (IZCD_SH) as following :
Thermal Considerations
t
VCOMP = IZCD_SH   ON   KRAMP  tON + VD
 tS 
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
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is a registered trademark of Richtek Technology Corporation.
DS7307-00
September
2015
RT7307
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature.
The maximum power dissipation can be calculated by
the following formula :
PD(MAX) = (TJ(MAX) − TA ) / θJA
Layout Considerations
A proper PCB layout can abate unknown noise
interference and EMI issue in the switching power
supply. Please refer to the guidelines when designing a
PCB layout for switching power supply :

Where TJ(MAX) is the maximum junction temperature,
TA is the ambient temperature, and θJA is the junction
to ambient thermal resistance.
MOSFET, RCS return to the ground of the IC is also
a high frequency current loop. They must be as short
as possible to decrease noise coupling and kept a
space to other low voltage traces, such as IC control
circuit paths, especially. Besides, the path(3)
between MOSFET ground(b) and IC ground(d) is
recommended to be as short as possible, too.
For recommended operating condition specifications,
the maximum junction temperature is 125°C. The
junction to ambient thermal resistance, θJA, is layout
dependent. For SOP-8 packages, the thermal
resistance, θJA, is 206.9°C/W on a standard JEDEC
51-3 two-layer thermal test board. For SOT-23-6
packages, the thermal resistance, θJA, is 235.6°C/W
on a standard JEDEC 51-3 two-layer thermal test
board.The maximum power dissipation at TA= 25°C
can be calculated by the following formula:
PD(MAX) = (125°C − 25°C) / (206.9°C/W) = 0.48W for
SOP-8 package.
The current path(1) from input capacitor, transformer,
MOSFET, RCS return to input capacitor is a high
frequency current loop. The path(2) from GD pin,

The path(4) from RCD snubber circuit to MOSFET is
a high switching loop. Keep it as small as possible.

The path(5) from input capacitor to GD pin is a high
voltage loop. Keep a space from path(5) to other low
voltage traces.
The maximum power dissipation depends on the
It is good for reducing noise, output ripple and EMI
issue to separate ground traces of input capacitor(a),
MOSFET(b), auxiliary winding(c) and IC control
circuit(d). Finally, connect them together on input
operating ambient temperature for fixed TJ(MAX) and
thermal resistance, θJA. The derating curve in Figure 6
capacitor ground(a). The areas of these ground
traces should be kept large.

PD(MAX) = (125°C − 25°C) / (235.6°C/W) = 0.42W for
SOT-23-6 package.
allows the designer to see the effect of rising ambient
temperature on the maximum power dissipation.
Maximum Power Dissipation (W)1
0.6

To minimize parasitic trace inductance and EMI,
minimize the area of the loop connecting the
secondary winding, the output diode, and the output
filter capacitor. In addition, apply sufficient copper
area at the anode and cathode terminal of the diode
Two-Layer PCB
0.5
SOP-8
for heat-sinking. It is recommended to apply a larger
area at the quiet cathode terminal. A large anode
0.4
SOT-23-6
area will induce high-frequency radiated EMI.
0.3
0.2
0.1
0.0
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 6. Derating Curve of Maximum Power
Dissipation
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DS7307-00
September
2015
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
17
RT7307
Line
～
～
CIN
Neutral
(5)
(4)
(a)
DM
RT7307
GD
VDD
CVDD
CS
COMP
CCOMP
(2)
(1)
GND
ZCD
(d)
(3)
Input Capacitor
Ground (a)
(b)
CZCD
Trace
Trace
IC
Ground (d)
Trace
Auxiliary
Ground (c)
MOSFET
Ground (b)
(c)
Figure 7. PCB Layout Guide
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is a registered trademark of Richtek Technology Corporation.
DS7307-00
September
2015
RT7307
Outline Dimension
Dimensions In Millimeters
Symbol
Dimensions In Inches
Min
Max
Min
Max
A
4.801
5.004
0.189
0.197
B
3.810
3.988
0.150
0.157
C
1.346
1.753
0.053
0.069
D
0.330
0.508
0.013
0.020
F
1.194
1.346
0.047
0.053
H
0.170
0.254
0.007
0.010
I
0.050
0.254
0.002
0.010
J
5.791
6.200
0.228
0.244
M
0.400
1.270
0.016
0.050
8-Lead SOP Plastic Package
Copyright © 2015 Richtek Technology Corporation. All rights reserved.
DS7307-00
September
2015
is a registered trademark of Richtek Technology Corporation.
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19
RT7307
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
0.889
1.295
0.031
0.051
A1
0.000
0.152
0.000
0.006
B
1.397
1.803
0.055
0.071
b
0.250
0.560
0.010
0.022
C
2.591
2.997
0.102
0.118
D
2.692
3.099
0.106
0.122
e
0.838
1.041
0.033
0.041
H
0.080
0.254
0.003
0.010
L
0.300
0.610
0.012
0.024
SOT-23-6 Surface Mount Package
Richtek Technology Corporation
14F, No. 8, Tai Yuen 1st Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume
responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and
reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may
result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
Copyright © 2015 Richtek Technology Corporation. All rights reserved.
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is a registered trademark of Richtek Technology Corporation.
DS7307-00
September
2015