SEMI F-47 Test Compliance Test Report Standard: SEMI F47-0200 Specification for Semiconductor Processing Equipment Voltage Sag Immunity Test Procedure Standard: Semi F42 : Test method for Semiconductor Processing Equipment. Voltage Sag Immunity 1. Test Setup Sag Generator: Schaffner NSG1003: Dropout and Varation Simulator Tektronics: TDS1002 2. Test Units Nominal Output Output Voltage Voltage Current [VAC] [V] [A] 115-240 12 6 TSP070-112 115-240 24 3.75 TSP090-124* 115/230 12 12 TSP140-112 115/230 24 7.5 TSP180-124 115/230 24 15 TSP360-124 115/230 24 25 TSP600-124 *model reference can be followed by alphanumeric code which relate to customer references. Units Name Date Prep. 1 Iss. Change 28.02.13 Wendy Date Name Name 18.10.05 S.D. TEST REPORT TSP SERIES SEMI F47 Compliance Sheet/of 1/14 3. Test Report 3.1 TSP070-112 • Input Voltage V=208VAC Output: V=12VDC/6A Voltage Sag Duration [V] 166.4 166.4 145.6 145.6 145.6 104 104 104 104 104 0 [s] 1 0.5 0.5 0.25 0.2 0.2 0.15 0.1 0.05 0.02 0.02 Cycles 50 25 25 12.5 12.5 10 7.5 5 2.5 1 1 Output Voltage Percent of Nominal DUT 50Hz [V] [%] SEMI F47 [%] Result 12.0 0.0 80 PASS 12.0 0.0 80 PASS 12.0 0.0 70 PASS 12.0 0.0 70 PASS 12.0 0.0 70 PASS 12.0 0.0 50 PASS 12.0 0.0 50 PASS 12.0 0.0 50 PASS 12.0 0.0 50 PASS 12.0 0.0 50 PASS 12 0.0 0 PASS TSP070-112 [%] V=208V 100 90 80 70 60 50 SEMI F-47 40 DUT 50Hz 30 20 10 0 [s] 0 0.1 0.2 0.3 0.4 0.5 Date Prep. 1 Iss. Change 28.02.13 Wendy Date Name 0.6 0.7 0.8 0.9 1 Name 18.10.05 S.D. TEST REPORT TSP SERIES SEMI F47 Compliance Sheet/of 2/14 • TSP070-112 Input Voltage V=115VAC Output: V=12VDC/6A Voltage Sag Duration [V] 92 92 80.5 80.5 80.5 57.5 57.5 57.5 57.5 57.5 0 [s] 1 0.5 0.5 0.25 0.2 0.2 0.15 0.1 0.05 0.02 0.02 Output Voltage Percent of Nominal DUT 50Hz [V] [%] SEMI F47 [%] Result 12.0 0.0 80 PASS 12.0 0.0 80 PASS 11.4 2.5 70 PASS 11.4 2.5 70 PASS 11.4 2.5 70 PASS 8.9 12.9 50 PASS 8.9 12.9 50 PASS 8.9 12.9 50 PASS 8.9 12.9 50 PASS 10.4 6.7 50 PASS 10.4 6.7 0 PASS Cycles 50 25 25 12.5 12.5 10 7.5 5 2.5 1 1 TSP070-112 V=115V [%] 100 90 80 70 60 50 SEMI-F47 40 DUT 50Hz 30 20 10 0 0 0.1 0.2 0.3 0.4 0.5 Date Prep. 1 Iss. Change 28.02.13 Wendy Date Name 0.6 0.7 0.8 0.9 1 [s] Name 18.10.05 S.D. TEST REPORT TSP SERIES SEMI F47 Compliance Sheet/of 3/14 3.2 TSP090-124* • Input Voltage V=208VAC Output: V=24VDC/3.75A Voltage Sag Duration [V] 166.4 166.4 145.6 145.6 145.6 104 104 104 104 104 0 [s] 1 0.5 0.5 0.25 0.2 0.2 0.15 0.1 0.05 0.02 0.02 Output Voltage Percent of Nominal DUT 50Hz [V] [%] SEMI F47 [%] Result 24.0 0.0 80 PASS 24.0 0.0 80 PASS 24.0 0.0 70 PASS 24.0 0.0 70 PASS 24.0 0.0 70 PASS 24.0 0.0 50 PASS 24.0 0.0 50 PASS 24.0 0.0 50 PASS 24.0 0.0 50 PASS 24.0 0.0 50 PASS 24 0.0 0 PASS Cycles 50 25 25 12.5 12.5 10 7.5 5 2.5 1 1 TSP090-124* [%] V=208V 100 90 80 70 60 50 SEMI F-47 40 DUT 50Hz 30 20 10 0 0 0.1 0.2 0.3 0.4 0.5 Date Prep. 1 Iss. Change 28.02.13 Wendy Date Name 0.6 0.7 0.8 0.9 1 [s] Name 18.10.05 S.D. TEST REPORT TSP SERIES SEMI F47 Compliance Sheet/of 4/14 • TSP090-112 Input Voltage V=115VAC Output: V=24VDC/3.75A Voltage Sag [V] 92 92 80.5 80.5 80.5 57.5 57.5 57.5 57.5 57.5 0 Duration [s] 1 0.5 0.5 0.25 0.2 0.2 0.15 0.1 0.05 0.02 0.02 Cycles 50 25 25 12.5 12.5 10 7.5 5 2.5 1 1 Output Voltage [V] 23.4 23.4 21.8 21.8 21.8 18.5 18.5 18.5 18.5 18.5 18.4 Percent of Nominal DUT 50Hz [%] SEMI F47 [%] Result 2.5 80 PASS 2.5 80 PASS 9.2 70 PASS 9.2 70 PASS 9.2 70 PASS 22.9 50 PASS 22.9 50 PASS 22.9 50 PASS 22.9 50 PASS 22.9 50 PASS 23.3 0 PASS TSP090-124 V=115V [%] 100 90 80 70 60 SEMI-F47 50 40 DUT 50Hz 30 20 10 0 0 0.1 0.2 0.3 0.4 0.5 Date Prep. 1 Iss. Change 28.02.13 Wendy Date Name 0.6 0.7 0.8 0.9 1 [s] Name 18.10.05 S.D. TEST REPORT TSP SERIES SEMI F47 Compliance Sheet/of 5/14 3.3 TSP140-112 • Input Voltage V=208VAC Output: V=12VDC/6.0A Voltage Sag Duration [V] 166.4 166.4 145.6 145.6 145.6 104 104 104 104 104 0 [s] 1 0.5 0.5 0.25 0.2 0.2 0.15 0.1 0.05 0.02 0.02 Cycles 50 25 25 12.5 12.5 10 7.5 5 2.5 1 1 Output Voltage Percent of Nominal DUT 50Hz [V] [%] SEMI F47 [%] Result 11.8 0.8 80 PASS 11.8 0.8 80 PASS 10.9 4.6 70 PASS 10.9 4.6 70 PASS 10.9 4.6 70 PASS 8.9 12.9 50 PASS 8.9 12.9 50 PASS 8.9 12.9 50 PASS 9.2 11.7 50 PASS 11.8 0.8 50 PASS 11.8 0.8 0 PASS TSP140-112 [%] V=208V 100 90 80 70 60 SEMI F-47 50 DUT 50Hz 40 30 20 10 0 [s] 0 0.1 0.2 0.3 0.4 0.5 Date Prep. 1 Iss. Change 28.02.13 Wendy Date Name 0.6 0.7 0.8 0.9 1 Name 18.10.05 S.D. TEST REPORT TSP SERIES SEMI F47 Compliance Sheet/of 6/14 • TSP140-112 Input Voltage V=115VAC Output: V=12VDC/7.5A Voltage Sag Duration [V] 92 92 80.5 80.5 80.5 57.5 57.5 57.5 57.5 57.5 0 [s] 1 0.5 0.5 0.25 0.2 0.2 0.15 0.1 0.05 0.02 0.02 Output Voltage Percent of Nominal DUT 50Hz [V] [%] SEMI F47 [%] Result 12.0 0.0 80 PASS 12.0 0.0 80 PASS 11.1 3.8 70 PASS 11.1 3.8 70 PASS 11.1 3.8 70 PASS 8.6 14.2 50 PASS 8.6 14.2 50 PASS 8.6 14.2 50 PASS 9.0 12.5 50 PASS 12.0 0.0 50 PASS 12.0 0.0 0 PASS Cycles 50 25 25 12.5 12.5 10 7.5 5 2.5 1 1 TSP140-112 V=115V [%] 100 90 80 70 60 SEMI-F47 50 40 DUT 50Hz 30 20 10 0 0 0.1 0.2 0.3 0.4 0.5 Date Prep. 1 Iss. Change 28.02.13 Wendy Date Name 0.6 0.7 0.8 0.9 1 [s] Name 18.10.05 S.D. TEST REPORT TSP SERIES SEMI F47 Compliance Sheet/of 7/14 3.4 • TSP180-124 Input Voltage V=208VAC Output: V=24VDC/7.5A Voltage Sag [V] 166.4 166.4 145.6 145.6 145.6 104 104 104 104 104 0 Duration [s] 1 0.5 0.5 0.25 0.2 0.2 0.15 0.1 0.05 0.02 0.02 Cycles 50 25 25 12.5 12.5 10 7.5 5 2.5 1 1 Output Voltage [V] 23.8 23.8 22.8 22.8 22.8 19.6 19.6 19.6 20.2 22.2 22.2 Percent of Nominal DUT 50Hz [%] 0.8 0.8 5.0 5.0 5.0 18.3 18.3 18.3 15.8 7.5 7.5 TSP180-124 [%] SEMI F47 [%] Result 80 PASS 80 PASS 70 PASS 70 PASS 70 PASS 50 PASS 50 PASS 50 PASS 50 PASS 50 PASS 0 PASS V=208V 100 90 80 70 60 SEMI F-47 50 40 DUT 50Hz 30 20 10 0 0 0.1 0.2 0.3 0.4 0.5 Date Prep. 1 Iss. Change 28.02.13 Wendy Date Name 0.6 0.7 0.8 0.9 1 [s] Name 18.10.05 S.D. TEST REPORT TSP SERIES SEMI F47 Compliance Sheet/of 8/14 • TSP180-124 Input Voltage V=115VAC Output: V=24VDC/7.5A Voltage Sag Duration [V] 92 92 80.5 80.5 80.5 57.5 57.5 57.5 57.5 57.5 0 [s] 1 0.5 0.5 0.25 0.2 0.2 0.15 0.1 0.05 0.02 0.02 Cycles 50 25 25 12.5 12.5 10 7.5 5 2.5 1 1 Output Voltage Percent of Nominal DUT 50Hz [V] [%] SEMI F47 [%] Result 23.3 2.9 80 PASS 23.3 2.9 80 PASS 21.6 10.0 70 PASS 21.6 10.0 70 PASS 21.6 10.0 70 PASS 17.1 28.8 50 PASS 17.1 28.8 50 PASS 17.1 28.8 50 PASS 17.4 27.5 50 PASS 22.8 5.0 50 PASS 22.8 5.0 0 PASS TSP180-124 V=115V [%] 100 90 80 70 60 SEMI-F47 50 40 DUT 50Hz 30 20 10 0 0 0.1 0.2 0.3 0.4 0.5 0.6 Date Prep. 1 Iss. Change 28.02.13 Wendy Date Name 0.7 0.8 0.9 1 [s] Name 18.10.05 S.D. TEST REPORT TSP SERIES SEMI F47 Compliance Sheet/of 9/14 3.5 TSP360-124 • Input Voltage V=208VAC Output: V=24VDC/15A Voltage Sag Duration [V] 166.4 166.4 145.6 145.6 145.6 104 104 104 104 104 0 [s] 1 0.5 0.5 0.25 0.2 0.2 0.15 0.1 0.05 0.02 0.02 Cycles 50 25 25 12.5 12.5 10 7.5 5 2.5 1 1 Output Voltage Percent of Nominal DUT 50Hz [V] [%] SEMI F47 [%] Result 23.0 4.2 80 PASS 23.0 4.2 80 PASS 24.0 0.0 70 PASS 24.0 0.0 70 PASS 24.0 0.0 70 PASS 21.8 9.2 50 PASS 21.8 9.2 50 PASS 21.8 9.2 50 PASS 22.0 8.3 50 PASS 22.4 6.7 50 PASS 22.4 6.7 0 PASS TSP360-124 [%] V=208V 100 90 80 70 SEMI F-47 60 50 DUT 50Hz 40 30 20 10 0 0 0.1 0.2 0.3 0.4 0.5 0.6 Date Prep. 1 Iss. Change 28.02.13 Wendy Date Name 0.7 0.8 0.9 1 [s] Name 18.10.05 S.D. TEST REPORT TSP SERIES SEMI F47 Compliance Sheet/of 10/14 • TSP360-124 Input Voltage V=115VAC Output: V=24VDC/15A Voltage Sag Duration [V] 50 92 80.5 80.5 80.5 57.5 57.5 57.5 57.5 57.5 0 [s] 1 0.5 0.5 0.25 0.2 0.2 0.15 0.1 0.05 0.02 0.02 Cycles 50 25 25 12.5 12.5 10 7.5 5 2.5 1 1 Output Voltage Percent of Nominal DUT 50Hz [V] [%] SEMI F47 [%] Result 19.8 17.5 80 PASS 19.8 17.5 80 PASS 18.8 21.7 70 PASS 18.8 21.7 70 PASS 18.8 21.7 70 PASS 13.8 42.5 50 PASS 13.8 42.5 50 PASS 13.8 42.5 50 PASS 13.8 42.5 50 PASS 19.2 20.0 50 PASS 19.2 20.0 0 PASS TSP360-124 V=115V [%] 100 90 80 70 SEMI-F47 60 50 DUT 50Hz 40 30 20 10 0 0 0.1 0.2 0.3 0.4 0.5 Date Prep. 1 Iss. Change 28.02.13 Wendy Date Name 0.6 0.7 0.8 0.9 1 [s] Name 18.10.05 S.D. TEST REPORT TSP SERIES SEMI F47 Compliance Sheet/of 11/14 3.6 TSP600-124 • Input Voltage V=208VAC Output: V=24VDC/25A Voltage Sag Duration [V] 166.4 166.4 145.6 145.6 145.6 104 104 104 104 104 0 [s] 1 0.5 0.5 0.25 0.2 0.2 0.15 0.1 0.05 0.02 0.02 Cycles 50 25 25 12.5 12.5 10 7.5 5 2.5 1 1 Output Voltage Percent of Nominal DUT 50Hz [V] [%] SEMI F47 [%] Result 19.8 17.5 80 PASS 19.8 17.5 80 PASS 17.4 27.5 70 PASS 17.4 27.5 70 PASS 17.4 27.5 70 PASS 14.8 38.3 50 PASS 14.8 38.3 50 PASS 14.8 38.3 50 PASS 15.0 37.5 50 PASS 19.6 18.3 50 PASS 19.6 18.3 0 PASS TSP600-124 [%] V=208V 100 90 80 70 60 SEMI F-47 50 DUT 50Hz 40 30 20 10 0 [s] 0 0.1 0.2 0.3 0.4 0.5 0.6 Date Prep. 1 Iss. Change 28.02.13 Wendy Date Name 0.7 0.8 0.9 1 Name 18.10.05 S.D. TEST REPORT TSP SERIES SEMI F47 Compliance Sheet/of 12/14 • TSP600-124 Input Voltage V=115VAC Output: V=24VDC/25A Voltage Sag [V] 92 92 80.5 80.5 80.5 57.5 57.5 57.5 57.5 57.5 0 Duration [s] 1 0.5 0.5 0.25 0.2 0.2 0.15 0.1 0.05 0.02 0.02 Cycles 50 25 25 12.5 12.5 10 7.5 5 2.5 1 1 Output Voltage [V] 19.8 19.8 17.2 17.2 17.2 12.8 12.8 12.8 13.2 20.8 20.8 Percent of Nominal DUT 50Hz [%]SEMI F47 [%] Result 17.5 80 PASS 17.5 80 PASS 28.3 70 PASS 28.3 70 PASS 28.3 70 PASS 46.7 50 PASS 46.7 50 PASS 46.7 50 PASS 45.0 50 PASS 13.3 50 PASS 13.3 0 PASS TSP600-124 V=115V [%] 100 90 80 70 SEMI-F47 60 50 DUT 50Hz 40 30 20 10 0 0 0.1 0.2 0.3 0.4 0.5 0.6 Date Prep. 1 Iss. Change 28.02.13 Wendy Date Name 0.7 0.8 0.9 1 [s] Name 18.10.05 S.D. TEST REPORT TSP SERIES SEMI F47 Compliance Sheet/of 13/14 4. Conclusion All of the units were tested at 208V and at 115V at full nominal resistive load. The deviation of the output voltage is noted in the tables (DUT50 Hz). For all tests the TSP units passed F-47 standard. They passed also the recommended F-47 tests for sag duration below 50ms as indicated in the tables. At all conditions the units continued to deliver power to the output without any restart. The deviation of the output voltage was always smaller then the deviation of the input AC. Date Prep. 1 Iss. Change 28.02.13 Wendy Date Name Name 18.10.05 S.D. TEST REPORT TSP SERIES SEMI F47 Compliance Sheet/of 14/14