HD74LVCC3245A Octal Bus Transceiver with adjustable output voltage and 3-state Outputs REJ03D0379–0201 Rev.2.01 Apr. 12, 2005 Description The HD74LVCC3245A has eight bus transceivers with three state outputs in a 24 pin package. When (DIR) is high, data flows from the A inputs to the B outputs, and when (DIR) is low, data flows from the B inputs to the A outputs. A and B bus are separated by making enable input (OE) high level. This 8-bit non-inverting bus transceiver contains two separate power-supply rails. And this product has two terminals (VCCA, VCCB), VCCA is connected with control input and A bus side, VCCB is connected with B bus side. VCCA and VCCB are isolated. The B port is designed to track VCCB, which accepts voltage from 3 V to 5.5 V, and the A port is designed to track VCCA, which operates at 2.3 V to 3.6 V. This allows for translation from a 3.3 V to a 5 V system environment and vice versa, or from a 2.5 V to a 3.3 V system environment and vice versa. Low voltage and high-speed operation is suitable at the battery drive product (note type personal computer) and low power consumption extends the life of a battery for long time operation. Features • This product function as level shift transceiver that change VCCA input level to VCCB output level, VCCB input level to VCCA output level by providing different supply voltage to VCCA and VCCB. • This product is able to the power management: Turn on and off the supply on VCCB side with providing the supply of VCCA (Enable input (OE): High level) • VCCA = 2.3 V to 3.6 V, VCCB = 3.0 V to 5.5 V • All control input VI (max) = 5.5 V (@VCCA = 0 V to 5.5 V) • All A bus side input outputs VI/O (max) = 5.5 V (@VCCA = 0 V or output off state) • All B bus side input outputs VI/O (max) = 5.5 V (@VCCB = 0 V or output off state) • High output current A bus side: ±8 mA (@VCCA = 2.3 V) ±12 mA (@VCCA = 2.7 V) ±24 mA (@VCCA = 3.0 V) B bus side: ±24 mA (@VCCB = 3.0 V) • Ordering Information Part Name HD74LVCC3245ATEL Package Type Package Code (Previous Code) Package Abbreviation TSSOP–24 pin PTSP0024JB–A (TTP–24DBV) T Rev.2.01 Apr. 12, 2005 page 1 of 10 Taping Abbreviation (Quantity) EL (1,000 pcs/reel) HD74LVCC3245A Function Table Inputs OE L L H Operation DIR L H X B data to A bus A data to B bus Z H: High level L: Low level X: Immaterial Z: High impedance Pin Arrangement 24 VCCB VCCA 1 DIR 2 23 NC A1 3 22 OE A2 4 21 B1 A3 5 A4 6 20 B2 A5 7 18 B4 A6 8 17 B5 A7 9 16 B6 A8 10 15 B7 GND 11 14 B8 GND 12 13 GND 19 B3 (Top view) Rev.2.01 Apr. 12, 2005 page 2 of 10 HD74LVCC3245A Absolute Maximum Ratings Item Supply voltage Input voltage*1 Input / output voltage Symbol VCCA, VCCB VI VI/O Unit V V V PT Ratings –0.5 to 6.0 –0.5 to 6.0 –0.5 to VCCA+0.5 –0.5 to 6.0 –0.5 to VCCB+0.5 –0.5 to 6.0 –50 –50 50 ±50 100 862 Input diode current Output diode current IIK IOK Output current VCCA, VCCB, GND current IO Tstg –65 to 150 °C ICCA, ICCB, IGND Maximum power dissipation *2 at Ta = 25°C (in still air) Storage temperature mA mA mA mA mW Conditions DIR, OE A port output “H” or “L” A port output “Z” or VCCA: OFF B port output “H” or “L” B port output “Z” or VCCB: OFF VI < 0 VO < 0 VO > VCC+0.5 TSSOP Notes: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. 1. The input and output voltage ratings may be exceeded even if the input and output clamp-current ratings are observed. 2. The maximum package power dissipation was calculated using a junction temperature of 150°C. Recommended Operating Conditions Item Ratings 2.3 to 3.6 3.0 to 5.5 Input / output voltage 0 to 5.5 0 to VCCA 0 to 5.5 0 to VCCB 0 to 5.5 Output current IOHA –8 –12 –24 IOHB –24 IOLA 8 12 24 IOLB 24 Input transition rise or fall time ∆t / ∆v 10 Operating temperature Ta –40 to 85 Note: Unused or floating inputs must be held high or low. Supply voltage Rev.2.01 Apr. 12, 2005 page 3 of 10 Symbol VCCA VCCB VI VI/O Unit V V mA ns / V °C Conditions DIR, OE A port output “H” or “L” A port output “Z” or VCCA : OFF B port output “H” or “L” B port output “Z” or VCCB : OFF VCCA = 2.3 V VCCA = 2.7 V VCCA = 3.3 V VCCB = 3.0 V VCCA = 2.3 V VCCA = 2.7 V VCCA = 3.3 V VCCB = 3.0 V HD74LVCC3245A Block Diagram DIR 2 22 A1 OE 3 21 B1 To seven other channels Electrical Characteristics (Ta = –40 to 85°C) Item Input voltage Symbol VIHA VIHB VIH VILA VILB VIL Output voltage VOHA VOHB VOLA VCCA (V) 2.3 2.7 to 3.6 2.3 to 3.6 2.3 to 3.6 2.3 2.7 to 3.6 2.3 2.7 to 3.6 2.3 to 3.6 2.3 to 3.6 2.3 2.7 to 3.6 3.0 2.3 2.7 3.0 3.0 2.7 3.0 2.3 2.7 3.0 2.7 3.0 2.3 2.7 3.0 VCCB (V) 3.0 3.0 to 5.5 2.7 to 3.6 4.5 to 5.5 3.0 3.0 to 5.5 3.0 3.0 to 5.5 2.7 to 3.6 4.5 to 5.5 3.0 3.0 to 5.5 3.0 3.0 3.0 3.0 3.0 4.5 3.0 3.0 3.0 3.0 4.5 3.0 3.0 3.0 3.0 Min 1.7 2 2 VCCB×0.7 1.7 2 2.9 2.0 2.2 2.4 2.2 2.0 2.9 2.4 2.4 2.2 3.2 Max 0.7 0.8 0.8 VCCB×0.3 0.7 0.8 0.1 0.6 0.5 0.5 2.7 3.0 2.3 3.0 3.0 4.5 3.0 3.0 3.0 4.5 0.5 0.1 0.4 0.5 0.5 VOLB Rev.2.01 Apr. 12, 2005 page 4 of 10 Unit Test Conditions V A port V B port V Control input V A port V B port V Control input V IOH = –100 µA IOH = –8 mA IOH = –12 mA IOH = –24 mA V IOH = –100 µA IOH = –12 mA IOH = –24 mA V IOL = 100 µA IOL = 8 mA IOL = 12 mA IOL = 24 mA V IOL = 100 µA IOL = 12 mA IOL = 24 mA HD74LVCC3245A Electrical Characteristics (cont) (Ta = –40 to 85°C) Item Input current Symbol IIN VCCA (V) 3.6 Off state output current IOZ 3.6 Output leak current IOFF Quiescent supply current ICCA ICCB Increase in ICC *1 per input VCCB (V) 3.6 5.5 3.6 5.5 Min Max ±1 ±5 µA VI(CONT) = VIH or VIL VO = VCCA, VCCB or GND 0 0 20 µA A port, VI/O = 5.5 V B port, VI/O = 3.6 V 3.6 OPEN 50 µA An = VCCA or GND, Control input = VCCA 3.6 3.6 50 5.5 50 3.6 50 5.5 80 3.6 ∆ICCA 3.6 3.6 0.5 ∆ICCB 3.6 3.6 0.5 Unit Test Conditions µA Control input VI = VCCA or GND B to A, Control input =VCCA or GND Bn = VCCB or GND, IO(A port) = 0 A to B, Control input =VCCA or GND An = VCCA or GND, IO(B port) = 0 mA A port or Control input One input at VCCA–0.6V, Other input at VCCA at GND B port, One input at VCCB–0.6 V Other input at VCCB or GND Control input at GND Notes: For condition shown as Min or Max, use the appropriate values under recommended operating conditions. 1. This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND. Capacitance (Ta = 25°C) Item Control Input, capacitance Input / output capacitance Symbol CIN CI/O Rev.2.01 Apr. 12, 2005 page 5 of 10 VCCA (V) 3.3 3.3 VCCB (V) 5 5 Min Typ 5 11 Max Unit Test Conditions pF VI = VCCA or GND pF A port, VI = VCCA or GND, B port, VI = VCCB or GND HD74LVCC3245A Switching Characteristics (Ta = –40 to 85°C, VCCA = 2.5±0.2 V, VCCB = 3.3±0.3 V) Item Propagation delay time Output enable time Output disable time Symbol tPLH tPHL tPLH tPHL tZH tZL tZH tZL tHZ tLZ tHZ tLZ Min 1 1 1 1 1 1 1 1 1 1 1 1 Typ Max 9.1 9.4 9.9 11.2 12.9 14.5 12.8 13 6.9 7.1 8.9 8.8 Unit ns ns ns Test conditions From(Input) To(Output) CL = 50 pF A B RL = 500 Ω CL = 50 pF RL = 500 Ω CL = 50 pF RL = 500 Ω B A OE A OE B OE A OE B (Ta = –40 to 85°C, VCCA = 2.7 to 3.6 V, VCCB = 3.3±0.3 V) Item Propagation delay time Output enable time Output disable time Symbol tPLH tPHL tPLH tPHL tZH tZL tZH tZL tHZ tLZ tHZ tLZ Min 1 1 1 1 1 1 1 1 1 1 1 1 Typ Max 7.2 7.1 7.6 6.4 9.5 9.7 9.9 9.2 6.9 6.6 7.9 7.5 Min 1 1 1 1 1 1 Typ Max 5.3 6 7 5.8 9.5 9.2 1 1 1 1 1 1 8.4 8.1 7.8 7 7 7.3 Unit ns ns ns Test conditions From(Input) To(Output) CL = 50 pF A B RL = 500 Ω CL = 50 pF RL = 500 Ω CL = 50 pF RL = 500 Ω B A OE A OE B OE A OE B (Ta = –40 to 85°C, VCCA = 2.7 to 3.6 V, VCCB = 5.0±0.5 V) Item Propagation delay time Symbol tPLH tPHL tPLH Output enable time tPHL tZH tZL tZH tZL Output disable time tHZ tLZ tHZ tLZ Rev.2.01 Apr. 12, 2005 page 6 of 10 Unit ns ns ns Test conditions From(Input) To(Output) CL = 50 pF A B RL = 500 Ω CL = 50 pF RL = 500 Ω CL = 50 pF RL = 500 Ω B A OE A OE B OE A OE B HD74LVCC3245A Operating Characteristics Item Symbol CPD Power dissipation capacitance VCCA (V) 3.0 VCCB (V) 5.0 Min Typ 38 Max Unit Test Conditions pF f = 10 MHz CL = 0 Power-up considerations Level-translation devices offer an opportunity for successful mixed-voltage signal design.A proper power-up sequence always should be followed to avoid excessive supply current, bus contention, oscillations, or other anomalies caused by improperly biased device pins. Take these precautions to guard against such power-up problems. 1. Connect ground before any supply voltage is applied. 2. Next, power up the control side of the device. (Power up of VCCA is first. Next power up is VCCB. ) 3. Tie OE to VCCA with a pullup resistor so that it ramps with VCCA. 4. Depending on the direction of the data path, DIR can be high or low. If DIR high is needed (A data to B bus), ramp it with VCCA. Overwise, keep DIR low. Test Circuit See under table S1 500 Ω OPEN GND *1 CL = 50 pF 500 Ω Load circuit for outputs S1 Symbol VCCA = 2.5±0.2 V VCCB = 3.3±0.3 V A/OE to B VCCA = 2.7 to 3.6 V VCCB = 3.3±0.3 V B/OE to A A/OE to B VCCA = 2.7 to 3.6 V VCCB = 5±0.5 V B/OE to A A/OE to B B/OE to A t PLH / tPHL OPEN OPEN OPEN OPEN OPEN OPEN t ZH / t HZ GND GND GND GND GND GND t ZL / t LZ 6V 2 × VCCA 6V 6V 2 × VCCB 6V Note: 1. CL includes probe and jig capacitance. Rev.2.01 Apr. 12, 2005 page 7 of 10 HD74LVCC3245A Waveforms – 1 tr tf Vref1 Input VIH 90 % 90 % Vref1 10 % 10 % t PLH GND t PHL V OH Vref2 Output Vref2 V OL VCCA = 2.5±0.2 V VCCB = 3.3±0.3 V VCCA = 2.7 to 3.6 V VCCB = 3.3±0.3 V VCCA = 2.7 to 3.6 V VCCB = 5±0.5 V A to B B to A A to B B to A A to B B to A VIH VCCA 2.7 V 2.7 V 2.7 V 2.7 V VCCB Vref1 1/2 VCCA 1.5 V 1.5 V 1.5 V 1.5 V 1/2 VCCB Vref2 1.5 V 1/2 VCCA 1.5 V 1.5 V 1/2 VCCB 1.5 V Symbol Rev.2.01 Apr. 12, 2005 page 8 of 10 HD74LVCC3245A Waveforms – 2 tf tr Vref1 Output Control VIH 90 % 90 % Vref1 10 % 10 % GND t LZ t ZL VOH Waveform - A Vref2 VrefL V OL t HZ t ZH V OH VrefH Waveform - B Vref2 GND VCCA = 2.5±0.2 V VCCB = 3.3±0.3 V VCCA = 2.7 to 3.6 V VCCB = 3.3±0.3 V VCCA = 2.7 to 3.6 V VCCB = 5±0.5 V OE to B OE to A OE to B OE to A OE to B OE to A VIH VCCA VCCA 2.7 V 2.7 V 2.7 V 2.7 V Vref1 1/2 VCCA 1/2 VCCA 1.5 V 1.5 V 1.5 V 1.5 V Vref2 1.5 V 1/2 VCCA 1.5 V 1.5 V 1/2 VCCB 1.5 V Symbol VrefH VOH–0.3 V VOH–0.15 V VOH–0.3 V VOH–0.3 V VOH–0.3 V VOH–0.3 V VrefL VOL+0.3 V VOL+0.15 V VOL+0.3 V VOL+0.3 V VOL+0.3 V VOL+0.3 V Notes: 1. All input pulses are supplied by generators having the following characteristics : PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. 2. Waveform - A is for an output with internal conditions such that the output is low except when disabled by the output control. 3. Waveform - B is for an output with internal conditions such that the output is high except when disabled by the output control. 4. The output are measured one at a time with one transition per measurement. Rev.2.01 Apr. 12, 2005 page 9 of 10 HD74LVCC3245A Package Dimensions JEITA Package Code P-TSSOP24-4.4x7.8-0.65 RENESAS Code PTSP0024JB-A *1 Previous Code TTP-24DBV MASS[Typ.] 0.08g D NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. F 24 13 c HE *2 E bp Reference Symbol Terminal cross section ( Ni/Pd/Au plating ) Index mark Dimension in Millimeters Min Nom Max D 7.80 8.10 E 4.40 A2 Z A1 12 1 e *3 bp 0.03 0.07 0.10 0.15 0.20 0.25 0.10 0.15 0.20 6.40 6.60 1.10 A x L1 M bp b1 c A c A1 θ y L Detail F 1 θ 0° HE 6.20 0.65 e x 0.13 y 0.10 0.65 Z 0.4 L L Rev.2.01 Apr. 12, 2005 page 10 of 10 8° 1 0.5 1.0 0.6 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. 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