SPP9433W P-Channel Enhancement Mode

SPP9433W
P-Channel Enhancement Mode MOSFET
DESCRIPTION
The SPP9433W is the P-Channel logic enhancement
mode power field effect transistors are produced using
high cell density, DMOS trench technology.
This high density process is especially tailored to
minimize on-state resistance.
These devices are particularly suited for low voltage
application such as cellular phone and notebook
computer power management and other battery powered
circuits, and low in-line power loss are needed in a very
small outline surface mount package.
APPLICATIONS
z Power Management in Note book
z Portable Equipment
z Battery Powered System
z DC/DC Converter
z Load Switch
z LCD Display inverter
FEATURES
‹
-30V/-6A,RDS(ON)= 42mΩ@VGS=-10V
‹
-30V/-3 A,RDS(ON)= 78mΩ@VGS=-4.5V
‹
Super high density cell design for extremely low
RDS (ON)
‹
Exceptional on-resistance and maximum DC
current capability
‹
SOP-8P package design
PIN CONFIGURATION(SOP – 8P)
PART MARKING
2011/09/29 Ver.2
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SPP9433W
P-Channel Enhancement Mode MOSFET
PIN DESCRIPTION
Pin
Symbol
Description
1
S
Source
2
S
Source
3
S
Source
4
G
5
D
Gate
Drain
6
D
Drain
7
D
Drain
8
D
Drain
ORDERING INFORMATION
Part Number
Package
SPP9433WS8RGB
SOP- 8P
Part
Marking
SPP9433W
※ SPP9433WS8RGB : 13” Tape Reel ; Pb – Free ; Halogen - Free
ABSOULTE MAXIMUM RATINGS
(TA=25℃ Unless otherwise noted)
Parameter
Symbol
Typical
Unit
Drain-Source Voltage
VDSS
-30
V
Gate –Source Voltage
VGSS
±20
V
Continuous Drain Current(TJ=150℃)
TA=25℃
TA=70℃
Pulsed Drain Current
ID
-6
-4
A
IDM
-12
A
IS
-6
A
PD
2.08
W
TJ
-55/150
℃
Storage Temperature Range
TSTG
-55/150
℃
Thermal Resistance-Junction to Ambient
RθJA
60
℃/W
Continuous Source Current(Diode Conduction)
Power Dissipation
Operating Junction Temperature
2011/09/29 Ver.2
TA=25℃
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SPP9433W
P-Channel Enhancement Mode MOSFET
ELECTRICAL CHARACTERISTICS
(TA=25℃ Unless otherwise noted)
Parameter
Symbol
Conditions
Min.
Typ
Max.
Unit
Static
Drain-Source Breakdown Voltage
Gate Threshold Voltage
V(BR)DSS VGS=0V,ID=-250uA
VGS(th) VDS=VGS,ID=-250uA
Gate Leakage Current
IGSS
Zero Gate Voltage Drain Current
IDSS
On-State Drain Current
ID(on)
VDS≦-5V,VGS=-10V
Forward Transconductance
gfs
Diode Forward Voltage
VSD
IS=-6A,VGS=0V
RDS(on)
-1.0
-2.5
VDS=0V,VGS=±20V
VDS=-24V,VGS=0V
VDS=-24V,VGS=0V
TJ=55℃
VGS=- 10V,ID=-6A
VGS=- 4.5V,ID=-3A
VDS=-10.0V,ID=-6A
Drain-Source On-Resistance
-30
±100
-1
-5
-6
V
nA
uA
A
0.035
0.065
6
0.042
0.078
Ω
S
-1.2
V
Dynamic
Total Gate Charge
Qg
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Turn-On Time
Turn-Off Time
2011/09/29 Ver.2
VDS=-20V, VGS=-4.5V
ID=-6A
td(off)
tf
2.7
nC
3.1
VDS=-24V,VGS=0V
f=1MHz
td(on)
tr
6.4
650
270
pF
104
9
VDD=-12V, ID=-5.0A,
VGEN=-10V
RG=3.3Ω
16
21
ns
22
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SPP9433W
P-Channel Enhancement Mode MOSFET
TYPICAL CHARACTERISTICS
Fig. 1 Typical Output Characteristics
Fig. 2 On-Resistance vs. Gate Voltage
Fig. 3 Forward characteristics of Diodes
Fig. 4 Gate Charge Characteristics
Fig. 5 Vgs vs. Junction Temperature
Fig. 6 On-Resistance vs Junction Temp
2011/09/29 Ver.2
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SPP9433W
P-Channel Enhancement Mode MOSFET
TYPICAL CHARACTERISTICS
Fig. 7 Typical Capacitance Characteristics
Fig. 8 Maximum Safe Operation Area
Fig. 9 Effective Transient Thermal Impedance
Fig. 10 Switching Time Waveform
2011/09/29 Ver.2
Fig. 11 Unclamped Inductive Waveform
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SPP9433W
P-Channel Enhancement Mode MOSFET
SOP- 8 PACKAGE OUTLINE
2011/09/29 Ver.2
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SPP9433W
P-Channel Enhancement Mode MOSFET
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SYNC Power Corporation
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Phone: 886-2-2655-8178
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2011/09/29 Ver.2
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