Le57D11 Dual SLIC Device Evaluation Board User’s Guide Rev. A January 30, 2002 Document Number: 080748 The contents of this document are provided in connection with Legerity, Inc. products. Legerity makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this publication. Except as set forth in Legerity's Standard Terms and Conditions of Sale, Legerity assumes no liability whatsoever, and disclaims any express or implied warranty, relating to its products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right. Legerity's products are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other applications intended to support or sustain life, or in any other application in which the failure of Legerity's product could create a situation where personal injury, death, or severe property or environmental damage may occur. Legerity reserves the right to discontinue or make changes to its products at any time without notice. © 2002 Legerity, Inc. All rights reserved. Trademarks Legerity, the Legerity logo and combinations thereof, and QSLAC™, ISLAC™, ISLIC™, WinSLAC™, WinACIF™ are trademarks of Legerity, Inc. Other product names used in this publication are for identification purposes only and may be trademarks of their respective companies. TABLE OF CONTENTS CHAPTER 1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 1.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 1.2 New Look of the Le57D11 SLIC Device Evaluation Board . . . . . . . . . . . . . . . . . . . . .2 CHAPTER 2 BOARD SETUP AND CONNECTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 2.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 2.2 Power Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 2.3 Telephone Line Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 2.4 Analog Signal Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 2.5 LED Indicators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 2.6 Digital Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 2.7 Interconnecting to a SLAC™ Device Evaluation Board . . . . . . . . . . . . . . . . . . . . . . . .5 CHAPTER 3 BOARD OPERATION AND CONTROL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 3.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 3.2 Controlling the Dual SLIC Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 3.3 Jumper Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 3.4 DIP Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 3.5 Component Carriers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 3.6 Test Points . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 3.7 Ringing Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 3.8 Breadboard Area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 CHAPTER 4 SOFTWARE OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 4.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 4.2 WinSLAC™ Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 4.3 WinACIF™ Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 CHAPTER 5 TRANSMISSION PERFORMANCE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 5.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 5.2 Le57D11 Dual SLIC Device Simulation Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 5.3 Example Schematic Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 5.4 600 Ω Line (Default) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 5.5 900 Ω Line . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 5.6 German Complex Impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 5.7 Off-Hook Measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26 CHAPTER 6 QUICK START/STAND-ALONE OPERATIONAL TEST PROCEDURES . . . . . . . . . . . . .27 6.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27 6.2 Stand-alone Operational Test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27 6.3 Test Setup to Verify Ringing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28 6.4 Quick Start Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28 CHAPTER 7 EVALUATION BOARD SCHEMATIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31 7.1 Evaluation Board Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31 Le57D11 Dual SLIC Evaluation Board User’s Guide - Table of Contents i This page intentionally left blank. ii Le57D11 Dual SLIC Evaluation Board User’s Guide - Table of Contents CHAPTER 1 1.1 INTRODUCTION OVERVIEW The Le57D11 Dual SLIC device evaluation board provides a platform to evaluate the different capabilities of the Le57D11 Dual SLIC device. The evaluation board's two modes of operation, Internal and External, provide a flexible platform to evaluate each SLIC device channel. All digital control signals and voice band signals have test points for easy probing. All user selectable components are mounted on component carriers for easy modification where required. A surge protection circuit, robust enough to meet Bellcore GR-1089-CORE specifications, is part of the telephone interface. All power is brought to the board via a single keyed connector. Detailed device explanations, operational circuit descriptions and required formulas can be found in the individual SLIC device data sheets. Please note, most descriptions (except where noted) in this user’s guide will refer to a single channel of the Le57D11 device; however, the description can be applied to both channels. The Le57D11 Dual SLIC device evaluation board physical layout is shown in Figure 1–1. Figure 1–1 Le57D11 Revision C Silk screen Introduction 1-1 L e 5 7D 11 S L IC D E V IC E E V AL U AT IO N B O AR D US E R ’S G U ID E 1.2 NEW LOOK OF THE Le57D11 SLIC DEVICE EVALUATION BOARD The layout of the Le57D11 Dual SLIC device evaluation board differs from previous versions of evaluation boards. With the Le57D11, the BNC connectors for both VTX and VRX signals are on the left-hand side of the PCB. The 20-pin headers, for external control of the SLIC device, are rotated 90°, moved to the left-hand side of the board and placed between the BNC connectors. The power connector, which has traditionally been located in the top left-hand corner, has been moved to the center and mounted on the bottom of the board. The tip/ring connections have been moved to the right-hand side of the board. All of the above changes result in the center being left open for easy probing and viewing. All control and voice signals flow left to right and back again. Power and ground traces are kept to a minimum and do not cross or loop around each other. The latest revision of the Le57D11 is "C" (there was no revision B). The only difference is the revision C evaluation board has two additional circuits to indicate the status of the relays (K1 and K2). Please note that the CHPx values silk-screened on the PCB are incorrect. They should be 100 nF, not 220 nF. The schematic shows the correct value. 1-2 Introduction CHAPTER 2 2.1 BOARD SETUP AND CONNECTION OVERVIEW The Le57D11 Dual SLIC device evaluation board operates as a stand-alone, or in conjunction with a Legerity SLACä device evaluation board. Stand-alone operation is supported using manual switch settings to control operation. When connected to a SLAC device board, control and digital transmission access is provided through the programmable pins of the SLAC device, which is then controlled by Legerity’s computer interface evaluation software. 2.2 POWER CONNECTIONS Input power is supplied to the board via the 10-pin connector PW1. The power cables are color coded and labeled at the banana jack. The following table details all 10 cables by color and description. Table 2–1 Pin # PW1 10-Pin Connector Power Cables Cable Color Label Description 1 Black BGND Common ground for VBAT 2 White VBAT1 Main battery supply (HIBAT) 3 Gray VBAT2 Not required for chip operation 4 Blue VTMG Not required for chip operation 5 Violet RING Source External ringing signal input 6 Orange AUX_VCC Supply for all 5 V requirements except the SLIC device 7 Red VCC1 SLIC device 5 V supply 8 Brown AGND Common ground 9 Green VNEG Not required for chip operation 10 Yellow VEE Not required for chip operation The evaluation board does not require the VBAT2, VTMG or VNEG cables to be connected as these inputs do not go to, or affect, the operation of the SLIC device. (A common power cable is used on all Legerity’s SLIC device evaluation boards and the "Not required" connections represent those possibly used with other devices or boards.) The VEE is used only as a supply voltage for the breadboard area; it is not required for SLIC device operation. Please note, when first applying power to the QSLACä/Dual SLIC system the control pins of the QSLAC device power up in a tri-state mode; these lines are also pulled high through pull-up resistors. If the C5X* jumpers on the evaluation board, which control the ring relays, are set to External the ring relays will activate due to the design of the evaluation board. Once the QSLAC device is programmed and activated with the C5X bits set to a logic 0 state the ring relays will deactivate. *Note: "X" denotes channel number. Board Setup And Connection 2-3 L e 5 7D 11 S L IC D E V IC E E V AL U AT IO N B O AR D US E R ’S G U ID E 2.3 TELEPHONE LINE INTERFACE To interface the Le57D11 Dual SLIC device evaluation board to a telephone station set, simply plug the phone connector into the RJ-11 modular jack. The TIP and RING banana jacks are connected in parallel with the RJ-11 jack and allow the evaluation board to also be interfaced to telephony test equipment. A tip/ring surge protection circuit is included on the board. The protection circuit is placed in series with the tip and ring leads as they connect to the A and B leads of the SLIC device. The circuit is composed of a Power Innovations TISP61089 protection device, and the thick-film hybrid fusing resistor assembly (FRPX). While this circuit is not the definitive type, it is typical of a circuit that will withstand the rigors of Bellcore testing. 2.4 ANALOG SIGNAL CONNECTIONS Analog four-wire signal connections are provided to the Dual SLIC device by shielded BNC connectors on the board. The VRX connector is used for connecting an analog input signal to the SLIC device, where that signal will appear across the tip/ring two-wire interface. The VTX connector is an analog signal output representing the two-wire signal, which appears across tip and ring. 2.5 LED INDICATORS Four LED indicators are provided to monitor the various signals. The table below details status condition for each of the LEDs. Table 2–2 LED Status Descriptions LED Name On Off 1 DET1 DET1 active (low) DET1 inactive (high) 2 DET2 DET2 active (low) DET2 inactive (high) 3 RLD1 K1 active (on) K1 inactive (off) 4 RLD2 K2 active (on) K2 inactive (off) LEDs DET1 and DET2 indicate the status of the detect pins. The two LEDs reside in parallel with, and are isolated from, the main signal by feeding the signal through a 100 k resistor to the base of an LED drive transistor. Because the transistor requires only a few microamps to activate or deactivate, it does not present any loading effect to the output signal (DET1 and DET2). Refer to the attached schematic in “Evaluation Board Schematic” on page 31 RLD1 and RLD2 indicate the status of the ring relay (K1 and K2). The LEDs have the same drive circuit as the relay 1 and relay 2 circuits. The control signal is applied to the base of the transistors (QRL3 and QRL4) via the series resistor (RRLY3 and RRLY4). A logic 1 signal level turns the transistor on. This applies a ground potential to the LED that will light up to indicate the activation of the relay, along with the audible click from the relay. Refer to the attached schematic. 2.6 DIGITAL INTERFACE The Dual SLIC device is an analog part but may be placed in different operating states through logic control signals, which are presented to the digital control inputs. Three input signals and two output signals comprise the digital interface to the Le57D11Dual SLIC device. Operation of the SLIC device with these control inputs is explained in the Dual SLIC device data sheet. The following table gives a general description of the signals. 2-4 Board Setup And Connection L e 5 7D 11 S L IC D E V IC E E V AL U AT IO N B O AR D US E R ’S G U ID E Table 2–3 SLIC Device Control Inputs General Description Name Type Description C1X Input SLIC device control pin. C1 is the LSB C2X Input SLIC device control pin RLYX Input Control signal for the ring relay DETX Output Indicates the telephone is "Off-hook" (SLIC states 1 & 2) CFLTX_Monitor Output Optional line fault status The CFLT1 and CFLT2 pins are the fault detector and fault filter for channel 1 and channel 2. A 100 nF capacitor is connected between the CFLTX pin and AGND to set fault detector timing. Once the detector is tripped, the CFLT pin is pulled low and keeps toggling between Vth1 and Vth2 (refer to data sheet’s "Fault Detection" section) until the fault is removed. The CFLT capacitor provides a fault trigger delay of about 4 ms and a release delay of approximately 24 ms. During the fault occurrence, the resultant voltage pattern will form a saw-tooth waveform swinging between approximately 0.9 V and 3.0 V. With no fault present, CFLT will be approximately 4.8 V. 2.7 INTERCONNECTING TO A SLAC™ DEVICE EVALUATION BOARD In addition to operating in a Stand-alone mode, the SLIC device board may be connected to a SLAC device evaluation board, utilizing that SLAC device together with the SLIC device as the complete front-end system solution of an analog line interface circuit. The SLAC device performs the digital conversion and, through its connection with the Advanced Computer Interface (ACIF) Board, provides companded digital input and output of the line circuit. The SLAC device board has a pair of analog input and output BNC connectors, representing the analog input and output of the SLAC device’s channel and are wired directly to the SLIC device board’s corresponding output and input analog connectors. Control of the SLIC device is provided through the digital control cable that is wired from the SLAC device board’s control header for that channel to the control signal header on the SLIC device board. The JR2 INTERNAL/EXTERNAL jumpers on the SLIC device board must be placed in the external position to enable this control. (Refer to Figure 3–1.) A representative connection of the SLIC device board to a Legerity SLAC device board, along with the other major items and their interconnect, is shown in Figure 2–1. Board Setup And Connection 2-5 L e 5 7D 11 S L IC D E V IC E E V AL U AT IO N B O AR D US E R ’S G U ID E Figure 2–1 SLIC/SLAC Device Connection Diagram PCM-4 Analog Telephone Digital 1 Telephone ACIF Serial 3 2 QSLAC Computer Mouse Note: 2-6 1. ACIF Advanced Computer Interface Board. 2. Quad SLAC (SLAC) Device Evaluation Board. 3. Dual SLIC Device Evaluation Board. Board Setup And Connection SLIC CHAPTER 3 3.1 BOARD OPERATION AND CONTROL OVERVIEW The SLIC device board is controlled through on-board dip switches in Stand-alone mode or through an external control interface in conjunction with a Legerity SLAC device board, via selection of onboard jumpers. Operational performance is programmable by user selection of on-board components. Indicators are also included to provide visual state indication of key functions. User operation and programming selection is described in this section. 3.2 CONTROLLING THE DUAL SLIC DEVICE The SLIC device evaluation board can be operated in either an Internal or External mode. The Internal mode can be selected by placing the shunts provided on JR2 between the center and left columns. This allows switches S1 and S2 to control the device. The External mode can be selected by placing the shunts on JR2 between the center and right columns. 3.3 JUMPER SETTINGS This jumper header allows the SLIC device to be controlled by the on-board DIP switches S1 and S2 or by an external SLAC device board via the ribbon cable provided. Each pin and/or switch can be individually selected for internal (DIP switch) or external (QSLAC) control by changing the JR2 jumpers. The different jumper positions are shown in Figure 3–1. Figure 3–1 JR2_1X Jumper Options JR2_1 X JR2_1 X I N T E R N A L E X T E R N A L JR2_1 X SHOWN JUMPERED FOR EXTERNAL CONTROL I N T E R N A L E X T E R N A L JR2_1 X SHOWN JUMPERED FOR INTERNAL CONTROL The default jumper setting, as the board is shipped from Legerity, will have the control bits (C1X and C2X) for the respective SLIC device channel set for external control and the C5X input set to be controlled by the S1 or S2 switch. Refer to the following table for details on how the SLAC device control signals are connected to the board via the 20-pin ribbon cable. Board Operation and Control 3-7 L e 5 7D 11 S L IC D E V IC E E V AL U AT IO N B O AR D US E R ’S G U ID E Table 3–1 Le57D11 Dual SLIC Device Connections to SLAC Device SLIC Device Pin Jumper Row SLAC Device Board Control Pins P1_x Control Header Pin QSLAC Device 3.4 DET1 — CD11 (P1_1) 13 CFLT1_monitor — CD21 (P1_1) 1 C11 JR2_11 C31 (P1_1) 3 C21 JR2_12 C41 (P1_1) 5 K1 JR2_13 C51 (P1_1) 9 DET2 — CD12 (P1_2) 13 CFLT2_monitor — CD22 (P1_2) 1 C12 JR2_21 C32 (P1_2) 3 C22 JR2_22 C42 (P1_2) 5 K2 JR2_23 C52 (P1_2) 9 DIP SWITCHES S1 and S2 can be used to control the Dual SLIC device when the shunts on JR2_1X and JR2_2Xare moved to the INTERNAL position. S1 controls the setting for channel 1. Table 3–2 S1 and S2 DIP Switch Settings Switch Signal Le57D11 S1-1 C11 SLIC device state control S1-2 C21 SLIC device state control S2-1 C12 SLIC device state control S2-2 C22 SLIC device state control The third toggle switch on S1 and S2, labeled C51 and C52, is used to control the ring relay drive transistor. Setting the C5X switch to a logic level "1" (pointing to the left-hand side of the board) will apply a 5 V potential to the base of the drive transistor QRLX. This will then apply a ground potential to the relay causing it to activate. Setting the C5X switch to a logic level "0" (pointing to the righthand side of the board) will deactivate the relay. Table 3–3 Ring Relay Control 3-8 Switch Signal Le57D11 Logic State 1 S1-3 C51 Ring relay (K1) control Relay activated Relay deactivated S2-3 C52 Ring relay (K2) control Relay activated Relay deactivated Board Operation and Control Logic State 0 L e 5 7D 11 S L IC D E V IC E E V AL U AT IO N B O AR D US E R ’S G U ID E Figure 3–2 Factory Default S1 & S2 Switch Setting 1 0 S1 3.5 S2 COMPONENT CARRIERS Three component carriers are designed to accommodate the more commonly changed external components (i.e., the user programmable components). CC1_1 carries the input impedance programming and receive gain-setting components for channel 1. The header is arranged to allow a variety of configurations to be supported. The default components supplied with the evaluation board are designed to provide a nominal 600 Ω two-wire input impedance using a group delay compensated network comprised of RTX11, RTX21, CTX1, and RRX1. CC1_2 carries the input impedance programming and receive gain-setting components for channel 2. The header is arranged to allow a variety of configurations to be supported. The default components supplied with the evaluation board are designed to provide a nominal 600 Ω two-wire input impedance using a group delay compensated network comprised of RTX12, RTX22, CTX2, RRX2. (Refer to Figure 3–3 below.) CCA carries the fault detector capacitors (CFLT1 and CFLT2), the DC feed filter capacitors (CDC1 and CDC2) and the reference resistor (RREF) that programs the detector threshold for channel 1 and channel 2. An additional set of resistors (RDC1 and RDC2) can be placed on this component carrier. Please contact the factory for proper modification of loop current without affecting the LOOP DETECT threshold. These two resistors are not installed at the factory. (Refer to Figure 3–3 below.) Figure 3–3 Component Carriers CC1_1, CC1_2 and CCA CC1_1 CC1_2 CCA R DC1 C FLT1 C DC1 JUMPER JUMPER R RX1 R RX2 R TX11 R TX12 C DC2 R TX21 R TX22 C FLT2 C TX1 C TX2 R DC2 R REF Note: If the CCA component carrier is inadvertently plugged in upside down no harm can be done, as the components are a mirror image of each other. The following four diagrams contain the different input impedance configurations that are supported by the CC1_1 and CC1_2 headers. Diagram 2 is the factory default configuration. Board Operation and Control 3-9 L e 5 7D 11 S L IC D E V IC E E V AL U AT IO N B O AR D US E R ’S G U ID E Figure 3–4 Impedance Matching Network Configuration Diagrams VTX VTX RTX RRX R TX1 R TX JUMPER RSN RRX RTX2 RTX1 CX R RX VRX AGND CX R TX2 RSN VRX RRX Diagram 2 Diagram 1 VTX VTX R TX1 RA1 CA1 RTX2 RTX1 C A1 R TX1 RA1 CA1 RRX RTX2 RTX1 CX RSN R A1 JUMPER R TX2 VRX AGND C A1 R TX2 RSN VRX R A1 Diagram 3 3.6 CX R RX Diagram 4 TEST POINTS The Le57D11 Dual SLIC device evaluation board has test points on all signals with exception of TMGX, VBAT1, VCC and VEE. Six AGND clips points and six BGND clip points are also provided for connecting ground clips when probing circuitry on the evaluation board. A full list is shown below. Table 3–4 Le57D11 Evaluation Board Test Points Channel 1 3-10 Channel 2 Common VTX1 VTX2 CAS VRX1 VRX2 AGND (x6) C11 C12 BGND (x6) C21 C22 CFLT1 CFLT2 DET1 DET2 C51 C52 HP1 HP2 AX1 AX2 BX1 BX2 TIP1 TIP2 RING1 RING2 Board Operation and Control L e 5 7D 11 S L IC D E V IC E E V AL U AT IO N B O AR D US E R ’S G U ID E 3.7 RINGING CIRCUIT A generalized ring circuit is incorporated on the Le57D11 evaluation board. This circuit (refer to the attached schematic) sets the potential for the DB1 and DB2 pins of the SLIC device, the DAC input and supplies a ringing signal to the ring relay's K1 and K2. During ringing, the relay is activated (C5X is driven into a logic 1 state) and the AXX and BXX leads are placed in the Open Circuit State (also called the "Disconnect mode"). The ring signal is connected by the ring relays to the line through the ring feed resistors RR1 and RR2. When an offhook condition occurs, the bridging resistors RRTH1, RRTH2, RRTH3 and RRTH4 and filter capacitors CTH1 and CTH2 cause the voltage on DB1 and DB2 to go positive with respect to DAC and the detector (DET) pin goes low. Once DET becomes active the SLIC device must be placed in the Active State and the ring relays deactivated to allow the voice signal to be presented to the telephone station set. 3.8 BREADBOARD AREA In order to evaluate the performance of the SLIC device when the application also requires additional circuitry, a ½" by 1" breadboard area is provided on the evaluation board, one for each channel. The user can use this breadboard area to add whatever external circuitry is desired. The top right corner of each bread board area has one hole dedicated to +5 V, the lower right-hand corner is attached to −5 V and the upper left-hand corner is connected to AGND. Board Operation and Control 3-11 L e 5 7D 11 S L IC D E V IC E E V AL U AT IO N B O AR D US E R ’S G U ID E This page intentionally left blank. 3-12 Board Operation and Control CHAPTER 4 4.1 SOFTWARE OPERATION OVERVIEW The Legerity SLIC device evaluation boards operate in either Stand-alone mode, or in conjunction with Legerity's SLAC device evaluation board. The SLIC devices by themselves do not require any software for operation. However, when connected to Legerity’s SLAC devices, software control is available. Two software families, the WinSLAC™ software and WinACIF™ software, are provided for design and evaluation. 4.2 WINSLAC™ SOFTWARE The WinSLAC™ program is a software tool that aids in the design and development of telephone linecards and related voice band applications. It enables the user to design and generate coefficients for the programmable filters of Legerity's SLAC family of devices, and provides the user with predicted performance of system parameters. The program models the SLAC device, the line conditions and associated linecard SLIC device components. It calculates an optimum set of filter coefficients based on the overall system design conditions and generates the corresponding system responses for each of the programmable functions. It also calculates and plots predicted system responses for Two-Wire Return Loss (2WRL), Four-Wire Return Loss (4WRL), and Receive and Transmit frequency responses. The WinSLAC program uses gain-phase parameters (G-Parameters) to describe the SLIC device circuitry for input to the program. The G-Parameter arrays are typically produced by the program through Spice simulation of the SLIC device circuitry. They may also be entered manually, using data obtained by lab measurements on a real SLIC device circuit. In order to generate the G-parameters, the WinSLAC program incorporates and uses an evaluation version of MicroSim Corporation's PSpice and Schematics programs to simulate the analog circuitry of the SLIC device. Although the evaluation versions of these programs are sufficient for most designs, their limitations may impose certain restrictions on more complex designs. In such cases, the full production version of these programs may be purchased directly from MicroSim Corporation and easily integrated into the WinSLAC program operation. The WinSLAC software is not required to operate the SLIC device evaluation board, but becomes a necessary tool whenever the SLIC device evaluation board is used in conjunction with Legerity's SLAC device in a full evaluation setup. 4.3 WINACIF™ SOFTWARE The WinACIF™ software is used to communicate from a user’s computer to the SLAC device through the Advanced Computer Interface (ACIF) board. It is not necessary for stand-alone operation of the SLIC device evaluation board, but like the WinSLAC software, it becomes a necessary tool whenever the SLIC device evaluation board is used in conjunction with Legerity's SLAC device in a full evaluation setup. Table 4–1 illustrates which combination of software and ACIF board go together. Table 4–1 WinACIF Software and ACIF Board Combinations Board Type ACIF 2-A Software WinACIF Devices Supported QSLAC Software Operation System Environment Windows NT 4.0 Windows 98 Windows 95 4-13 L e 5 7D 11 S L IC D E V IC E E V AL U AT IO N B O AR D US E R ’S G U ID E This page intentionally left blank. 4-14 Software Operation CHAPTER 5 5.1 TRANSMISSION PERFORMANCE OVERVIEW This section deals with predicted response of the Le57D11 Dual SLIC device for 600 Ω, 900 Ω and German Complex loads as "seen" by the SLIC device via the WinSLAC program. The performance plots were generated by the WinSLAC program. These plots represent the response of the SLIC device using the default component values as shipped from the factory. 5.2 LE57D11 DUAL SLIC DEVICE SIMULATION MODEL When using the WinSLAC program to calculate coefficients for the SLAC device use the Le57D11 SLIC device model, make the appropriate changes for RTX, RRX and CTX, then save it as the “Le57D11.sch”. When the WinSLAC program calculates the coefficients these values can then be downloaded to the SLAC device. Note: 1. This model does not fully model all aspects of the Le57D11 device DC Operation. 2. This model is intended for use with the AC model in WinSLAC to generate coefficients for calculation of SLAC filters. 3. The default model assumes that Vbat is greater than, or equal to 48 V, and the Vab 2 region of anti_sat operation is desired. The link from Vab2 to Vab3 in the anti-sat region is not modeled. *Model for Le57D11 device 6/11/01 .SUBCKT Le57D11 1 2 3 4 5 6 *DC PATH EDC 16 0 2 0 1 R10 16 12 20K VAS 7 0 DC 0 AC 0 HDC 5 0 VAS 10K IAPP 0 7 .25M Q1 10 10 0 NPN Q2 7 9 12 NPN IASB 0 10 100U EAS2 9 10 POLY(1) 6 0 2.8 .857 *EAS2 9 10 POLY(1) 6 0 9.3 1.0 RB 6 0 2K VFSENSE 1 0 0 F1 13 0 VFSENSE 500 R1 13 3 36 RNOFLT 13 0 100MEG C0 13 0 8.99N *AC PATH ETX 14 0 3 2 0.33 R3 3 2 463K R2 14 4 1 C2 4 0 455N D1 3 0 DIODE D2 6 3 DIODE .MODEL NPN NPN IS=1E-14 .MODEL DIODE D IS=1E-14 .ENDS Le57D11 Transmission Performance 5-15 L e 5 7D 11 S L IC D E V IC E E V AL U AT IO N B O AR D US E R ’S G U ID E 5.3 EXAMPLE SCHEMATIC CIRCUIT The Dual SLIC device must be included in a top-level analog circuit that represents the entire analog front end of the linecard design. This circuit must include all circuit elements between tip/ ring and the analog input/output connections of the connected SLAC device. A basic circuit is included with the WinSLAC software. The MicroSim Schematics program allows editing of this circuit for updating user-selected component values or adding optional circuitry. The default circuit provided with the program is shown in Figure 5–1. Figure 5–1 SPICE Model Circuit Le57D11 See Note 3 RF See Note 1 3 AXBX AXBX RTX 41.2K 0.1µ ROUT2 1.1n CX RLDC VTX 1e-6 100 See Note 1 CVTX ROUT1 VTX 4 1e9 RIN 1e6 CTX 600 See Note 2 CP 0 RT RLDC See Note 5 2 CHP RSN 1 100n CHP 0 D3 1N4003 - + -56V 0 0 41.2K 1p RRX CVRX RP 124K 0.1µ VRX Notes: CDC 1.5µ 0 VBAT 0 0 1e-6 CDC 5 VBAT 6 See Note 4 100p 1. Do NOT change the names of the offpage connectors (TIP, RING, VTX, and VRX). Doing so will interfere with the creation of G-parameters. 2. The default values may or may not be the proper values for a given SLIC device. 3. Beacuase this model combines the TIP and RING into 1 pin, RF should be twice the value of your fuse resistance and CX should be half. 4. RIN is internal to the QSLAC device. 5. RLDC establishes the DC operating point of the SLIC device. This resistor HAS NO EFFECT on transmission performance and therefore we recommend it not be changed. The Spice circuit shown in Figure 5–1 has the default values (as shipped from the factory) for the impedance matching circuit and the loop current circuit for the Le57D11Dual SLIC device. 5-16 Transmission Performance L e 5 7D 11 S L IC D E V IC E E V AL U AT IO N B O AR D US E R ’S G U ID E 5.4 600 Ω LINE (DEFAULT) All programmable filters of the QSLAC device, except the Balance Filter, were disabled for this condition. The QSLAC device has the capability of altering the programmed two-wire impedance, frequency response, and path gains. By disabling these functions, the performance measurements represent pure SLIC-only operation. The balance filter was left enabled because it performs the hybrid balance function of the complete solution, and without this, four-wire return loss measurements are meaningless. When using the WinSLAC coefficient calculation program, the following table shows, by main menu items and sub-menu items, what the required filter settings should be for the generation of coefficients. Main Menu Item System Sub-Menu Desired Impedance: ZD = to 600 Line Impedance: ZL = to 600 AISN & Z Filter: SLAC Set AISN to disable ZIIR & ZFIR to disable X & R to 1 R & X Filters/Gain Blocks: GX & GR to 0.0 AX & AR to 0.0 B Filter & Adaptive Balance: B to calculate The above settings cause the SLAC device to not filter or change the signal sent to the SLIC device (except for echo cancellation). Transmission Performance 5-17 L e 5 7D 11 S L IC D E V IC E E V AL U AT IO N B O AR D US E R ’S G U ID E Figure 5–2 600 Ω Line Two-Wire Return Loss Performance Figure 5–3 5-18 600 Ω Line Four-Wire Return Loss Performance Transmission Performance L e 5 7D 11 S L IC D E V IC E E V AL U AT IO N B O AR D US E R ’S G U ID E Figure 5–4 600 Ω Line Receive Path Attenuation Distortion Performance Figure 5–5 600 Ω Line Transmit Path Attenuation Distortion Performance Transmission Performance 5-19 L e 5 7D 11 S L IC D E V IC E E V AL U AT IO N B O AR D US E R ’S G U ID E 5.5 900 Ω LINE All programmable filter blocks of the QSLAC device were enabled, except AX and AR, which were set to 0 dB gain each. The two-wire and balance impedances were specified as 900 Ω, and the WinSLAC program computed programmed coefficients to meet this line condition. When using the WinSLAC coefficient calculation program, the following table shows, by main menu items and sub-menu items, what the required filter settings should be for the generation of coefficients. Main Menu Item System Sub-Menu Desired Impedance: ZD = to 900 Line Impedance: ZL = to 900 AISN & Z Filter: SLAC Set AISN to calculate ZIIR & ZFIR to calculate X & R to calculate R & X Filters/Gain Blocks: GX & GR to calculate AX & AR to 0.0 B Filter & Adaptive Balance: 5-20 B to calculate Transmission Performance L e 5 7D 11 S L IC D E V IC E E V AL U AT IO N B O AR D US E R ’S G U ID E Figure 5–6 900 Ω Line Two-Wire Return Loss Performance Figure 5–7 900 Ω Line Four-Wire Return Loss Performance Transmission Performance 5-21 L e 5 7D 11 S L IC D E V IC E E V AL U AT IO N B O AR D US E R ’S G U ID E Figure 5–8 900 Ω Line Receive Path Attenuation Distortion Performance Figure 5–9 900 Ω Line Transmit Path Attenuation Distortion Performance 5-22 Transmission Performance L e 5 7D 11 S L IC D E V IC E E V AL U AT IO N B O AR D US E R ’S G U ID E 5.6 GERMAN COMPLEX IMPEDANCE All programmable filter blocks of the QSLAC device were enabled, except AX and AR, which were set to 0 dB gain each. The two-wire and balance impedances were specified as the German complex impedance (220 Ω in series with a parallel RC network of 820 Ω and 115 nF) and the WinSLAC program computed programmed coefficients to meet this line condition. When using the WinSLAC coefficient calculation program, the following table shows, by main menu items and sub-menu items, what the required filter settings should be for the generation of coefficients. . Table 5–1 Required Filter Settings for Generating Coefficients Main Menu Item System Sub-Menu Set Desired Impedance: ZD = to complex impedance shown below Line Impedance: ZL = to complex impedance shown below AISN to calculate AISN & Z Filter: ZIIR & ZFIR to calculate X & R to calculate SLAC R & X Filters/Gain Blocks: GX & GR to calculate AX & AR to 0.0 B Filter & Adaptive Balance: B to calculate For the complex impedances, the values were entered in S-polynomial format. The formula used is: –2 ( R 1 + R 2 ) + ( R 1 + R 2 + C )s + ( 2.0746E )s- = 1040 Z ( s ) = ----------------------------------------------------------------------------------------------------------------------------– 5 1 + ( R 2 C )s 1 + ( 9.43E )s The representative circuit is: R2 R1 820 220 115 nF The table below illustrates the entry fields in the WinSLAC program that the values above are placed in. S-Polynomial Entry s0 (R1 + R2) s0 1.0000000000 s1 ( R1 • R2 • C ) s1 ( R2 • C ) s2 0.0000000000 s2 0.0000000000 Numerator Denominator Transmission Performance 5-23 L e 5 7D 11 S L IC D E V IC E E V AL U AT IO N B O AR D US E R ’S G U ID E Figure 5–10 German Complex Line Two-Wire Return Loss Performance Figure 5–11 German Complex Line Four-Wire Return Loss Performance 5-24 Transmission Performance L e 5 7D 11 S L IC D E V IC E E V AL U AT IO N B O AR D US E R ’S G U ID E Figure 5–12 German Complex Line Receive Path Attenuation Distortion Performance Figure 5–13 German Complex Line Transmit Path Attenuation Distortion Performance Transmission Performance 5-25 L e 5 7D 11 S L IC D E V IC E E V AL U AT IO N B O AR D US E R ’S G U ID E 5.7 OFF-HOOK MEASUREMENTS Some typical transmission performance measurements have been taken with the Le57D11 Dual SLIC device connected to Legerity’s Am79Q021 QSLAC device. The table below lists conditions for off-hook measurements with a 600 Ω load. QSLAC Device Am79Q021 Rev D1 Le57D11 Dual SLIC device Rev AB0 Le57D11 Dual SLIC model date 6/11/01 VBAT1 −56 V VBAT2 N/A SLIC device State ACTIVE RLOAD 600 Ω The measured results will be approximately: VAB(SLIC) 17.0 VDC IAB 27.88 mA The default evaluation board component values (as set at the factory) for the circuit were used. These values are: Le57D11 SLIC Device Component Value RRX 124 k RT1 41.2 k RT2 41.2 k CT 100 pF RF 100 Ω [50 Ω each] RDC1 See Note* RDC2 See Note* CDC1 1.5 µF CDC2 1.5 µF RREF 15 k Note: *Please contact your Legerity field representative for proper modification without affecting LOOP DETECT threshold. 5-26 Transmission Performance CHAPTER 6 6.1 QUICK START/STAND-ALONE OPERATIONAL TEST PROCEDURES OVERVIEW This section describes the quick start and stand-alone test procedures. The stand-alone test is designed to verify operation of the Le57D11 Dual SLIC device without any external control device. The quick start procedures are very much identical to the stand-alone test with the exception of the oscilloscope and function generator. The quick start steps assume the Le57D11 Dual SLIC device is being connected to a SLAC device and will be controlled via this device. If the Le57D11 Dual SLIC device is to be used in a Stand-alone mode, it is highly recommended that the user follow the standalone operational test procedures. 6.2 STAND-ALONE OPERATIONAL TEST This section explains a simple setup to verify proper functionality of the SLIC device evaluation board. This procedure uses the default values (refer to the schematic) when the board is shipped. If any modifications have been made to the board, output voltage reading may vary from those described in this document. Please note, this setup describes channel 1 only; however, the same steps apply for channel 2. These measurements are made on-hook. Equipment needed for this test is: • A dual channel oscilloscope. • A function Generator. • Power supplies: +5 and VBAT1 supplies. Check that all supplies are turned off while making power supply connections. Please note that all ground connections must terminate at the power supply. 1. From the PW1 header, connect the VCC1 and AUX_VCC cables to +5 V DC. 2. From the PW1 header, connect the VBAT1 cable to the battery supply (set to a –48 V). 3. Connect the ground/common inputs of all supplies and the evaluation board (AGND and BGND) together. Remember to keep all grounds terminated at one of the power supplies. 4. Move all jumpers on JR2_1 to the Internal or Stand-alone mode, and set the switches on S1 to the SLIC device decoding states shown below (Active mode). • C1 = 1 • C2 =0 5. Connect a 600 Ω load between the A (TIP) and B (RING) banana jacks. 6. Connect the function generator to the Receive (VRX) input and one channel of the oscilloscope. Set the VRX signal to be a 1 V p/p sine wave @ 1 kHz with no offset voltage. 7. Connect the second channel of the oscilloscope to the VTX test point. 8. Check all connections and turn on the power supplies. After step eight, there will typically be a 560 mV p/p sine wave riding on approximately 19.9 V DC signal between TIP and RING of the telephone. The same 560 mV p/p signal (minus the DC voltage) will be at the Transmit (VTX) output. If a standard telephone station set is connected to SK1 on the board, an audible tone can be heard when the receiver is lifted (remove the 600 Ω load before plugging in the handset). A 180° phase shift will occur between VTX and VRX. The table below Quick Start/Stand-alone Operational Test Procedures 6-27 L e 5 7D 11 S L IC D E V IC E E V AL U AT IO N B O AR D US E R ’S G U ID E shows various points the user can check with either a DVM or an oscilloscope. The values listed below are typical. Table 6–1 Evaluation Board Test Point Values for a DVM and an Oscilloscope Test Point Oscilloscope (mV p/p) No Load 600 Ω Load DVM (mV RMS)* No Load 600 Ω Load VRX 1000 1000 350 350 AX 968 562 338 200 BX 968 562 338 200 VTX 656 375 228 135 *Note: Please note when measuring the peak-to-peak AC signal from the generator using a DVM rather than an oscilloscope, the meter will display a different value. The reason for this is that an oscilloscope displays TRUE value and a meter measures RMS values. To convert from TRUE to RMS, refer to the formula below. RMS = TRUE ----------------2.828 6.3 TEST SETUP TO VERIFY RINGING The ringing on the Le57D11 Dual SLIC device evaluation board uses an unbalanced ringing source. The ringing voltage can be supplied via the cable labeled RING SOURCE. To check the ringing circuit, follow the steps below: 1. Ensure the SLIC device is powered up and programmed into the Disconnect state (refer to the decoding table below). 2. Connect the RING SOURCE banana jack to an appropriate ring signal.* 3. Place the C51 jumper between pins 1 to 2 on JR2_1. 4. Flip the C51 toggle switch (labeled C3 on the switch) to a logic 1 state to activate the ring relay. Note: *Typically a 20 Hz sine wave 90 Vrms with −48 V bias. As the C51 switch is set an audible click will be heard, indicating the relay is activated. If an on-hook telephone is connected to the TIP and RING leads (or through connector SK1, the RJ-11-type phone connector), the phone will ring. To deactivate the ringing circuitry flip the C51 switch back to a logic 0 state. Table 6–2 Le57D11 Dual SLIC Device State Decoding 6.4 State C2x C1x Two-Wire Status DETx output 0 0 0 Disconnect Ring-Trip Detector 1 0 1 Active Loop Detector 2 1 1 Polarity Reversed Loop Detector 3 1 0 Standby Loop Detector QUICK START SETUP The quick start setup, as noted at the beginning of this chapter, assumes the Le57D11 Dual SLIC device evaluation board is being connected to a SLAC device board. The evaulation board is shipped from the factory ready for connection to an external-controlling device. The following steps will help ensure proper connection and setup. Check that all power supplies are turned off while making connections. Please note that all ground connections must terminate at the power supplies. 6-28 Quick Start/Stand-alone Operational Test Procedures L e 5 7D 11 S L IC D E V IC E E V AL U AT IO N B O AR D US E R ’S G U ID E 1. Attach the SLIC device power cable to the PW1 connector (the cable is keyed and will only fit one way). 2. Connect BGND to the common ground connection of the power supplies. 3. Connect VBAT1 to the main battery supply. 4. Connect the AUX_VCC input to a 5 V supply. 5. Connect the VCC1 input to the 5 V supply. 6. Connect the AGND input to the common ground connections for the supplies. 7. The VTMG, VBAT2, VNEG and VEE cables do not need to be used at this time. 8. If supplying an off-board-ringing signal, attach the ring source cable to it. 9. Connect either a standard desktop phone station to the SK1 connector or telephony test equipment to the TIP/RING banana jacks. Next: 1. Attach the 20-pin connector from P1 to the appropriate SLAC device channel header. 2. Connect a BNC cable from the VOUT connection of the SLAC device to the VRX connector on the evaluation board. 3. Connect a BNC cable from the VIN connection of the SLAC device to the VTX connector of the evaluation board. 4. Apply power to the entire evaluation system. Quick Start/Stand-alone Operational Test Procedures 6-29 L e 5 7D 11 S L IC D E V IC E E V AL U AT IO N B O AR D US E R ’S G U ID E This page intentionally left blank. 6-30 Quick Start/Stand-alone Operational Test Procedures CHAPTER 7 7.1 EVALUATION BOARD SCHEMATIC EVALUATION BOARD SCHEMATIC See the schematic for the Le57D11 SLIC device evaluation board on the next page. Evaluation Board Schematic 7-31 5 4 3 2 1 BNC11 1 VTX1 AGND1 AGND2 AGND3 AGND4 AGND5 VTX1 AGND6 RTX21 41.2K CTX1 AUX_VCC 100pF AGND BGND2 BGND3 BGND4 BGND5 RTX11 41.2K BGND6 R11 2.21K D S1 C11 9 C C21 2 C C51 7 C NC 10 NO 1 NC 8 NO 3 NC 6 NO BNC12 FRP1 VRX1 124K BGND U1 VRX1 1 VTX1 5 2 CFLT1_MONITOR 26 CFLT1_MONITOR 1 2 JR2_12 3 1 2 CFLT1 100nF CFLT-1 C11 C21 CFLT1 3 CDC1 HP1 6 5 C11 C21 1 2 4 DET1 7 K1 K1 8 2 3 G NC GND GND 7 6 4 K2 K2 5 28 5 4 RRTN1 50 Ohm 9 TMG1 BJ2 RING1 2 5 RING1 R2A 6 BGND R2B 11 NC2 15 10 9 BGND 8 Ring Relay L11A050AA RTMG1 30 TIP1 3 1 AUX_VCC 12 * Diode shown for reference only. Part is not on PCB. See note 4. BGND AGND BJ1 SK1 1 4 CCP1 100nF BX1 29 3 R1A TISP61089 CBX1 2200pF BGND1 R1B TIP1 5 BGND CDC1 1.5uF DET1 JR2_13 3 U2 1 DB1 32 1 K1 CHP1 100nF BX1 DB1_IN JR2_11 3 HP1 31 OPTIONAL AGND 1 3 5 7 9 11 13 15 17 19 27 RSN1 See Note 2. 2 4 6 8 10 12 14 16 18 20 AX1 NC1 AX1 CAX1 2200pF VBAT1 RDC1 P1_1 D RRX1 1 RS1 AUX_VCC 1 1.5K AGND K1_TP VCC1 RRLY1 DET1 1 AUX_VCC C51 RDET1 Q1 2N3906 1.2K DVBH 7 RELAY1_CTRL 100K QRL1 2N3904 RELAY1_CTRL C4 470nF 2 AGND VBAT 24 DIODE C1 100nF AGND AGND RRLY3 25 DAC_IN P1_2 2 4 6 8 10 12 14 16 18 20 CFLT2_MONITOR JR2_21 3 JR2_22 3 JR2_23 3 BGND DAC TMG2 CAS 1 3 5 7 9 11 13 15 17 19 RLD1 indicates the status of relay K1. ON = K1 active. OFF = K1 inactive. VBAT1 AGND C RLD1 VCC 2 8 QRL3 2N3904 1.2K 19 1.5K AGND CCAS 330nF 2 1 2 1 C12 C22 RREF DET2 9 CAS 10 IREF 11 12 C12 C22 13 DET2 15.0K C RTMG2 AGND 2 1 AGND FRP2 RELAY2_CTRL DET2 1 AUX_VCC DB2_IN 23 DB2 CFLT2_MONITOR 17 CFLT2 14 CDC2 S2 2 C12 RDET2 Q2 2N3906 NC 9 C C22 2 C AGND C51 7 C 10 CFLT2 100nF CDC2 1.5uF NO NC 8 OPTIONAL NO 3 See Note 2. NC 6 NO RDC2 15 16 AGND BGND 20 AX2 AX2 22 HP2 18 BX2 21 VBAT1 CHP2 100nF VTX2 VRX2 AGND K1 8 2 3 G NC GND GND 7 6 4 K2 K2 5 7 4 R1A BJ3 TIP2 BJ4 RING2 SK2 RRTN2 50 Ohm 1 2 4 9 BGND 5 RING2 R2A BGND R2B 11 6 NC2 15 10 9 8 Ring Relay BGND L11A050AA RRX2 1 TIP2 3 3 CCP2 100nF BX2 B 5 BGND CBX2 2200pF BNC22 1 R1B 5 K1 TISP61089 Le57D11 5 U3 1 HP2 RSN2 NC1 K2 CAX2 2200pF BGND CFTL-2 1 100K BGND2 1 AUX_VCC 12 * Diode shown for reference only. Part is not on PCB. See note 4. AUX_VCC B 124K RS2 RTX12 41.2K VRX2 1 C51 RLD2 CTX2 K2_TP RRLY2 100pF QRL2 2N3904 RELAY2_CTRL AGND RTX22 41.2K 1.2K RLD2 indicates the status of relay K2. ON = K2 active. OFF = K2 inactive. BNC21 2 BGND1 AGND VBAT1 VTX2 VBAT1 AUX_VCC 1 VTX2 RRLY4 AUX_VCC VCC1 QRL4 2N3904 1.2K VCC1 AGND BGND AGND GND COMPONENT PLACEMENT FOR CCA AGND COMPONENT ARRANGEMENT FOR CC1_1 BGND CCA 1 PW1 RING_SOURCE 1 2 3 4 5 6 7 8 9 10 BGND RR1 400 Ohm RR2 400 Ohm VBAT1 RSR1 1.0M RDC1 16 2 CFLT1 15 U1-32 3 CDC1 14 U1-3 RREF 13 4 5 RING_SOURCE DAC_IN RRTH1 909K RRTH3 909K AUX_VCC RSR4 909K CRT 100nF 12 1 16 VRX1 2 15 3 4 U1-10 6 CDC2 11 U1-14 7 CFLT2 10 U1-17 8 RDC2 9 U1-15 CC1_2 VTX1 U1-2 JUMPER RSN1 VTX2 1 16 VRX2 2 15 14 3 13 4 RSN2 14 JUMPER 13 5 RRX1 12 5 RRX2 12 6 RTX11 11 6 RTX12 11 7 RTX21 10 7 RTX22 10 8 CTX1 9 8 CTX2 9 A VCC1 AGND AGND + A COMPONENT ARRANGEMENT FOR CC1_2 CC1_1 EC1 10uF + EC2 10uF + EC3 10uF RRTH4 1.0M VEE CTH2 100nF RRTH2 1.0M CTH1 100nF BGND RS1 BGND AGND BGND BGND AGND Notes: BGND DB1_IN AGND 1). CCA holds the CFLTx, CDCx, RDCx and RREF components. The designation U 1-xx refers to pins on the SLIC device. 2). Contact manufacturer for proper modification of loop current without affecting LOOP DETECT threshold. RS2 3). The only difference between board revisions A and C is two additional LED ’s, two resistors and two transistors to show relay status. DB2_IN 4). Ring Relay K1 and K2 are polarized. However, if the user desires, a diode may be placed across power and ground pins (1 & 12) to act as snubber circuit. AGND Legerity, Inc. 4509 Freidrich Lane Austin, Texas 78744 Title Le57D11 Dual SLIC Evaluation Board Size Document Number Rev C Custom Date: 5 4 3 2 Friday, November 16, 2001 1 Sheet 1 of 1 Legerity P.O. Box 18200 Austin, Texas 78760-8200 512-228-5400 Corporate Office 512-228-5507 Fax 800-432-4009 North America Toll Free To contact the Legerity Sales Office nearest you, or to download or order product literature, visit our web site at www.legerity.com To order literature in North America, call: 800-572-4859 or email: [email protected] To order literature in Europe or Asia, call: 44-0-1179-341607 or email: Europe - [email protected] Asia - [email protected]