CD40107BMS CMOS Dual 2 Input NAND Buffer/Driver December 1992 Features Pinouts • High Voltage Type (20V Rating) CD40107BF TOP VIEW • 32 Times Standard B Series Output Current Drive Sinking Capability - 136mA Typ. at VDD = 10V - VDS = 1V NC 1 14 VDD NC 2 13 NC A 3 12 NC B 4 11 D C=A• B 5 10 E • 100% Tested for Quiescent Current at 20V • 5V, 10V and 15V Parametric Ratings • Maximum Input Current of 1µA at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC NC 6 • Noise Margin (Over Full Package/Temperature Range) RL to VDD = 10kΩ - 1V at VDD = 5V - 2V at VDD = 10V - 2.5V at VDD = 15V • Meets All Requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of ‘B’ Series CMOS Devices” VSS 7 9 F=D• E 8 NC NC = NO CONNECTION Functional Diagram Applications C=A• B • Driving Relays, Lamps, LEDs A B • Line Driver VSS • Level Shifter (Up or Down) Description F=D• E CD40107BMS is a dual 2 input NAND buffer/driver containing two independent 2 input NAND buffers with open drain single n-channel transistor outputs. This device features a wired OR capability and high output sink current capability (136mA typ. at VDD = 10V, VDS = 1V). D E VSS The CD40107BMS is supplied in these 14 lead outline packages: Braze Seal DIP H4H Frit Seal DIP H1B Ceramic Flatpack H3W CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999 7-18 File Number 3355 Specifications CD40107BMS Absolute Maximum Ratings Reliability Information DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V (Voltage Referenced to VSS Terminals) Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA Operating Temperature Range . . . . . . . . . . . . . . . . -55oC to +125oC Package Types D, F, K, H Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for 10s Maximum Thermal Resistance . . . . . . . . . . . . . . . . θja θjc Ceramic DIP and FRIT Package . . . . . 80oC/W 20oC/W Flatpack Package . . . . . . . . . . . . . . . . 70oC/W 20oC/W Maximum Package Power Dissipation (PD) at +125oC For TA = -55oC to +100oC (Package Type D, F, K) . . . . . . 500mW For TA = +100oC to +125oC (Package Type D, F, K). . . . . . Derate Linearity at 12mW/oC to 200mW Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW For TA = Full Package Temperature Range (All Package Types) Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER Supply Current SYMBOL IDD CONDITIONS (NOTE 1) VDD = 20V, VIN = VDD or GND VDD = 18V, VIN = VDD or GND Input Leakage Current IIL VIN = VDD or GND VDD = 20 VDD = 18V Input Leakage Current IIH VIN = VDD or GND VDD = 20 VDD = 18V LIMITS GROUP A SUBGROUPS TEMPERATURE MIN MAX UNITS 1 +25oC - 2 µA 2 +125 C - 200 µA 3 -55oC - 2 µA o o 1 +25 C -100 - nA 2 +125oC -1000 - nA 3 -55oC -100 - nA o 1 +25 C - 100 nA 2 +125oC - 1000 nA 3 -55oC - 100 nA o Output Drive Voltage VOL5A VDD = 5V, IOL = 16mA 1 +25 C - 0.4 V Output Drive Voltage VOL5B VDD = 5V, IOL = 34mA 1 +25oC - 1.0 V Output Drive Voltage o VOL10A VDD = 10V, IOL = 37mA 1 +25 C - 0.5 V VOL10B VDD = 10V, IOL = 68mA 1 +25oC - 1.0 V 1 +25oC - 0.5 V -2.8 -0.7 V 0.7 2.8 V VOL15 Output Current (Source) IOH5A Output Current (Source) IOH5B Output Current (Source) IOH10 Output Current (Source) IOH15 N Threshold Voltage VNTH P Threshold Voltage VPTH Functional (Note 3) F VDD = 15V, IOL = 50mA No Internal Pull-Up Device VDD = 10V, ISS = -10µA 1 +25oC o VSS = 0V, IDD = 10µA 1 +25 C VDD = 2.8V, VIN = VDD or GND 7 +25oC VDD = 20V, VIN = VDD or GND 7 +25oC VDD = 18V, VIN = VDD or GND 8A +125oC VDD = 3V, VIN = VDD or GND 8B -55oC VOH > VOL < VDD/2 VDD/2 V Input Voltage Low (Note 2, 3) VIL VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC - 1.5 V Input Voltage High (Note 2, 3) VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC 3.5 - V Input Voltage Low (Note 2, 3) VIL VDD = 15V, VOH > 13.5V, VOL < 1.5V 1, 2, 3 +25oC, +125oC, -55oC - 4 V Input Voltage High (Note 2, 3) VIH VDD = 15V, VOH > 13.5V, VOL < 1.5V 1, 2, 3 +25oC, +125oC, -55oC 11 - V Tri-State Output Leakage High IOZ VIN = VDD or GND VOUT = VDD 1 +25oC - 2 µA 2 +125oC - 20 µA 3 -55oC - 2 µA VDD = 20V VDD = 18V NOTES: 1. All voltages referenced to device GND, 100% testing being implemented. 2. Go/No Go test with limits applied to inputs. 7-19 3. For accuracy, voltage is measured differentially to VDD. Limit is 0.050V max. Specifications CD40107BMS TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER Propagation Delay Transition Time SYMBOL TPHL TPLH CONDITIONS (NOTE 1, 2) GROUP A SUBGROUPS TEMPERATURE VDD = 5V, VIN = VDD or GND 9 10, 11 TTHL TTLH VDD = 5V, VIN = VDD or GND +25oC +125oC, -55oC LIMITS MIN MAX UNITS - 200 ns - 270 ns 9 +25oC - 100 ns 10, 11 +125oC, -55oC - 135 ns NOTES: 1. CL = 50pF, RL = 120Ω, Input TR, TF < 20ns. 2. -55oC and +125oC limits guaranteed, 100% testing being implemented. TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current SYMBOL CONDITIONS NOTES TEMPERATURE MIN MAX UNITS IDD VDD = 5V, VIN = VDD or GND 1, 2 -55oC, +25oC - 1 µA +125oC - 30 µA VDD = 10V, VIN = VDD or GND VDD = 15V, VIN = VDD or GND Output Voltage VOL VDD = 5V, No Load 1, 2 1, 2 1, 2 - 2 µA +125oC - 60 µA -55oC, +25oC - 2 µA +125oC - 120 µA +25oC, +125oC, - 50 mV -55oC, +25oC -55oC Output Voltage VOL VDD = 10V, No Load 1, 2 +25oC, +125oC, -55oC - 50 mV Output Voltage (Note 5) VOH VDD = 5V, No Load 1, 2 +25oC, +125oC, -55oC 4.95 - V Output Voltage (Note 5) VOH VDD = 10V, No Load 1, 2 +25oC, +125oC, -55oC 9.95 - V VDD = 5.0V, VOUT = 0.4V 1, 2 +125oC 12 - mA -55oC 21 - mA +125oC 25 - mA -55oC 44 - mA +125oC 28 - mA -55oC 49 - mA +125oC 51 - mA -55oC 89 - mA +125oC 38 - mA -55oC 66 - mA Output Current (Sink) Output Current (Sink) Output Current (Sink) Output Current (Sink) Output Current (Sink) IOL5A IOL5B IOL10A IOL10B IOL15 VDD = 5V, VOUT = 1.0V 1, 2, 4 VDD = 10V, VOUT = 0.5V 1, 2, 4 VDD = 10V, VOUT = 1V 1, 2, 4 VDD = 15V, VOUT = 0.5V 1, 2 Input Voltage Low VIL VDD = 10V, VOH > 9V, VOL < 1V 1, 2, 4 +25oC, +125oC, -55oC - 3 V Input Voltage High VIH VDD = 10V, VOH > 9V, VOL < 1V 1, 2, 4 +25oC, +125oC, -55oC +7 - V 7-20 Specifications CD40107BMS TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) LIMITS PARAMETER Propagation Delay SYMBOL TPHL CONDITIONS NOTES TEMPERATURE MIN MAX UNITS 1, 2, 3 +25oC - 90 ns 1, 2, 3 +25oC - 60 ns VDD = 10V 1, 2, 3 +25oC - 120 ns VDD = 15V 1, 2, 3 +25oC - 100 ns VDD = 10V 1, 2, 3 +25oC - 40 ns 1, 2, 3 +25oC - 20 ns VDD = 10V VDD = 15V Propagation Delay Transition Time TPLH TTHL VDD = 15V Transition Time Input Capacitance TTLH CIN o VDD = 10V 1, 2, 3 +25 C - 70 ns VDD = 15V 1, 2, 3 +25oC - 50 ns 1, 2 +25oC - 7.5 pF Any Input NOTES: 1. All voltages referenced to device GND. 2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial design release and upon design changes which would affect these characteristics. 3. CL = 50pF, RL = 120Ω, pull up resistor to VDD, Input TR, TF < 20ns. 4. Measured with external pull-up resistor RL = 10K to VDD TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current SYMBOL IDD CONDITIONS NOTES TEMPERATURE MIN MAX UNITS VDD = 20V, VIN = VDD or GND 1, 4 +25oC - 7.5 µA N Threshold Voltage VNTH VDD = 10V, ISS = -10µA 1, 4 +25oC -2.8 -0.2 V N Threshold Voltage Delta ∆VTN VDD = 10V, ISS = -10µA 1, 4 +25oC - ±1 V P Threshold Voltage VTP VSS = 0V, IDD = 10µA 1, 4 +25oC 0.2 2.8 V P Threshold Voltage Delta ∆VTP VSS = 0V, IDD = 10µA 1, 4 +25oC - ±1 V VDD = 18V, VIN = VDD or GND 1, 5 +25oC VOH > VDD/2 VOL < VDD/2 V 1, 2, 3, 4 +25oC - 1.35 x +25oC Limit ns Functional F VDD = 3V, VIN = VDD or GND Propagation Delay Time TPHL TPLH VDD = 5V NOTES: 1. All voltages referenced to device GND. 2. CL = 50pF, RL = 120Ω, pull up resistor to VDD, Input TR, TF < 20ns. 3. See Table 2 for +25oC limit. 4. Read and Record 5. Measured with external pull-up resistor RL = 10K to VDD TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25oC PARAMETER Supply Current - MSI-1 SYMBOL IDD 7-21 DELTA LIMIT ± 0.2µA Specifications CD40107BMS TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25oC PARAMETER SYMBOL Output Current (Sink) Output Current (Source) DELTA LIMIT IOL5 ± 20% x Pre-Test Reading IOH5A ± 20% x Pre-Test Reading TABLE 6. APPLICABLE SUBGROUPS MIL-STD-883 METHOD GROUP A SUBGROUPS Initial Test (Pre Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A Interim Test 1 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A Interim Test 2 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A 100% 5004 1, 7, 9, Deltas 100% 5004 1, 7, 9 100% 5004 1, 7, 9, Deltas 100% 5004 2, 3, 8A, 8B, 10, 11 Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11 Subgroup B-5 Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas Subgroup B-6 Sample 5005 1, 7, 9 Sample 5005 1, 2, 3, 8A, 8B, 9 CONFORMANCE GROUP PDA (Note 1) Interim Test 3 (Post Burn-In) PDA (Note 1) Final Test Group A Group B Group D READ AND RECORD IDD, IOL5, IOH5A Subgroups 1, 2, 3, 9, 10, 11 Subgroups 1, 2 3 NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2. TABLE 7. TOTAL DOSE IRRADIATION CONFORMANCE GROUPS Group E Subgroup 2 TEST READ AND RECORD MIL-STD-883 METHOD PRE-IRRAD POST-IRRAD PRE-IRRAD POST-IRRAD 5005 1, 7, 9 Table 4 1, 9 Table 4 TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS OSCILLATOR FUNCTION OPEN GROUND VDD Static Burn-In 1 (Note 1) 1, 2, 5, 6, 8, 9, 12, 13 3, 4, 7, 10, 11 14 Static Burn-In 2 (Note 1) 1, 2, 5, 6, 8, 9, 12, 13 7 3, 4, 10, 11, 14 Dynamic Burn-In (Note 3) 1, 2, 6, 8, 12, 13 7 14 1, 2, 5, 6, 8, 9, 12, 13 7 3, 4, 10, 11, 14 Irradiation (Note 2) 9V ± -0.5V 50kHz 25kHz 5, 9 - 3, 4, 10, 11 NOTE: 1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V 2. Each pin except VDD and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures, VDD = 10V ± 0.5V 3. Each pin except VDD and GND will have a series resistor of 4.75K ±5%, VDD = 18V ±.5. 7-22 CD40107BMS Schematic VDD * VDD ALL INPUTS ARE PROTECTED BY CMOS PROTECTION NETWORK TRUTH TABLE A * VSS C=A• B 3, (11) 5, (9) B * 4, (10) VSS = B 0 0 1* C Z** 1 0 1* Z** 0 1 1* Z** 1 1 0 * Requires external pull-up resistor (RL) to VDD. VDD = 14 VSS NOTE: 1 OF 2 GATES (NUMBERS IN PARENTHESES ARE TERMINAL NUMBERS FOR SECOND GATE) A 7 ** Without pull-up resistor (3-state). FIGURE 1. 1 OF 2 GATES AMBIENT TEMPERATURE (TA) = +25oC 960 OUTPUT LOW (SINK) CURRENT (IOL) (mA) OUTPUT LOW (SINK) CURRENT (IOL) (mA) Typical Performance Characteristics GATE-TO-SOURCE VOLTAGE (VGS) = 15V 800 640 480 10V 320 160 5V 0 GATE-TO-SOURCE VOLTAGE (VGS) = 15V 400 320 10V 240 160 80 5V 0 175 SUPPLY VOLTAGE (VDD) = 5V tTLH 5V tTHL 50 15 AMBIENT TEMPERATURE (TA) = +25oC AMBIENT TEMPERATURE (TA) = +25oC 60 10 FIGURE 3. MINIMUM OUTPUT LOW (SINK) CURRENT CHARACTERISTICS RL = 120Ω TO VDD 70 5 DRAIN-TO-SOURCE VOLTAGE (VDS) (V) PROPAGATION DELAY TIME (tPLH, tPHL) (ns) TRANSITION TIME (tTLH, tTHL) (ns) 480 5 10 15 DRAIN-TO-SOURCE VOLTAGE (VDS) (V) FIGURE 2. TYPICAL OUTPUT LOW (SINK) CURRENT CHARACTERISTICS 80 AMBIENT TEMPERATURE (TA) = +25oC 10V tTLH 40 15V tTLH 30 10V tTHL 20 RL = 120Ω TO VDD 150 125 SUPPLY VOLTAGE (VDD) = 5V tPLH, tPHL 100 75 10V 10V tPHL 15V tPLH 50 10V TPHL 15V tTHL 25 10 tPLH 15V tPHL 0 0 10 20 30 40 50 60 70 80 90 100 10 LOAD CAPACITANCE (CL) (pF) 20 30 40 50 60 70 80 90 LOAD CAPACITANCE (CL) (pF) FIGURE 4. TYPICAL TRANSITION TIME AS A FUNCTION OF LOAD CAPACITANCE FIGURE 5. TYPICAL PROPAGATION DELAY TIME AS A FUNCTION OF LOAD CAPACITANCE 7-23 100 CD40107BMS Typical Performance Characteristics (Continued) DISSIPATION PER BUFFER (PD) (µW) 105 8 6 AMBIENT TEMPERATURE (TA) = +25oC 4 2 SUPPLY VOLTAGE (VDD) = 15V 104 8 6 4 5V 2 103 8 10V 6 4 2 102 8 6 4 CL = 50pF CL = 15pF 2 101 100 2 4 68 2 4 68 2 4 68 2 4 68 101 102 103 104 INPUT FREQUENCY (fI) (kHz) 2 4 68 105 FIGURE 6. TYPICAL POWER DISSIPATION AS A FUNCTION OF INPUT FREQUENCY Chip Dimensions and Pad Layout NOTE: Numbers inside pads for CD40107BE not offered as standard part. Numbers outside chip are for CD40107BF Dimensions in parenthesis are in millimeters and are derived from the basic inch dimensions as indicated. Grid graduations are in mils (10-3 inch). METALLIZATION: PASSIVATION: BOND PADS: Thickness: 11kÅ − 14kÅ, AL. 10.4kÅ - 15.6kÅ, Silane 0.004 inches X 0.004 inches MIN DIE THICKNESS: 0.0198 inches - 0.0218 inches Special Considerations Limiting Capacitive Currents for CL > 500pF, VDD > 15V Driving Inductive Loads For VDD > 15V, and load capacitance (CL) from output to ground > 500pF, an external 25Ω series limiting resistor should be inserted between the output terminal and CL. No external resistor is necessary if CL < 500pF or VDD < 15V. When using the CD40107BMS to drive inductive loads, the load should be shunted with a diode to prevent high voltages from developing across the CD40107BMS output. All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. 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