CD4085BMS CMOS Dual 2 Wide 2 Input AND-OR-INVERT Gate December 1992 Features Pinout • High Voltage Type (20V Rating) CD4085BMS TOP VIEW • Medium Speed Operation - tPHL = 90ns - tPLH = 125ns (Typ.) at 10V A1 1 14 VDD • Individual Inhibit Controls B1 2 13 D1 • 5V, 10V and 15V Parametric Ratings E1 = INHI + A1B1 + C1D1 3 12 C1 • Standardized Symmetrical Output Characteristics E2 = INH2 + A2B2 + C2D2 4 11 INHIBIT 2 A2 5 10 INHIBIT 1 B2 6 9 D2 VSS 7 8 C2 • 100% Tested for Quiescent Current at 20V • Maximum Input Current of 1µA at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC • Noise Margin (Over Full Package/Temperature Range) - 1V at VDD = 5V - 2V at VDD = 10V - 2.5V at VDD = 15V • Meets All Requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of ‘B’ Series CMOS Devices” Functional Diagram INHIBIT 1 10 Description 1 A1 2 B1 CD4085BMS contains a pair of AND-OR-INVERT gates, each consisting of two 2 input AND gates driving a 3 input NOR gate. Individual inhibit controls are provided for both A-O-I gates.. 12 C1 13 D1 The CD4085BMS is supplied in these 14 lead outline packages: Braze Seal DIP INHIBIT 2 H4H Frit Seal DIP H1B Ceramic Flatpack H5W 3 E1 11 5 A2 6 B2 8 C2 9 D2 4 E2 E = INHIBIT + AB + CD LOGIC 1 = HIGH LOGIC 0 = LOW VDD = 14 VSS = 7 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999 7-1046 File Number 3327 Specifications CD4085BMS Absolute Maximum Ratings Reliability Information DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V (Voltage Referenced to VSS Terminals) Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA Operating Temperature Range . . . . . . . . . . . . . . . . -55oC to +125oC Package Types D, F, K, H Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for 10s Maximum Thermal Resistance . . . . . . . . . . . . . . . . θja θjc Ceramic DIP and FRIT Package . . . . . 80oC/W 20oC/W Flatpack Package . . . . . . . . . . . . . . . . 70oC/W 20oC/W o Maximum Package Power Dissipation (PD) at +125 C For TA = -55oC to +100oC (Package Type D, F, K) . . . . . . 500mW For TA = +100oC to +125oC (Package Type D, F, K) . . . . . Derate Linearity at 12mW/oC to 200mW Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW For TA = Full Package Temperature Range (All Package Types) Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER Supply Current SYMBOL IDD CONDITIONS (NOTE 1) VDD = 20V, VIN = VDD or GND VDD = 18V, VIN = VDD or GND Input Leakage Current IIL VIN = VDD or GND VDD = 20 VDD = 18V Input Leakage Current IIH VIN = VDD or GND VDD = 20 GROUP A SUBGROUPS LIMITS TEMPERATURE MIN +25 - 2 µA +125oC - 200 µA 3 -55oC - 2 µA 1 +25o C -100 - nA 2 +125oC -1000 - nA 3 -55oC -100 - nA 1 +25oC - 100 nA 2 +125oC - 1000 nA - 100 nA - 50 mV - V 3 Output Voltage VOL15 VDD = 15V, No Load 1, 2, 3 +25oC, +125oC, -55oC Output Voltage VOH15 VDD = 15V, No Load (Note 3) 1, 2, 3 +25oC, +125oC, -55oC 14.95 Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V UNITS 1 -55oC VDD = 18V MAX 2 oC 1 +25oC 0.53 - mA Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1 +25oC 1.4 - mA Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1 +25oC 3.5 - mA 1 +25oC - -0.53 mA 1 +25oC - -1.8 mA Output Current (Source) Output Current (Source) IOH5A IOH5B VDD = 5V, VOUT = 4.6V VDD = 5V, VOUT = 2.5V Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1 +25oC - -1.4 mA Output Current (Source) IOH15 VDD = 15V, VOUT = 13.5V 1 +25oC - -3.5 mA 1 +25oC -2.8 -0.7 V 1 +25oC 0.7 2.8 V N Threshold Voltage P Threshold Voltage Functional VNTH VPTH F VDD = 10V, ISS = -10µA VSS = 0V, IDD = 10µA VDD = 2.8V, VIN = VDD or GND 7 +25oC VDD = 20V, VIN = VDD or GND 7 +25oC VDD = 18V, VIN = VDD or GND 8A +125oC VDD = 3V, VIN = VDD or GND 8B -55oC VOH > VOL < VDD/2 VDD/2 V Input Voltage Low (Note 2) VIL VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC - 1.5 V Input Voltage High (Note 2) VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC 3.5 - V Input Voltage Low (Note 2) VIL VDD = 15V, VOH > 13.5V, VOL < 1.5V 1, 2, 3 +25oC, +125oC, -55oC - 4 V Input Voltage High (Note 2) VIH VDD = 15V, VOH > 13.5V, VOL < 1.5V 1, 2, 3 +25oC, +125oC, -55oC 11 - V NOTES: 1. All voltages referenced to device GND, 100% testing being implemented. 2. Go/No Go test with limits applied to inputs. 7-1047 3. For accuracy, voltage is measured differentially to VDD. Limit is 0.050V max. Specifications CD4085BMS TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER Propagation Delay Data SYMBOL TPHL1 TPLH1 Propagation Delay Inhibit TPHL2 Transition Time VDD = 5V, VIN = VDD or GND 9 10, 11 Propagation Delay Data Propagation Delay Inhibit CONDITIONS (NOTES 1, 2) GROUP A SUBGROUPS TEMPERATURE VDD = 5V, VIN = VDD or GND 9 10, 11 VDD = 5V, VIN = VDD or GND 9 10, 11 TPLH2 VDD = 5V, VIN = VDD or GND 9 10, 11 TTHL TTLH VDD = 5V, VIN = VDD or GND 9 10, 11 +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC LIMITS MIN MAX UNITS - 450 ns - 608 ns - 620 ns - 837 ns - 300 ns - 405 ns - 500 ns - 675 ns - 200 ns - 270 ns NOTES: 1. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 2. -55oC and +125oC limits guaranteed, 100% testing being implemented. TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current SYMBOL IDD CONDITIONS NOTES VDD = 5V, VIN = VDD or GND VDD = 10V, VIN = VDD or GND VDD = 15V, VIN = VDD or GND 1, 2 1, 2 1, 2 TEMPERATURE -55oC, +25oC MIN MAX UNITS µA - 1 +125oC - 30 µA -55oC, +25oC - 2 µA +125oC - 60 µA µA -55oC, +25oC - 2 +125oC - 120 µA Output Voltage VOL VDD = 5V, No Load 1, 2 +25oC, +125oC, -55oC - 50 mV Output Voltage VOL VDD = 10V, No Load 1, 2 +25oC, +125oC, -55oC - 50 mV Output Voltage VOH VDD = 5V, No Load 1, 2 +25oC, +125oC, -55oC 4.95 - V Output Voltage VOH VDD = 10V, No Load 1, 2 +25oC, +125oC, -55oC 9.95 - V Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V 1, 2 +125oC 0.36 - mA -55oC 0.64 - mA +125oC 0.9 - mA -55oC 1.6 - mA +125oC 2.4 - mA -55oC 4.2 - mA +125oC - -0.36 mA -55oC - -0.64 mA +125oC - -1.15 mA -55oC - -2.0 mA +125oC - -0.9 mA -55oC - -2.6 mA Output Current (Sink) Output Current (Sink) Output Current (Source) Output Current (Source) Output Current (Source) IOL10 IOL15 IOH5A IOH5B IOH10 VDD = 10V, VOUT = 0.5V VDD = 15V, VOUT = 1.5V VDD = 5V, VOUT = 4.6V 1, 2 1, 2 1, 2 VDD = 5V, VOUT = 2.5V 1, 2 VDD = 10V, VOUT = 9.5V 7-1048 1, 2 Specifications CD4085BMS TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) LIMITS PARAMETER SYMBOL Output Current (Source) IOH15 Input Voltage Low CONDITIONS VDD =15V, VOUT = 13.5V VIL VDD = 10V, VOH > 9V, VOL < 1V NOTES TEMPERATURE MIN MAX UNITS 1, 2 +125oC - -2.4 mA -55oC - -4.2 mA +25oC, +125oC, - 3 V 1, 2 -55oC Input Voltage High Propagation Delay Data VIH VDD = 10V, VOH > 9V, VOL < 1V TPHL1 VDD = 10V VDD = 15V Propagation Delay Data Propagation Delay Inhibit Propagation Delay Inhibit Transition Time Input Capacitance TPLH1 V 1, 2, 3 +25oC - 180 ns o - 130 ns o - 250 ns o +25 C +25 C 1, 2, 3 +25 C - 180 ns VDD = 10V 1, 2, 3 +25oC - 120 ns o - 80 ns o 1, 2, 3 +25 C 1, 2, 3 +25 C - 200 ns VDD = 15V 1, 2, 3 +25oC - 140 ns VDD = 10V 1, 2, 3 +25oC - 100 ns 1, 2, 3 +25oC - 80 ns 1, 2 +25oC - 7.5 pF VDD = 15V CIN - VDD = 15V VDD = 10V TTHL TTLH +7 1, 2, 3 VDD = 15V TPLH2 +25oC, +125oC, -55oC 1, 2, 3 VDD = 10V TPHL2 1, 2 Any Input NOTES: 1. All voltages referenced to device GND. 2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial design release and upon design changes which would affect these characteristics. 3. CL = 50pF, RL = 200K, Input TR, TF < 20ns. TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current SYMBOL IDD CONDITIONS NOTES TEMPERATURE VDD = 20V, VIN = VDD or GND 1, 4 +25oC VDD = 10V, ISS = -10µA 1, 4 +25oC VDD = 10V, ISS = -10µA 1, 4 +25oC MIN MAX UNITS - 7.5 µA -2.8 -0.2 V - ±1 V N Threshold Voltage VNTH N Threshold Voltage Delta ∆VTN P Threshold Voltage VTP VSS = 0V, IDD = 10µA 1, 4 +25oC 0.2 2.8 V P Threshold Voltage Delta ∆VTP VSS = 0V, IDD = 10µA 1, 4 +25oC - ±1 V 1 +25oC VOH > VDD/2 VOL < VDD/2 V 1, 2, 3, 4 +25oC - 1.35 x +25oC Limit ns Functional F VDD = 18V, VIN = VDD or GND VDD = 3V, VIN = VDD or GND Propagation Delay Time TPHL TPLH VDD = 5V 3. See Table 2 for +25oC limit. NOTES: 1. All voltages referenced to device GND. 2. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 4. Read and Record TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25OC PARAMETER SYMBOL DELTA LIMIT Supply Current - MSI-1 IDD ± 0.2µA Output Current (Sink) IOL5 ± 20% x Pre-Test Reading 7-1049 Specifications CD4085BMS TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25OC PARAMETER Output Current (Source) SYMBOL DELTA LIMIT ± 20% x Pre-Test Reading IOH5A TABLE 6. APPLICABLE SUBGROUPS MIL-STD-883 METHOD GROUP A SUBGROUPS Initial Test (Pre Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A Interim Test 1 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A Interim Test 2 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A 100% 5004 1, 7, 9, Deltas CONFORMANCE GROUP PDA (Note 1) Interim Test 3 (Post Burn-In) 100% 5004 1, 7, 9 100% 5004 1, 7, 9, Deltas 100% 5004 2, 3, 8A, 8B, 10, 11 Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11 Subgroup B-5 Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas Subgroup B-6 Sample 5005 1, 7, 9 Sample 5005 1, 2, 3, 8A, 8B, 9 PDA (Note 1) Final Test Group A Group B Group D READ AND RECORD IDD, IOL5, IOH5A Subgroups 1, 2, 3, 9, 10, 11 Subgroups 1, 2 3 NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2. TABLE 7. TOTAL DOSE IRRADIATION CONFORMANCE GROUPS Group E Subgroup 2 TEST READ AND RECORD MIL-STD-883 METHOD PRE-IRRAD POST-IRRAD PRE-IRRAD POST-IRRAD 5005 1, 7, 9 Table 4 1, 9 Table 4 TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS OSCILLATOR FUNCTION OPEN GROUND VDD Static Burn-In 1 Note 1 3, 4 1, 2, 5-13 14 Static Burn-In 2 Note 1 3, 4 7 1, 2, 5, 6, 8-14 Dynamic BurnIn Note 1 - 7 14 3, 4 7 1, 2, 5, 6, 8-14 Irradiation Note 2 9V ± -0.5V 50kHz 25kHz 3, 4 1, 2, 5, 6, 8, 9, 12, 13 10, 11 NOTE: 1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V 2. Each pin except VDD and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures, VDD = 10V ± 0.5V 7-1050 CD4085BMS Schematic INHIBIT 1 10 * VDD p p VDD n A1 1 * p p p n B1 2 * p VDD n VSS p n p p n 3 E1 4 E2 n n C1 12 p n n p p VSS * n D1 13 * VSS VDD p p VDD n A2 5 * p p p n B1 6 * p VDD VSS n n p p n n n n C2 8 TERM. 14 = VDD TERM. 7 = VSS * VSS n VDD n D2 9 * INHIBIT 2 11 * * VSS ALL INPUTS PROTECTED BY CMOS PROTECTION NETWORK FIGURE 1. CD408B SCHEMATIC DIAGRAM 7-1051 VSS CD4085BMS Typical Performance Characteristics 17.5 AMBIENT TEMPERATURE (TA) = +25oC CURRENT PEAK VDD VDD 5 14 10V 10 VO 4 VI 7 VSS CURRENT PEAK 5V 5 3 ID 2 MAX MIN 1 12.5 0 VDD VDD 10 14 7.5 VO VI 5 7 VSS 2.5 0 0 5 10 15 INPUT VOLTAGE (VI) - V 0 FIGURE 2. TYPICAL VOLTAGE AND CURRENT TRANSFER CHARACTERISTICS 2.5 5 300 104 SUPPLY VOLTAGE (VDD) = 15V 10V 10V 102 5V 101 20 22.5 AMBIENT TEMPERATURE (TA) = +25oC AMBIENT TEMPERATURE (TA) = +25oC 103 7.5 10 12.5 15 17.5 INPUT VOLTAGE (VI) - V FIGURE 3. MINIMUM AND MAXIMUM VOLTAGE TRANSFER CHARACTERISTICS HIGH-TO-LOW LEVEL PROPAGATION DELAY TIME (tPHL) (ns) 105 POWER DISSIPATION (PD) (µW) AMBIENT TEMPERATURE (TA) = +25oC 15 6 OUTPUT VOLTAGE (VO) - V OUTPUT VOLTAGE (VO) - V 15 DRAINCURRENT (ID) - mA SUPPLY VOLTAGE (VDD) = 15V CL = 50pF CL = 15pF 250 SUPPLY VOLTAGE (VDD) = 5V 200 150 10V 100 15V 50 100 10-1 100 101 102 103 104 0 FREQUENCY (f) (kHz) FIGURE 4. TYPICAL POWER DISSIPATION vs FREQUENCY FIGURE 5. TYPICAL DATA HIGH-TO-LOW LEVEL PROPAGATION DELAY TIME vs LOAD CAPACITANCE PROPAGATION DELAY TIME (tPHL, tPLH) (ns) LOW-TO-HIGH LEVEL PROPAGATION DELAY TIME (tPLH) (ns) AMBIENT TEMPERATURE (TA) = +25oC 400 SUPPLY VOLTAGE (VDD) = 5V 350 300 250 200 150 10V 100 15V 50 0 AMBIENT TEMPERATURE (TA) = +25oC LOAD CAPACITANCE (CL) = 50pF 1250 1000 750 tPLH 500 250 tPHL 0 20 40 60 80 100 LOAD CAPACITANCE (CL) (pF) FIGURE 6. TYPICAL DATA LOW-TO-HIGH PROPAGATION DELAY TIME vs LOAD CAPACITANCE 20 40 60 80 100 LOAD CAPACITANCE (CL) (pF) 2.5 5 7.5 10 12.5 15 17.5 20 SUPPLY VOLTAGE (VDD) (V) FIGURE 7. TYPICAL DATA PROPAGATION DELAY TIME vs SUPPLY VOLTAGE 7-1052 CD4085BMS (Continued) AMBIENT TEMPERATURE (TA) = +25oC GATE-TO-SOURCE VOLTAGE (VGS) = 15V 25 20 15 10V 10 5 5V 0 5 10 15 DRAIN-TO-SOURCE VOLTAGE (VDS) (V) AMBIENT TEMPERATURE (TA) = +25oC 15.0 GATE-TO-SOURCE VOLTAGE (VGS) = 15V 12.5 10.0 10V 7.5 5.0 2.5 5V 0 FIGURE 8. TYPICAL OUTPUT LOW (SINK) CURRENT CHARACTERISTICS FIGURE 9. MINIMUM OUTPUT LOW (SINK) CURRENT CHARACTERISTICS DRAIN-TO-SOURCE VOLTAGE (VDS) (V) -15 -10 -5 AMBIENT TEMPERATURE (TA) = +25oC AMBIENT TEMPERATURE (TA) = +25oC GATE-TO-SOURCE VOLTAGE (VGS) = -5V 200 150 0 0 -5 -10 SUPPLY VOLTAGE (VDD) = 5V -15 -10V -20 100 10V 50 0 0 -25 15V 20 -15V -30 40 60 80 100 LOAD CAPACITANCE (CL) (pF) FIGURE 10. TYPICAL TRANSITION TIME vs LOAD CAPACITANCE FIGURE 11. TYPICAL OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS DRAIN-TO-SOURCE VOLTAGE (VDS) (V) -15 -10 -5 AMBIENT TEMPERATURE (TA) = +25oC 0 0 GATE-TO-SOURCE VOLTAGE (VGS) = -5V -5 -10V -15V -10 -15 OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA) TRANSITION TIME (tTHL, tTLH) (ns) 5 10 15 DRAIN-TO-SOURCE VOLTAGE (VDS) (V) FIGURE 12. MINIMUM OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS 7-1053 OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA) 30 OUTPUT LOW (SINK) CURRENT (IOL) (mA) OUTPUT LOW (SINK) CURRENT (IOL) (mA) Typical Performance Characteristics CD4085BMS Chip Dimensions and Pad Layout Dimensions in parenthesis are in millimeters and are derived from the basic inch dimensions as indicated. Grid graduations are in mils (10-3 inch). METALLIZATION: PASSIVATION: Thickness: 11kÅ − 14kÅ, AL. 10.4kÅ - 15.6kÅ, Silane BOND PADS: 0.004 inches X 0.004 inches MIN DIE THICKNESS: 0.0198 inches - 0.0218 inches All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (321) 724-7000 FAX: (321) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 1054 ASIA Intersil (Taiwan) Ltd. Taiwan Limited 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029