Data Sheet

VTM Current Multiplier
VTM48 E x120 y 025A0R
S
C
NRTL
US
High Efficiency, Bi-directional, Sine Amplitude Converter™
FEATURES
• 48 Vdc to 12 Vdc 25 A bi-directional current multiplier
• Can power a load connected to either the primary or
secondary side
• High efficiency (>96%) reduces system power
consumption
• High density (85 A/in3)
• “Full Chip” VI Chip® package enables surface mount,
low impedance interconnect to system board
• Contains built-in protection features against:
-
Overvoltage Lockout
Overcurrent
Short Circuit
Overtemperature
• Provides enable / disable control,
internal temperature monitoring
• ZVS / ZCS resonant Sine Amplitude Converter topology
• Less than 50ºC temperature rise at full load
in typical applications
TYPICAL APPLICATIONS
• High End Computing Systems
• Automated Test Equipment
• High Density Power Supplies
• Communications Systems
VPRI = 26 to 55 V
ISEC = 25 A (NOM)
VSEC = 6.5 to 13.8 V (NO LOAD)
K = 1/4
PART NUMBERING
TYPICAL APPLICATION
+IN
Enable
DESCRIPTION
The VI Chip® bi-directional current multiplier is a Sine Amplitude
Converter™ (SAC™) operating from a 26 to 55 Vdc primary
source or a 6.5 to 13.8 Vdc secondary source to power a load.
The bi-directional Sine Amplitude Converter isolates and
transforms voltage at a secondary:primary ratio of 1/4. The SAC
offers a low AC impedance beyond the bandwidth of most
downstream regulators; therefore for a step-down conversion;
capacitance normally at the load can be located at the source to
the Sine Amplitude Converter to enable a reduction in size of
capacitors. Since the K factor of the VTM48EF120T025A0R is
1/4, the capacitance value on the primary side can be reduced
by a factor of 16 in an application where the source is located
on the primary side, resulting in savings of board area, materials
and total system cost.
The VTM48EF120T025A0R is provided in a VI Chip package
compatible with standard pick-and-place and surface mount
assembly processes. The co-molded VI Chip package provides
enhanced thermal management due to a large thermal
interface area and superior thermal conductivity. The high
conversion efficiency of the VTM48EF120T025A0R increases
overall system efficiency and lowers operating costs compared
to conventional approaches.
The VTM48EF120T025A0R enables the utilization of Factorized
Power Architecture™ which provides efficiency and size
benefits by lowering conversion and distribution losses and
promoting high density point of load conversion.
PART NUMBER
VTM48 E x 120 y 025A0R
+OUT
PACKAGE STYLE
F = J-Lead
T = Through hole
PRODUCT GRADE
T = -40 to 125°C
M = -55 to 125°C
PRM A
For Storage and Operating Temperatures see Section 6.0 General Characteristics
-IN
-OUT
+PRI
+SEC
VTM®
+IN
Enable
+OUT
-PRI
Battery
-SEC
PRM B
-OUT
-IN
VTM® Current Multiplier
Rev 1.2
vicorpower.com
Page 1 of 19
07/2015
800 927.9474
VTM48 E x120 y 025A0R
1.0 ABSOLUTE MAXIMUM VOLTAGE RATINGS
The absolute maximum ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause permanent
damage to the device.
MIN
MAX
UNIT
MIN
MAX
UNIT
+ PRI to - PRI . . . . . . . . . . . . . . . . . . . . .
-1.0
60
VDC
VC to - PRI . . . . . . . . . . . . . . . . . . . . . . .
PC to - PRI . . . . . . . . . . . . . . . . . . . . . . .
-0.3
20
VDC
+ PRI / - PRI to + SEC / - SEC (hipot) . . .
TM to -PRI . . . . . . . . . . . . . . . . . . . . . . .
-0.3
7
VDC
+ SEC to - SEC .........................................
-0.3
-1.0
20
VDC
2250
VDC
16
VDC
2.0 PRIMARY SOURCE ELECTRICAL CHARACTERISTICS
Specifications apply over all line and load conditions when power is sourced from the primary side, unless otherwise noted; Boldface
specifications apply over the temperature range of -40°C < TJ < 125°C (T-Grade); All other specifications are at TJ = 25ºC unless
otherwise noted.
ATTRIBUTE
Primary voltage range
VPRI slew rate
VPRI UV turn off
SYMBOL
VPRI
VPRI_UV
PNL
Inrush current peak
IINRP
Efficiency (ambient)
Efficiency (hot)
Efficiency (over load range)
Secondary resistance (cold)
Secondary resistance (ambient)
Secondary resistance (hot)
Switching frequency
Secondary ripple frequency
IPRI_DC
K
VSEC
ISEC_AVG
ISEC_PK
POUT_AVG
hAMB
hHOT
h20%
RSEC_COLD
RSEC_AMB
RSEC_HOT
FSW
FSW_RP
Secondary voltage ripple
VSEC_PP
Secondary inductance (parasitic)
LSEC_PAR
Secondary capacitance (internal)
CSEC_INT
Secondary capacitance (external)
CSEC_EXT
PROTECTION
Primary Overvoltage lockout
Primary Overvoltage lockout
response time constant
Secondary overcurrent trip
Secondary Short circuit protection
trip current
Secondary overcurrent
response time constant
Secondary Short circuit protection
response time
Thermal shutdown setpoint
MIN
TYP
26
0
dVPRI/dt
No Load power dissipation
DC primary current
Transfer ratio
Secondary voltage
Secondary current (average)
Secondary current (peak)
Secondary power (average)
CONDITIONS / NOTES
No external VC applied
VC applied
Module latched shutdown,
No external VC applied, IOUT = 25A
VPRI = 48 V
VPRI = 26 V to 55 V
VPRI = 48 V, TC = 25ºC
VPRI = 26 V to 55 V, TC = 25ºC
VC enable, VPRI = 48 V, CSEC = 1000 µF,
RLOAD = 471 mΩ
24
3
5.3
10
K = VSEC/ VPRI, ISEC = 0 A
VSEC = VPRI • K - ISEC • RSEC, Section 11
TPEAK < 10 ms, ISEC_AVG ≤ 25 A
ISEC_AVG ≤ 25 A
VPRI = 48 V, ISEC = 25 A
VPRI = 26 V to 55 V, ISEC = 25 A
VPRI = 48 V, ISEC = 12.5 A
VPRI = 48 V, TC = 100°C, ISEC = 25 A
5 A < ISEC < 25 A
TC = -40°C, ISEC = 25 A
TC = 25°C, ISEC = 25 A
TC = 100°C, ISEC = 25 A
Module latched shutdown
TOVLO
Effective internal RC filter
55.1
26
ISCP_SEC
26
Effective internal RC filter (Integrative).
TSCP_SEC
From detection to cessation
of switching (Instantaneous)
TJ_OTP
125
VTM® Current Multiplier
Rev 1.2
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800 927.9474
26
V
15.0
17
6.5
9
W
20
A
7
A
V/V
V
A
A
W
VDC
96.0
%
95.5
95.6
7.5
9.0
11.5
1.95
3.90
12.0
14.0
16.0
2.05
4.10
%
%
mΩ
mΩ
mΩ
MHz
MHz
150
285
mV
600
pH
47
µF
58.5
1000
µF
60.0
V
8
IOCP_SEC
TOCP_SEC
V/µs
25
37.5
300
95.0
93.0
94.5
94.5
80.0
4.9
6.3
8.8
1.85
3.70
UNIT
55
55
1
1/4
CSEC = 0 F, ISEC = 25 A, VPRI = 48 V,
20 MHz BW, Section 12
Frequency up to 30 MHz,
Simulated J-lead model
Effective Value at 12 VSEC
VTM Standalone Operation.
VPRI pre-applied, VC enable
VPRI_OVLO+
MAX
39
µs
55
A
A
5.3
ms
1
µs
130
135
ºC
VTM48 E x120 y 025A0R
2.1 SECONDARY SOURCE ELECTRICAL CHARACTERISTICS
Specifications apply over all line and load conditions when power is sourced from the secondary side, unless otherwise noted;
Boldface specifications apply over the temperature range of -40°C < TJ < 125°C (T-Grade); All other specifications are at TJ = 25ºC
unless otherwise noted.
ATTRIBUTE
Secondary voltage range
VSEC slew rate
VSEC UV turn off
SYMBOL
VSEC
MIN
TYP
6.5
0
dVSEC/dt
VSEC_UV
No Load power dissipation
PNL_SEC
Inrush current peak
INR_SEC_P
DC secondary current
Primary voltage
Primary current (average)
Primary current (peak)
Primary power (average)
ISEC_DC
VPRI
IPRI_AVG
IPRI_PK
PPRI_AVG
Efficiency (ambient)
hAMB
Efficiency (hot)
Efficiency (over load range)
Primary resistance (cold)
Primary resistance (ambient)
Primary resistance (hot)
Primary voltage ripple
hHOT
h20%
RPRI_COLD
RPRI_AMB
RPRI_HOT
VPRI_PP
Primary capacitance (external)
CPRI_EXT
PROTECTION
Secondary OVLO
Secondary Overvoltage lockout
response time constant
Primary overcurrent trip
Primary Short circuit protection
trip current
Primary overcurrent
response time constant
Primary Short circuit protection
response time
CONDITIONS / NOTES
No external VC applied
VC applied
Module latched shutdown,
No external VC applied, IPRI = 6.3 A
VSEC = 12 V
VSEC = 6.5 V to 13.75 V
VSEC = 12 V, TC = 25ºC
VSEC = 6.5 V to 13.75 V, TC = 25ºC
VC enable, VSEC = 12 V, CPRI = 63 µF,
RLOAD = 7 Ω
6.0
3
5.3
40
MAX
V/µs
6.5
V
15.0
17.0
6.5
9.0
W
80
A
28.0
A
V
A
A
W
VPRI = VSEC/K - IPRI • RPRI, Section 11
TPEAK < 10 ms, IPRI_AVG ≤ 6.3 A
IPRI_AVG ≤ 6.3 A
VSEC = 12 V, IPRI = 6.3 A
VSEC = 6.5 V to 13.75 V, IPRI = 6.3 A
VSEC = 12 V, IPRI = 3.1 A
VSEC = 12 V, TC = 100°C, IPRI = 6.3 A
1.3 A < IPRI < 6.3 A
TC = -40°C, IPRI = 6.3 A
TC = 25°C, IPRI = 6.3 A
TC = 100°C, IPRI = 6.3 A
CPRI = 0 F, IPRI = 6.3 A, VSEC = 12 V, 6.5 MHz BW
VTM Standalone Operation. VSEC pre-applied,
VC enable
VSEC_OVLO+
Module latched shutdown
TOVLO_SEC
Effective internal RC filter
6.3
9.4
300
95
93
94.5
94.5
80.0
145
165
200
14.5
7
ISCP_PRI
7
Effective internal RC filter (Integrative).
TSCP_PRI
From detection to cessation
of switching (Instantaneous)
VTM® Current Multiplier
Rev 1.2
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95.5
95.6
14.8
9
VDC
%
185
225
275
650
%
%
mΩ
mΩ
mΩ
mV
63
µF
15.0
V
8
IOCP_PRI
TOCP_PRI
96.0
165
195
238
UNIT
13.75
13.75
1
µs
14
A
A
5.3
ms
1
µs
VTM48 E x120 y 025A0R
3.0 SIGNAL CHARACTERISTICS
Specifications apply over all line and load conditions when power is sourced from the primary side, unless otherwise noted; Boldface
specifications apply over the temperature range of -40°C < TJ < 125°C (T-Grade); All other specifications are at TJ = 25ºC unless
otherwise noted.
VTM CONTROL : VC
• Referenced to -PRI.
• VC slew rate must be within range for a succesful start.
• Used to wake up powertrain circuit.
• PRM® VC can be used as valid wake-up signal source.
• A minimum of 11.5 V must be applied indefinitely for VPRI < 26 V
• Internal Resistance used in “Adaptive Loop” compensation.
to ensure normal operation.
• VC voltage may be continuously applied.
SIGNAL TYPE
STATE
ATTRIBUTE
External VC voltage
VC current draw
SYMBOL
VVC_EXT
IVC
Steady
ANALOG
INPUT
•
•
Required for start up, and operation
below 26 V. See Section 7.
VC = 11.5 V, VPRI = 0 V
VC = 11.5 V, VPRI > 26 V
VC = 16.5 V, VPRI > 26 V
Fault mode. VC > 11.5 V
MIN
TYP
11.5
16.5
130
25
115
60
100
0.511
DVC_INT
RVC-INT
MAX UNIT
TVC_COEFF
SIGNAL TYPE
ANALOG
OUTPUT
STATE
Steady
Start Up
Enable
DIGITAL
INPUT / OUPUT
Disable
Transitional
ATTRIBUTE
PC voltage
PC source current
PC resistance (internal)
PC source current
PC capacitance (internal)
PC resistance (external)
PC voltage
PC voltage (disable)
PC pull down current
PC disable time
PC fault response time
mA
V
kΩ
900 ppm/°C
VVC_SP
dVC/dt
IINR_VC
SYMBOL
VPC
IPC_OP
RPC_INT
IPC_EN
CPC_INT
RPC_S
VPC_EN
VPC_DIS
IPC_PD
TPC_DIS_T
TFR_PC
V
150
Tpeak <18 ms
20
Required for proper start up;
0.02
0.25
VC = 16.5 V, dVC/dt = 0.25 V/µs
1
VPRI pre-applied, PC floating,
VC to VSEC turn-on delay
TON
500
VC enable, CPC = 0 µF
Transitional
VC
= 11.5 V to PC high, VPRI = 0 V,
VC to PC delay
Tvc_pc
75
125
dVC/dt = 0.25 V/µs
VC = 0 V
3.2
Internal VC capacitance
CVC_INT
PRIMARY CONTROL : PC
Referenced to -PRI.
• Module will shutdown when pulled low with an impedance
less than 400 Ω.
The PC pin enables and disables the VTM.
When held below 2 V, the VTM will be disabled.
• In an array of VTMs, connect PC pin to synchronize start up.
PC pin outputs 5 V during normal operation. PC pin is equal to 2.5 V
• PC pin cannot sink current and will not disable other modules
during fault mode given VPRI > 26 V or VC > 11.5 V.
during fault mode.
After successful start up and under no fault condition, PC can be used as
a 5 V regulated voltage source with a 2 mA maximum current.
Start Up
•
•
VC internal diode rating
VC internal resistor
VC internal resistor
temperature coefficient
VC start up pulse
VC slew rate
VC inrush current
CONDITIONS / NOTES
CONDITIONS / NOTES
Internal pull down resistor
Rev 1.2
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µs
µF
TYP
MAX UNIT
4.7
5.0
50
50
150
100
5.3
2
400
300
1000
60
2
2.5
5.1
VTM® Current Multiplier
µs
MIN
Section 7
From fault to PC = 2 V
V
V/µs
A
5
100
3
2
V
mA
kΩ
µA
pF
kΩ
V
V
mA
µs
µs
VTM48 E x120 y 025A0R
TEMPERATURE MONITOR : TM
• Referenced to -PRI.
• The TM pin has a room temperature setpoint of 3 V
• The TM pin monitors the internal temperature of the VTM controller IC
and approximate gain of 10 mV/°C.
within an accuracy of ±5°C.
• Output drives Temperature Shutdown comparator.
• Can be used as a "Power Good" flag to verify that the VTM is operating.
SIGNAL TYPE
STATE
ANALOG
OUTPUT
ATTRIBUTE
TM voltage
TM source current
TM gain
Steady
Disable
DIGITAL OUTPUT
(FAULT FLAG)
Transitional
SYMBOL
VTM_AMB
ITM
ATM
TM voltage ripple
VTM_PP
TM voltage
TM resistance (internal)
TM capacitance (external)
TM fault response time
VTM_DIS
RTM_INT
CTM_EXT
TFR_TM
CONDITIONS / NOTES
TJ controller = 27°C
MIN
TYP
MAX UNIT
2.95
3.00
3.05
100
V
µA
mV/°C
200
mV
50
50
V
kΩ
pF
µs
10
CTM = 0 F, VPRI = 48 V,
ISEC = 25 A
120
Internal pull down resistor
25
From fault to TM = 1.5 V
0
40
10
4.0 TIMING DIAGRAM (Power sourced from the primary side)
ISEC
6
7
ISEC
ISEC
1
2 3
VC
4
8
d
5
b
VVC-EXT
a
VOVLO
VPRI
NL
≥ 26 V
c
e
f
VSEC
TM
VTM-AMB
PC
g
5V
3V
a: VC slew rate (dVC/dt)
b: Minimum VC pulse rate
c: TOVLO_PIN
d: TOCP_SEC
e: Secondary turn on delay (TON)
f: PC disable time (TPC_DIS_T)
g: VC to PC delay (TVC_PC)
1. Initiated VC pulse
2. Controller start
3. VPRI ramp up
4. VPRI = VOVLO
5. VPRI ramp down no VC pulse
6. Overcurrent, Secondary
7. Start up on short circuit
8. PC driven low
Notes:
– Timing and voltage is not to scale
– Error pulse width is load dependent
VTM® Current Multiplier
Rev 1.2
vicorpower.com
Page 5 of 19
07/2015
800 927.9474
VTM48 E x120 y 025A0R
5.0 APPLICATION CHARACTERISTICS
The following values, typical of an application environment, are collected at TC = 25ºC with power sourced from the primary side
unless otherwise noted. See associated figures for general trend data.
ATTRIBUTE
SYMBOL
No load power dissipation
Efficiency (ambient)
Efficiency (hot)
Secondary resistance (cold)
Secondary resistance (ambient)
Secondary resistance (hot)
PNL
hAMB
hHOT
RSEC_COLD
RSEC_AMB
RSEC_HOT
Secondary voltage ripple
VSEC_PP
VOUT transient (positive)
VSEC_TRAN+
VOUT transient (negative)
VSEC_TRAN-
CONDITIONS / NOTES
TYP
UNIT
VPRI = 48 V, PC enabled
VPRI = 48 V, ISEC = 25 A
VPRI = 48 V, ISEC = 25 A, TC = 100ºC
VPRI = 48 V, ISEC = 25 A, TC = -40ºC
VPRI = 48 V, ISEC = 25 A
VPRI = 48 V, ISEC = 25 A, TC = 100ºC
CSEC = 0 F, ISEC = 25 A, VPRI = 48 V,
20 MHz BW, Section 12
ISEC_STEP = 0 A TO 25 A, VPRI = 48 V,
ISLEW = 17 A /us
ISEC_STEP = 25 A to 0 A, VPRI = 48 V
ISLEW = 212 A /us
5.1
96.1
95.6
7.3
9.3
11.6
W
%
%
mΩ
mΩ
mΩ
198
mV
650
mV
310
mV
Full Load Efficiency vs. Case Temperature
100
Full Load Efficiency (%)
9
7
5
3
98
96
94
92
90
1
26
29
32
35
38
41
43
46
49
52
-40
55
-20
-40°C
TCASE:
25°C
100°C
V PRI:
Efficiency & Power Dissipation -40°C Case
100
96
45
96
Efficiency (%)
35
84
30
80
25
76
20
PD
15
68
10
64
5
60
0.0
0
2.5
5.0
7.5
26 V
48 V
10.0 12.5 15.0 17.5 20.0 22.5 25.0
55 V
60
80
100
26 V
48 V
55 V
32
28
η
24
88
20
84
16
80
12
PD
76
8
4
72
68
0.0
0
2.5
5.0
7.5
10.0 12.5 15.0 17.5 20.0 22.5 25.0
Secondary Load Current (A)
Secondary Load Current (A)
VPRI:
26 V
92
Efficiency (%)
η
40
Power Dissipation (W)
50
72
40
Efficiency & Power Dissipation 25°C Case
100
88
20
Figure 2 — Full secondary load efficiency vs. temperature
Figure 1 — No load power dissipation vs. VPRI
92
0
Case Temperature (°C)
Primary Voltage (V)
48 V
Figure 3 — Efficiency and power dissipation at –40°C
55 V
VPRI:
26 V
48 V
55 V
26 V
48 V
Figure 4 — Efficiency and power dissipation at 25°C
VTM® Current Multiplier
Rev 1.2
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Page 6 of 19
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55 V
Power Dissipation (W)
No Load Power Dissipation (W)
No Load Power Dissipation vs. Line
11
VTM48 E x120 y 025A0R
Efficiency & Power Dissipation 100°C Case
100
24
88
20
84
16
80
12
PD
76
8
72
4
68
0.0
12
RSEC (mΩ)
28
η
92
14
Power Dissipation (W)
96
Efficiency (%)
RSEC vs. TCASE at VPRI = 48 V
32
5.0
7.5
8
6
0
2.5
10
4
-40
10.0 12.5 15.0 17.5 20.0 22.5 25.0
-20
Secondary Load Current (A)
26 V
VPRI:
48 V
55 V
20
40
60
80
100
Case Temperature (°C)
26 V
48 V
55 V
Figure 5 — Efficiency and power dissipation at 100°C
I SEC :
12.5 A
25 A
Figure 6 — RSEC vs. temperature
Secondary Voltage Ripple vs. Load
Safe Operating Area
250
45
Secondary Current (A)
225
Ripple (mV pk-pk)
0
200
175
150
125
100
75
50
0.0
2.5
5.0
7.5
10.0 12.5 15.0 17.5 20.0 22.5 25.0
Secondary Load Current (A)
VPRI:
26 V
48 V
40
35
10 ms Max
30
25
Continuous
20
15
10
5
0
0
2
4
6
8
10
Secondary Voltage (V)
55 V
Figure 7 — VRIPPLE vs. ISEC ; No external CSEC. Board mounted
module, scope setting : 20 MHz analog BW
Figure 8 — Safe operating area
Figure 9 — Full load ripple, 100 µF CPRI ; No external CSEC. Board
mounted module, scope setting : 20 MHz analog BW
Figure 10 — Start up from application of VPRI ;
VC pre-applied CSEC = 1000 µF
VTM® Current Multiplier
Rev 1.2
vicorpower.com
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07/2015
800 927.9474
12
14
16
VTM48 E x120 y 025A0R
Figure 11 — Start up from application of VC;
VPRI pre-applied CSEC = 1000 µF
Figure 12 – 0 A– Full load transient response:
CPRI = 100 µF, no external CSEC
Figure 13 — Full load – 0 A transient response:
CPRI = 100 µF, no external CSEC
VTM® Current Multiplier
Rev 1.2
vicorpower.com
Page 8 of 19
07/2015
800 927.9474
VTM48 E x120 y 025A0R
6.0 GENERAL CHARACTERISTICS
Specifications apply over all line and load conditions with power sourced from primary side unless otherwise noted; Boldface
specifications apply over the temperature range of -40ºC < TJ < 125ºC (T-Grade); All Other specifications are at TJ = 25°C unless
otherwise noted.
ATTRIBUTE
MECHANICAL
Length
Width
Height
Volume
Weight
SYMBOL
L
W
H
Vol
W
CONDITIONS / NOTES
MIN
32.25 / [1.270]
21.75 / [0.856]
6.48 / [0.255]
No heat sink
Nickel
Palladium
Gold
Lead finish
TYP
32.5 / [1.280]
22.0 / [0.866]
6.73 / [0.265]
4.81 / [0.294]
15.0 / [0.53]
MAX
UNIT
32.75 / [1.289]
22.25 / [0.876]
6.98 / [0.275]
mm/[in]
mm/[in]
mm/[in]
cm3/[in3]
g/[oz]
0.51
0.02
0.003
2.03
0.15
0.051
µm
-40
-55
-40
-55
125
125
125
125
°C
°C
°C
°C
THERMAL
Operating temperature
Thermal resistance
VTM48EF120T025A0R (T-Grade)
VTM48EF120M025A0R (M-Grade)
VTM48ET120T025A0R (T-Grade)
VTM48ET120M025A0R (M-Grade)
Isothermal heat sink and
isothermal internal PCB
TJ
fJC
Thermal capacity
ASSEMBLY
Peak compressive force
applied to case (Z-axis)
Storage temperature
TST
ESDHBM
ESDCDM
SOLDERING
Peak temperature during reflow
Peak time above 217°C
Peak heating rate during reflow
Peak cooling rate post reflow
MTBF
Agency approvals / standards
°C/W
5
Ws/°C
6
5.41
125
125
125
125
Supported by J-lead only
ESD withstand
SAFETY
Isolation voltage (hipot)
Isolation capacitance
Isolation resistance
1
VTM48EF120T025A0R (T-Grade)
VTM48EF120M025A0R (M-Grade)
VTM48ET120T025A0R (T-Grade)
VTM48ET120M025A0R ( M-Grade)
Human Body Model,
"JEDEC JESD 22-A114-F"
Charge Device Model,
"JEDEC JESD 22-C101-D"
-40
-65
-40
-65
1000
VDC
400
MSL 4 (Datecode 1528 and later)
VHIPOT
CPRI_SEC
RPRI_SEC
2250
2500
10
Unpowered unit
lbs
lbs / in2
°C
°C
°C
°C
60
1.5
1.5
245
90
3
6
°C
s
°C/s
°C/s
3200
3800
VDC
pF
MΩ
MIL-HDBK-217 Plus Parts Count;
25ºC Ground Benign, Stationary,
6.03
Indoors / Computer Profile
Telcordia Issue 2 - Method I Case 1;
7.94
Ground Benign, Controlled
cTUVus
cURus
"CE Marked for Low Voltage Directive and RoHS Recast Directive, as applicable"
VTM® Current Multiplier
Rev 1.2
vicorpower.com
Page 9 of 19
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MHrs
MHrs
VTM48 E x120 y 025A0R
7.0 USING THE CONTROL SIGNALS VC, PC, TM, IM
The VTM Control (VC) pin is an primary referenced pin which
powers the internal VCC circuitry when within the specified
voltage range of 11.5 V to 16.5 V. This voltage is required for
VTM current multiplier start up and must be applied as long as
the primary is below 26 V. In order to ensure a proper start, the
slew rate of the applied voltage must be within the
specified range.
Some additional notes on the using the VC pin:
• In most applications, the VTM module primary side will be
powered by an upstream PRM® regulator which provides a
10 ms VC pulse during start up. In these applications the VC
pins of the PRM regulator and VTM current multiplier should
be tied together.
• In bi-directional applications, the primary of the VTM may
also be providing power to a PRM input. In these
applications, a proper VC voltage within the specified range
must be applied any time the primary voltage of the VTM is
below 26 V.
• The VC voltage can be applied indefinitely allowing for
continuous operation down to 0 VPRI.
• The fault response of the VTM module is latching. A positive
edge on VC is required in order to restart the unit. If VC is
continuously applied the PC pin may be toggled to restart
the VTM module.
Primary Control (PC) is a primary referenced pin that can be
used to accomplish the following functions:
• Delayed start: Upon the application of VC, the PC pin will
source a constant 100 µA current to the internal RC
network. Adding an external capacitor will allow further
delay in reaching the 2.5 V threshold for module start.
• Auxiliary voltage source: Once enabled in regular
operational conditions (no fault), each VTM PC provides a
regulated 5 V, 2 mA voltage source.
• Disable: PC pin can be actively pulled down in order
to disable the module. Pull down impedance shall be lower
than 400 Ω.
• Fault detection flag: The PC 5 V voltage source is internally
turned off as soon as a fault is detected. It is important to
notice that PC doesn’t have current sink capability. Therefore,
in an array, PC line will not be capable of disabling
neighboring modules if a fault is detected.
• Fault reset: PC may be toggled to restart the unit if VC
is continuously applied.
Temperature Monitor (TM) is a primary referenced pin that
provides a voltage proportional to the absolute temperature of
the converter control IC.
It can be used to accomplish the following functions:
• Monitor the control IC temperature: The temperature in
Kelvin is equal to the voltage on the TM pin scaled
by 100. (i.e. 3.0 V = 300 K = 27ºC). If a heat sink is applied,
TM can be used to thermally protect the system.
• Fault detection flag: The TM voltage source is internally
turned off as soon as a fault is detected. For system
monitoring purposes (microcontroller interface) faults are
detected on falling edges of TM signal.
8.0 START UP BEHAVIOR
Depending on the sequencing of the VC voltage with respect
to the same voltage, whether the source is on the primary or
secondary, the behavior during start up will vary as follows:
• Normal operation (VC applied prior to the source voltage):
In this case, the controller is active prior to the source
ramping. When the source voltage is applied, the VTM
module load voltage will track the source (See Figure 10).
The inrush current is determined by the source voltage rate
of rise and load capacitance. If the VC voltage is removed
prior to the primary voltage reaching 26 V, the VTM may
shut down.
• Stand-alone operation (VC applied after VPRI): In this case the
VTM secondary will begin to rise upon the application of the
VC voltage (See Figure 11). The Adaptive Soft Start Circuit
(See Section 11) may vary the secondary voltage rate of rise
in order to limit the inrush current to its maximum level.
When starting into high capacitance, or a short, the
secondary current will be limited for a maximum of
1200 µsec. After this period, the Adaptive Soft Start Circuit
will time out and the VTM module may shut down. No
restart will be attempted until VC is re-applied or PC is
toggled. The maximum secondary capacitance is limited to
1000 µF in this mode of operation to ensure a
successful start.
9.0 THERMAL CONSIDERATIONS
VI Chip® products are multi-chip modules whose temperature
distribution varies greatly for each part number as well as with
the line/load conditions, thermal management and
environmental conditions. Maintaining the top of the
VTM48EF120T025A0R case to less than 100ºC will keep all
junctions within the VI Chip module below 125ºC for most
applications.
The percent of total heat dissipated through the top surface
versus through the J-lead is entirely dependent on the
particular mechanical and thermal environment. The heat
dissipated through the top surface is typically 60%. The heat
dissipated through the J-lead onto the PCB board surface is
typically 40%. Use 100% top surface dissipation when
designing for a conservative cooling solution.
It is not recommended to use a VI Chip module for an
extended period of time at full load without proper
heat sinking.
VTM® Current Multiplier
Rev 1.2
vicorpower.com
Page 10 of 19
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R VC_INT
PC
PC Pull-Up
& Source
-VPRI
VC
+VPRI
VTM® Current Multiplier
Rev 1.2
vicorpower.com
Page 11 of 19
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1000 pF
2.5 V
V DD
D VC_INT
CPRI
100 A
18 V
V DD
Regulator
Supply
150 K
1.5 K
10.5 V
5V
2 mA
2.5 V
Enable
Enable
Gate Drive
Supply
OVLO
UVLO
V IN
Adaptive
Soft Start
V DD
Fault Logic
Enable
Modulator
Enable
Slow Current
Limit
Cr
V REF
Fast Current
Limit
Q4
Lr
Primary Stage &
Resonant Tank
Over Current Protection
Differential
Primary
Current Sensing
Q2
Overtemperature
Protection
Primary
Gate
Drive
Q1
Q3
Temperature
Dependent
Voltage Source
V REF
Secondary
Gate Drive
Q6
40 K
Power
Transformer
1K
Q5
0.01
F
Synchronous
Rectification
+VSEC
TM
-VSEC
CSEC
VTM48 E x120 y 025A0R
10.0 VTM MODULE BLOCK DIAGRAM
VTM48 E x120 y 025A0R
11.0 SINE AMPLITUDE CONVERTERTM POINT OF LOAD CONVERSION
The Sine Amplitude Converter (SAC) uses a high frequency
resonant tank to move energy from primary to secondary or
vice-versa, depending on where the source is located. The
resonant tank is formed by Cr and leakage inductance Lr in the
power transformer windings as shown in the VTM module
Block Diagram (See Section 10). The resonant LC tank,
operated at high frequency, is amplitude modulated as a
function of primary voltage and secondary current. A small
amount of capacitance embedded in the primary and
secondary stages of the module is sufficient for full
functionality and is key to achieving power density.
The VTM48EF120T025A0R SAC can be simplified into the
following model:
973 pH
ISEC
IOUT
LPRI = 5.7 nH
LSEC = 600 pH
9.0 mΩ
+
V
VPRI
SEC
RROUT
R
RCPRI
CIN
0.57 mΩ
CIN
C
PRI
IN
V•I
1/4 • ISEC
2 µF
IIQQ
109 mA
RRCSEC
COUT
3.13 Ω
+
+
–
–
+
430 µΩ
1/4 • VPRI
CSEC
COUT
47 µF
SEC
VVOUT
K
–
–
Figure 14 — VI Chip® module AC model
At no load:
VSEC = VPRI • K
(1)
The use of DC voltage transformation provides additional
interesting attributes. Assuming that RSEC = 0 Ω and IQ = 0 A,
Eq. (3) now becomes Eq. (1) and is essentially load
independent, resistor R is now placed in series with VPRI as
shown in Figure 15.
K represents the “turns ratio” of the SAC.
Rearranging Eq (1):
K=
VSEC
VPRI
(2)
R
R
VVin
PRI
+
–
SAC™
SAC
1/32
KK == 1/32
V
Vout
SEC
In the presence of load, VSEC is represented by:
VSEC = VPRI • K – ISEC • RSEC
(3)
Figure 15 — K = 1/32 Sine Amplitude Converter™
with series primary resistor
and ISEC is represented by:
ISEC =
IPRI – IQ
K
(4)
RSEC represents the impedance of the SAC, and is a function of
the RDSON of the primary and secondary MOSFETs and the
winding resistance of the power transformer. IQ represents the
quiescent current of the SAC control and gate drive circuitry.
For applications where the source is located on the secondary
side, equations 1 to 4 can be re-arranged to represent VPRI and
IPRI as a function of VSEC and ISEC.
The relationship between VPRI and VSEC becomes:
VSEC = (VPRI – IPRI • R) • K
(5)
Substituting the simplified version of Eq. (4)
(IQ is assumed = 0 A) into Eq. (5) yields:
VSEC = VPRI • K – ISEC • R • K2
VTM® Current Multiplier
Rev 1.2
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VTM48 E x120 y 025A0R
This is similar in form to Eq. (3), where RSEC is used to represent
the characteristic impedance of the SAC™. However, in this
case a real R on the primary side of the SAC is effectively scaled
by K2 with respect to the secondary.
Assuming that R = 1 Ω, the effective R as seen from the secondary
side is 0.98 mΩ, with K = 1/32 as shown in Figure 15.
A similar exercise should be performed with the additon of a
capacitor or shunt impedance at the primary to the SAC. A
switch in series with VIN is added to the circuit. This is depicted
in Figure 16.
SS
VVin
PRI
+
–
C
C
SAC™
SAC
K = 1/32
K = 1/32
VVout
SEC
Figure 16 — Sine Amplitude Converter™ with primary capacitor
A change in VPRI with the switch closed would result in a
change in capacitor current according to the following
equation:
IC(t) = C
dVPRI
dt
(7)
Assume that with the capacitor charged to VPRI, the switch is
opened and the capacitor is discharged through the idealized
SAC. In this case,
IC = ISEC • K
(8)
Low impedance is a key requirement for powering a highcurrent, low voltage load efficiently. A switching regulation
stage should have minimal impedance while simultaneously
providing appropriate filtering for any switched current. The
use of a SAC between the regulation stage and the point of
load provides a dual benefit of scaling down series impedance
leading back to the source and scaling up shunt capacitance or
energy storage as a function of its K factor squared. However,
the benefits are not useful if the series impedance of the SAC
is too high. The impedance of the SAC must be low, i.e. well
beyond the crossover frequency of the system.
A solution for keeping the impedance of the SAC low involves
switching at a high frequency. This enables small magnetic
components because magnetizing currents remain low. Small
magnetics mean small path lengths for turns. Use of low loss
core material at high frequencies also reduces core losses.
The two main terms of power loss in the VTM module are:
- No load power dissipation (PNL ): defined as the power
used to power up the module with an enabled powertrain
at no load.
- Resistive loss (RSEC): refers to the power loss across
the VTM modeled as pure resistive impedance.
PDISSIPATED = PNL + PRSEC
Therefore,
PSEC = PPRI – PDISSIPATED = PPRI – PNL – PRSEC
C
K2
•
h =
=
dVSEC
dt
(9)
The equation in terms of the secondary has yielded a K2 scaling
factor for C, specified in the denominator of the equation.
A K factor less than unity, results in an effectively larger
capacitance on the secondary when expressed in terms of the
primary. With a K= 1/32 as shown in Figure 16,
C=1 µF would appear as C=1024 µF when viewed
from the secondary. Note that in situations where the souce
voltage is located on the secondary side, the effect is reversed
and effective valve of capacitance located on the secondary
side is divided by a factor of 1/K2 when reflected
to the primary.
(11)
The above relations can be combined to estimate the overall
module efficiency:
Substituting Eq. (1) and (8) into Eq. (7) reveals:
ISEC =
(10)
PSEC = PPRI – PNL – PRSEC
PPRI
PPRI
VPRI • IPRI – PNL – (ISEC)2 • RSEC
VPRI • IPRI
= 1–
(
)
PNL + (ISEC)2 • RSEC
VPRI • IPRI
VTM® Current Multiplier
Rev 1.2
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VTM48 E x120 y 025A0R
12.0 PRIMARY AND SECONDARY FILTER DESIGN
A major advantage of a SAC system versus a conventional
PWM converter is that the former does not require large
functional filters. The resonant LC tank, operated at extreme
high frequency, is amplitude modulated as a function of
primary voltage and secondary current and efficiently transfers
charge through the isolation transformer. A small amount of
capacitance embedded in the primary and secondary stages of
the module is sufficient for full functionality and is key to
achieving high power density.
This paradigm shift requires system design to carefully evaluate
external filters in order to:
1.Guarantee low source impedance.
To take full advantage of the VTM module dynamic
response, the impedance presented to its primary terminals
must be low from DC to approximately 5 MHz. Primary
capacitance may be added to improve transient
performance or compensate for high source impedance.
2.Further reduce primary and /or secondary voltage ripple
without sacrificing dynamic response.
Given the wide bandwidth of the VTM module, the source
response is generally the limiting factor in the overall
system response. Anomalies in the response of the source
will appear at the secondary of the VTM module multiplied
by its K factor.
3.Protect the module from overvoltage transients imposed
by the system that would exceed maximum ratings and
cause failures.
The VI Chip® module primary/secondary voltage ranges
must not be exceeded. An internal overvoltage lockout
function prevents operation outside of the normal
operating primary or secondary range. Even during this
condition, the powertrain is exposed to the applied voltage
and power MOSFETs must withstand it.
13.0 CAPACITIVE FILTERING CONSIDERATIONS
FOR A SINE AMPLITUDE CONVERTER™
It is important to consider the impact of adding capacitance to
a Sine Amplitude Converter on the system as a whole. Both
the capacitance value and the effective impedance of the
capacitor must be considered.
A Sine Amplitude Converter has a DC RSEC value which has
already been discussed in Section 11. The AC RSEC of the
SAC contains several terms:
• Resonant tank impedance
• Primary lead inductance and internal capacitance
• Secondary lead inductance and internal capacitance
The values of these terms are shown in the behavioral model in
Section 11. It is important to note on which side of the
transformer these impedances appear and how they reflect
across the transformer given the K factor.
The overall AC impedance varies from model to model. For
most models it is dominated by DC RSEC value from DC to
beyond 500 KHz. The behavioral model in Section 11 should
be used to approximate the AC impedance of the
specific model.
Any capacitors placed at the secondary of the VTM module
reflect back to the primary of the module by the square of the
K factor (Eq. 9) with the impedance of the module appearing
in series. It is very important to keep this in mind when using a
PRM® regulator to power the VTM module primary. Most PRM
modules have a limit on the maximum amount of capacitance
that can be applied to the secondary. This capacitance includes
both the PRM output capacitance and the VTM module
secondary capacitance reflected back to the primary. In PRM
module remote sense applications, it is important to consider
the reflected value of VTM module secondary capacitance
when designing and compensating the PRM module
control loop.
Capacitance placed at the primary of the VTM module appear
to the load reflected by the K factor with the impedance of the
VTM module in series. In step-down ratios, the effective
capacitance is increased by the K factor. The effective ESR of
the capacitor is decreased by the square of the K factor, but
the impedance of the module appears in series. Still, in most
step-down VTM modules an electrolytic capacitor placed at the
primary of the module will have a lower effective impedance
compared to an electrolytic capacitor placed at the secondary.
This is important to consider when placing capacitors at the
secondary of the module. Even though the capacitor may be
placed at the secondary, the majority of the AC current will be
sourced from the lower impedance, which in most cases will be
the module. This should be studied carefully in any system
design using a module. In most cases, it should be clear that
electrolytic secondary capacitors are not necessary to design a
stable, well-bypassed system.
VTM® Current Multiplier
Rev 1.2
vicorpower.com
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VTM48 E x120 y 025A0R
14.0 CURRENT SHARING
The SAC topology bases its performance on efficient transfer
of energy through a transformer without the need of closed
loop control. For this reason, the transfer characteristic can be
approximated by an ideal transformer with some resistive drop
and positive temperature coefficient.
This type of characteristic is close to the impedance
characteristic of a DC power distribution system, both in
behavior (AC dynamic) and absolute value (DC dynamic).
When connected in an array with the same K factor, the VTM
module will inherently share the load current (typically 5%)
with parallel units according to the equivalent impedance
divider that the system implements from the power source to
the point of load.
Some general recommendations to achieve matched array
impedances:
• Dedicate common copper planes within the PCB
to deliver and return the current to the modules.
• Provide the PCB layout as symmetric as possible.
• Apply same filtering to each unit.
• Current rating
(usually greater than maximum current of VTM module)
• Maximum voltage rating
(usually greater than the maximum possible primary or
secondary voltage)
• Ambient temperature
• Nominal melting I2t
16.0 BI-DIRECTIONAL OPERATION
The VTM48EF120T025A0R is capable of bi-directional
operation. If a voltage is present at the secondary which
satisfies the condition VSEC > VPRI • K at the time the VC
voltage is applied, or after the unit has started, then energy
will be transferred from secondary to primary. The primary to
secondary ratio will be maintained. The VTM48EF120T025A0R
will continue to operate bi-directional as long as the primary
and secondary are within the specified limits.
For further details see AN:016 Using BCM® Bus Converters
in High Power Arrays.
VPRI
ZPRI_EQ1
VTM®1
ZSEC_EQ1
VSEC
RS_1
ZPRI_EQ2
VTM®2
ZSEC_EQ2
RS_2
+
–
DC
Load
ZPRI_EQn
VTM®n
ZSEC_EQn
RS_n
Figure 17 — VTM module array
15.0 FUSE SELECTION
In order to provide flexibility in configuring power systems
VI Chip® products are not internally fused. Line fusing
of VI Chip products is recommended at system level to provide
thermal protection in case of catastrophic failure.
The fuse shall be selected by closely matching system
requirements with the following characteristics:
• Direction of power flow: if a power source is located on the
primary, there must be a fuse located in the series with the
primary source; if a source is located on the secondary, there
must also be a fuse located in series with the
secondary source.
VTM® Current Multiplier
Rev 1.2
vicorpower.com
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VTM48 E x120 y 025A0R
17.1 J-LEAD PACKAGE MECHANICAL DRAWING
mm
(inch)
NOTES:
mm
2. DIMENSIONS ARE inch .
UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
3. .X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]
4. PRODUCT MARKING ON TOP SURFACE
DXF and PDF files are available on vicorpower.com
17.2 J-LEAD PACKAGE RECOMMENDED LAND PATTERN
+PRI
+SEC1
-SEC1
+SEC2
-PRI
-SEC2
3. .X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]
mm
2. DIMENSIONS ARE inch .
UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
4. PRODUCT MARKING ON TOP SURFACE
DXF and PDF files are available on vicorpower.com
VTM® Current Multiplier
Rev 1.2
vicorpower.com
Page 16 of 19
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VTM48 E x120 y 025A0R
17.3 THROUGH-HOLE PACKAGE MECHANICAL DRAWING
mm
(inch)
NOTES:
mm
2. DIMENSIONS ARE inch .
UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
3. .X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]
4. PRODUCT MARKING ON TOP SURFACE
DXF and PDF files are available on vicorpower.com
17.4 THROUGH-HOLE PACKAGE RECOMMENDED LAND PATTERN
+PRI
+SEC1
-SEC1
+SEC2
-PRI
-SEC2
3. .X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]
mm
2. DIMENSIONS ARE inch .
UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
4. PRODUCT MARKING ON TOP SURFACE
DXF and PDF files are available on vicorpower.com
VTM® Current Multiplier
Rev 1.2
vicorpower.com
Page 17 of 19
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VTM48 E x120 y 025A0R
17.5 RECOMMENDED HEAT SINK PUSH PIN LOCATION
(NO GROUNDING CLIPS)
(WITH GROUNDING CLIPS)
Notes:
1. Maintain 3.50 (0.138) Dia. keep-out zone
free of copper, all PCB layers.
2. (A) Minimum recommended pitch is 39.50 (1.555).
This provides 7.00 (0.275) component
edge-to-edge spacing, and 0.50 (0.020)
clearance between Vicor heat sinks.
(B) Minimum recommended pitch is 41.00 (1.614).
This provides 8.50 (0.334) component
edge-to-edge spacing, and 2.00 (0.079)
clearance between Vicor heat sinks.
3. VI Chip® module land pattern shown for reference
only; actual land pattern may differ.
Dimensions from edges of land pattern
to push–pin holes will be the same for
all full-size VI Chip® products.
5. Unless otherwise specified:
Dimensions are mm (inches)
tolerances are:
x.x (x.xx) = ±0.3 (0.01)
x.xx (x.xxx) = ±0.13 (0.005)
4. RoHS compliant per CST–0001 latest revision.
6. Plated through holes for grounding clips (33855)
shown for reference, heat sink orientation and
device pitch will dictate final grounding solution.
17.6 VTM MODULE PIN CONFIGURATION
4
3
2
+SEC
1
A
A
B
B
C
C
D
D
+PRI
E
E
F
-SEC
G
H
TM
H
J
J
VC
K
PC
K
+SEC
-SEC
L
L
M
M
N
N
P
P
R
R
-PRI
T
T
Signal Name
+PRI
–PRI
TM
VC
PC
+SEC
–SEC
Bottom View
VTM® Current Multiplier
Rev 1.2
vicorpower.com
Page 18 of 19
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Pin Designation
A1-E1, A2-E2
L1-T1, L2-T2
H1, H2
J1, J2
K1, K2
A3-D3, A4-D4, J3-M3, J4-M4
E3-H3, E4-H4, N3-T3, N4-T4
VTM48 E x120 y 025A0R
Vicor’s comprehensive line of power solutions includes high density AC-DC and DC-DC modules and
accessory components, fully configurable AC-DC and DC-DC power supplies, and complete custom
power systems.
Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by Vicor for its use. Vicor makes no
representations or warranties with respect to the accuracy or completeness of the contents of this publication. Vicor reserves the right to make
changes to any products, specifications, and product descriptions at any time without notice. Information published by Vicor has been checked and
is believed to be accurate at the time it was printed; however, Vicor assumes no responsibility for inaccuracies. Testing and other quality controls are
used to the extent Vicor deems necessary to support Vicor’s product warranty. Except where mandated by government requirements, testing of all
parameters of each product is not necessarily performed.
Specifications are subject to change without notice.
Vicor’s Standard Terms and Conditions
All sales are subject to Vicor’s Standard Terms and Conditions of Sale, which are available on Vicor’s webpage or upon request.
Product Warranty
In Vicor’s standard terms and conditions of sale, Vicor warrants that its products are free from non-conformity to its Standard Specifications (the
“Express Limited Warranty”). This warranty is extended only to the original Buyer for the period expiring two (2) years after the date of shipment
and is not transferable.
UNLESS OTHERWISE EXPRESSLY STATED IN A WRITTEN SALES AGREEMENT SIGNED BY A DULY AUTHORIZED VICOR SIGNATORY, VICOR DISCLAIMS
ALL REPRESENTATIONS, LIABILITIES, AND WARRANTIES OF ANY KIND (WHETHER ARISING BY IMPLICATION OR BY OPERATION OF LAW) WITH
RESPECT TO THE PRODUCTS, INCLUDING, WITHOUT LIMITATION, ANY WARRANTIES OR REPRESENTATIONS AS TO MERCHANTABILITY, FITNESS FOR
PARTICULAR PURPOSE, INFRINGEMENT OF ANY PATENT, COPYRIGHT, OR OTHER INTELLECTUAL PROPERTY RIGHT, OR ANY OTHER MATTER.
This warranty does not extend to products subjected to misuse, accident, or improper application, maintenance, or storage. Vicor shall not be liable
for collateral or consequential damage. Vicor disclaims any and all liability arising out of the application or use of any product or circuit and assumes
no liability for applications assistance or buyer product design. Buyers are responsible for their products and applications using Vicor products and
components. Prior to using or distributing any products that include Vicor components, buyers should provide adequate design, testing and
operating safeguards.
Vicor will repair or replace defective products in accordance with its own best judgment. For service under this warranty, the buyer must contact
Vicor to obtain a Return Material Authorization (RMA) number and shipping instructions. Products returned without prior authorization will be
returned to the buyer. The buyer will pay all charges incurred in returning the product to the factory. Vicor will pay all reshipment charges if the
product was defective within the terms of this warranty.
Life Support Policy
VICOR’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS
PRIOR WRITTEN APPROVAL OF THE CHIEF EXECUTIVE OFFICER AND GENERAL COUNSEL OF VICOR CORPORATION. As used herein, life support
devices or systems are devices which (a) are intended for surgical implant into the body, or (b) support or sustain life and whose failure to perform
when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the
user. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the
failure of the life support device or system or to affect its safety or effectiveness. Per Vicor Terms and Conditions of Sale, the user of Vicor products
and components in life support applications assumes all risks of such use and indemnifies Vicor against all liability and damages.
Intellectual Property Notice
Vicor and its subsidiaries own Intellectual Property (including issued U.S. and Foreign Patents and pending patent applications) relating to the
products described in this data sheet. No license, whether express, implied, or arising by estoppel or otherwise, to any intellectual property rights is
granted by this document. Interested parties should contact Vicor's Intellectual Property Department.
The products described on this data sheet are protected by the following U.S. Patents Numbers:
5,945,130; 6,403,009; 6,710,257; 6,911,848; 6,930,893; 6,934,166; 6,940,013; 6,969,909; 7,038,917; 7,145,186; 7,166,898; 7,187,263;
7,202,646; 7,361,844; D496,906; D505,114; D506,438; D509,472; and for use under 6,975,098 and 6,984,965.
Vicor Corporation
25 Frontage Road
Andover, MA, USA 01810
Tel: 800-735-6200
Fax: 978-475-6715
email
Customer Service: [email protected]
Technical Support: [email protected]
VTM® Current Multiplier
Rev 1.2
vicorpower.com
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