Cool-Power® PI3751-00 38 V to 60 Vin, 200 W Cool-Power ZVS Buck-Boost Product Description Features The PI3751-00 is a high efficiency, wide input range DC-DC ZVS-Buck-Boost regulator. This high density module integrates controller, power switches, and support components. The integration of a high performance ZeroVoltage Switching (ZVS) topology, within the PI3751-00, increases point of load performance providing best in class power efficiency. • Over 97.5% efficiency at 2.5 MHz FSW The PI3751-00 requires an externally applied 5 V bias to the VDR input, an external inductor, resistive divider and minimal capacitors to form a complete DC-DC switching mode buck-boost regulator. • Light load mode < 200 mW no load power dissipation The ZVS architecture also enables high frequency operation while minimizing switching losses and maximizing efficiency. The high switching frequency operation reduces the size of the external filtering components, improves power density, and enables very fast dynamic response to line and load transients. The PI3751-00 sustains high switching frequency up to the rated input voltage without sacrificing efficiency and supports large conversion ratios. • Wide input voltage range of 38 V to 60 V • Wide output voltage range of 38 V to 50 V • Up to 200 W continuous output power / 368 W peak • Power density exceeding 9,150 W/in3 • Fast transient response in VRM 12.X applications • VTM compatibility mode • High side current sense amplifier • User configurable differential amplifier • Input / Output Over / Under Voltage Protection • Temperature lockout protection • Fast and slow current limits • -40°C to 125°C operating range (TJ) Applications • Factorized Power Solution (when coupled with a VTM® device) • Computing, Communications, Precessor, DDR Memory • 48 V to POL Power Solutions Package Information • 10 mm x 14 mm x 2.56 mm Land Grid Array Module Typical Application )% #" ) )('& ' &" &" Applications Diagram for use within a Factorized Power, VR12.5 Design Cool-Power® Rev 1.0 vicorpower.com Page 1 of 28 12/2014 800 927.9474 PI3751-00 Contents Contents Page Contents Page Order Information 3 Absolute Maximum Ratings 3 Buck Boost Configuration of EAIN Pin 13 Pin Description 4 Buck Boost Configuration of EAO Pin 13 Package Pin-Out 5 Buck Boost Configuration of COMP Pin 13 Large Pin Blocks 5 Stability Considerations 13 Storage and Handling Information 6 Midband Gain Design (R1,R3) 15 Block Diagram 6 Compensation Zero Design (C1) 15 Electrical Characteristics 7 High Frequency Pole Design (C2) 15 Functional Description 11 Verifying Stability 15 External 5V Bias Supply 11 Input filter stability 16 Enable 11 Inductor Pairing 17 Switching Frequency Synchronization 11 Thermal Considerations 17 Soft-Start and Tracking 11 Design and Performance Section 18 Remote Sensing Differential Amplifier 11 Package Drawings 25 Bidirectional Fault Pin 11 Receiving PCB Pattern Design Recommendations 26 Output Current Limit Protection 11 Revision History 27 Input Under-Voltage Lockout 12 Warranty 28 Input Over Voltage Lockout 12 Output Over Voltage Protection 12 Over Temperature Protection 12 Pulse Skip Mode (PSM) 12 Variable Frequency Operation 12 IMON Amplifier 12 Application Information Cool-Power® Rev 1.0 vicorpower.com Page 2 of 28 12/2014 800 927.9474 13 PI3751-00 Order Information Part Number Input Range Package Transport Media PI3751-00-LGIZ PI3751-00-LGIZ 10 mm x 14 mm 108-pin Land Grid Array TRAY Absolute Maximum Ratings Note: Stresses beyond these limits may cause permanent damage to the device. Operation at these conditions or conditions beyond those listed in the Electrical Specifications table is not guaranteed. All voltage nodes are referenced to PGND unless otherwise noted. Location Name 1-2,G-K VIN[2] 4-5,G-K VMIN ISOURCE 75 V -0.3 V A[1] 40 A[1] VS1 75 V -0.7 V DC 40 A[1] 18 A[1] 10-11,G-K VS2 75 V -0.7 V DC 40 A[1] 18 A[1] 13-14,G-K VOUT 75 V -0.7 V DC 40 A[1] 40 A[1] 1E VDR 5.5 V -0.3 V 30 mA 200 mA 1E FLT 5.5 V -0.3 V 20 mA 20 mA 1C SYNC OUT 5.5 V -0.3 V 5 mA 5 mA 1B SYNC IN 5.5 V -0.3 V 5 mA 5 mA 1A FT1 5.5 V -0.3 V 5 mA 5 mA 2A FT2 5.5 V -0.3 V 5 mA 5 mA 3A FT3 5.5 V -0.3 V 5 mA 5 mA 4A FT4 5.5 V -0.3 V 10 mA 10 mA 5A ENABLE 5.5 V -0.3 V 5 mA 5 mA 6A SS/TRK 5.5 V -0.3 V 50 mA 50 mA 7A FT5 5.5 V -0.3 V 5 mA 5 mA 8A COMP 5.5 V -0.3 V 5 mA 5 mA 9A VSN 5.5 V -1.5 V 5 mA 5 mA 10A VSP 5.5 V -1.5 V 5 mA 5 mA 11A VDIFF 5.5 V -0.5 V 5 mA 5 mA 12A EAIN 5.5 V -0.3 V 5 mA 5 mA 13A EAO 5.5 V -0.3 V 5 mA 5 mA 14A IMON 5.5 V -0.3 V 5 mA 5 mA 14D ISN[3] 75 V -2 V DC 5 mA 5 mA 14E ISP[3] 75 V -2 V DC 5 mA 5 mA 10-14,B + 10-12,C-E SGND 0.3 V -0.3 V 200 mA 200 mA 2-9,B-E + 7-8,F-K VMAX PGND N/A N/A [1] Non-Operating Test Mode Limits. VIN has a minimum limit of VDR – 0.3 VDC. VDR has an internal diode to VIN. [3] The ISP pin to ISN pin has a maximum differential limit of +5.5 VDC and -0.5 VDC. [2] Cool-Power® Rev 1.0 vicorpower.com Page 3 of 28 12/2014 800 927.9474 40 18 A[1] ISINK 18 A[1] PI3751-00 Pin Description Pin Number Pin Name 1-2,G-K VIN Input voltage and sense node for UVLO, OVLO and feed forward compensation. Description 4-5,G-K VS1 Input side switching node and ZVS sense node for power switches. 10-11,G-K VS2 Output side switching node and ZVS sense node for power switches. 13-14,G-K VOUT Output voltage and sense node for power switches, VOUT feed forward compensation, VOUT_OV and internal VBUS_HI signals. 1E VDR 5V input for gate driver and internal logic. Connect to 5 V power supply (5.1 V recommended). 1D FLT 1C SYNCOUT Regulator Fault output signal. Connect to the TM pin of the VTM to synchronize system control and soft-start. Connect to VDR with 10k resistor when not in use. Synchronization output. Outputs a high signal for ½ of the programmed switching period at the beginning of each switching cycle, for synchronization of other regulators. Synchronization input. When a falling edge synchronization pulse is detected the PI3751-00 will delay the start of the next switching cycle until the next falling edge sync pulse arrives, up to a maximum delay of two times the programmed switching period. If the next pulse does not arrive within two times the programmed switching period, the controller will leave sync mode and start a switching cycle automatically. Connect to SGND when not in use. 1B SYNCIN 1A FT1 For factory use only. Connect to SGND or leave floating in application. 2A FT2 For factory use only. Connect to SGND or leave floating in application. 3A FT3 For factory use only. Connect to SGND in application. 4A FT4 For factory use only. Connect to SGND in application. 5A ENABLE Regulator Enable control. Asserted high or left floating = regulator enabled; Asserted low, regulator output disabled. 6A SS/TRK Soft-start and track input. An external capacitor may be connected between TRK pin and SGND to decrease the rate of output rise during soft-start. The recommended value of external capacitor is 0.22 µF. 7A FT5 8A COMP For factory use only. Connect to SGND in application. Error amp compensation dominant pole. Connect a capacitor between COMP and SGND to set the control loop dominant pole. 9A VSN General purpose amplifier inverting input 10A VSP General purpose amplifier non-inverting input 11A VDIFF General purpose amplifier output 12A EAIN Error amplifier inverting input. Connect by resistive divider to the output. 13A EAO Transconductance error amplifier output, PWM input and external connection for load sharing. Connect a capacitor between EAO and SGND to set the control loop high frequency pole. 14A IMON 14D ISN High side current sense amplifier negative input. 14E ISP High side current sense amplifier positive input. 10-14,B + 10-12,C-E SGND Signal ground. Internal logic and analog ground for the regulator. SGND and PGND are star connected within the regulator package. 2-9,B-E + 7-8,F-K PGND Power ground. VIN, VOUT, VS1 and VS2 power returns. SGND and PGND are star connected within the regulator package. High side current sense amplifier output. Cool-Power® Rev 1.0 vicorpower.com Page 4 of 28 12/2014 800 927.9474 PI3751-00 Package Pin-Out VIN 1 VS1 2 3 4 PGND 5 6 7 VS2 8 9 10 VOUT 11 12 13 14 K J H G F VDR E ISP FLT D ISN SYNC OUT C SYNC IN B SGND A IMON EAO EAIN VDIFF VSP VSN COMP FT5 TRK ENABLE FT4 FT3 FT2 FT1 PACKAGE TOP VIEW Exposed Copper Solder Mask Over Copper Solder Mask Over Board Large Pin Blocks Pin Block Name Group of pins VIN K1-2, J1-2, H1-2, G1-2 VS1 K4-5, J4-5, H4-5, G4-5 PGND K7-8, J7-8, H7-8, G7-8, F7-8, E2-9, D2-9, C2-9, B2-9 VS2 K10-11, J10-11, H10-11, G10-11 VOUT K13-14, J13-14, H13-14, G13-14 SGND E10-12, D10-12, C10-12, B10-14 Cool-Power® Rev 1.0 vicorpower.com Page 5 of 28 12/2014 800 927.9474 PI3751-00 Storage and Handling Information Maximum Storage Temperature Range -65°C to 150°C Maximum Operating Junction Temperature Range -40°C to 125°C Soldering Temperature for 20 seconds 245°C MSL Rating 3 [4] ESD Rating [4] 1.5 kV HBM; 1.0 kV CDM JESD22-C101F, JESD22-A114F Block Diagram VS1 VS2 VIN VOUT Q1 Q3 VS1 VS2 Q2 Q4 + + LDO ISP ISN IMON VSN VSP VDIFF VDR SYNCO SYNCI FLT EN FT1 - FT5 ZVS Buck Boost Control and Digital Parametric Trim + 1.7 V EAIN EAO COMP CLAMP 0Ω PGND SGND Cool-Power® Rev 1.0 vicorpower.com Page 6 of 28 12/2014 800 927.9474 SS/TRK PI3751-00 Electrical Characteristics Specifications apply for the conditions -40°C < TJ < 125°C, external VDR = 5.1 V, VIN = 54 V, VOUT = 44 V, LEXT = 500 nH, external CIN = 6 µF, COUT = 6 µF as shown in the typical application diagram, Figure 1, unless otherwise noted. All voltage nodes are referenced to PGND unless otherwise noted. Parameter Symbol Conditions Min Typ Max Unit 38 54 60 V 3.3 3.4 3.5 A Input Specifications Input Voltage VIN_DC Input Current IIN_DC [5] Input Current During Output Short (fault condition duty cycle) IIN_SHORT [5][6] Input Quiescent Current IQ_VIN_EN Enabled (no load) Input Quiescent Current IQ_VIN Disabled, VDR; Powered Externally VIN_SR [5] Input Voltage Slew Rate Internal Input Capacitance CIN VIN UVLO threshold rising VIN_UVLO_START VIN UVLO hysteresis VIN OVLO threshold rising VIN OVLO hysteresis 75 mA 3 mA 0.1 mA 1 100 V, X7R type, 25°C, VIN = 0 V[5] 1 34 VIN_UVLO_HYS 35.8 µF 37.6 1.8 VIN_OVLO_START 61 VIN_OVLO_HYS 64.5 V/µs V V 68 1.3 V V Output Specifications Output Voltage Range Output Current Steady State Output Current Peak Output Power Steady State Output Power Peak VOUT_DC IOUT_DC VOUT = 44 V [5] 38 50 V 3.8 4.6 A IOUT_PEAK VOUT = 46 V, 2 ms pulse, 25% duty cycle, 38 V <VIN <60 V 8.0 POUT_DC [5] 170 POUT_PEAK Internal Output Capacitance COUT VOUT Over Voltage Threshold VOUT_OVT VOUT Over Voltage Hysteresis VOUT_OVH VOUT = 46 V, 2 ms pulse, 25% duty cycle, 38 V <VIN <60 V 100 V, X7R type 25°C, VOUT = 0 200 368 V[5] Rising VOUT threshold to detect open loop A W 0.5 52 W 54.7 µF 57.5 2.7 V V VDR Input VDR Supply Voltage VDR_SP Supply Externally VDR Quiescent Current VDR_IQ Enabled, IOUT = 1.5 A VDR Quiescent Current VDR_IQ Disabled VDR Internal LDO output set point VDR_LDO VDR Internal LDO output current VDR UVLO Start Threshold VDR UVLO Hysteresis VDR UVLO Start - VDR LDO set point 4.9 60 V >VIN >8 V VDR_UVLO_START Rising VDR threshold to clear UVLO 5.1 5.36 V 100 130 mA 3 5 10 mA 4.25 4.4 4.7 V 15 20 25 mA 4.5 4.7 4.9 V VDR_UVLO_HYS 200 VDR_LDO 150 Cool-Power® Rev 1.0 vicorpower.com Page 7 of 28 12/2014 800 927.9474 400 mV 600 mV PI3751-00 Electrical Characteristics (Cont.) Specifications apply for the conditions -40°C < TJ < 125°C, external VDR = 5.1 V, VIN = 54 V, VOUT = 44 V, LEXT = 500 nH, external CIN = 6 µF, COUT = 6 µF as shown in the typical application diagram, Figure 1, unless otherwise noted. All voltage nodes are referenced to PGND unless otherwise noted. Parameter Symbol Conditions Min Typ Max Unit 150 260 µA Current Sense Amplifier (Dedicated to monitor Input or Output current) ISP Pin Bias Current (Sink) VCM = 10 V, Flows to SGND ISN Pin Bias Current VCM = 10 V 90 0 Common Mode Input Range 8 IMON Source Current 1 IMON Sink Current 1 IMON Output At No Load µA 60 V 1.8 3 mA 1.6 2.6 mA 0 10 mV -4 4 % Full Scale Error 40 mV input Bandwidth [5] 40 kHz Settling Time For Full Scale Step Within 1% of final 20 µs 25 V/V Gain General Purpose Amplifier Open Loop Gain [5] 96 120 140 dB Small Signal Gain-Bandwidth [5] 5 7 12 MHz -6 0.5 13 mV 2.5 V 2 V VDR - 0.2 V V 20 mV 100 pF Offset Common Mode Input Range -0.3 Differential Mode Input Range Common mode voltage = 1 V, inverting gain = -1 Maximum Output Voltage IDIFF = -1 mA Minimum Output Voltage No Load Capacitive Load for Stable Operation [5] [7] 0 Slew Rate 10 [7] Output Current -1 V/µs 1 mA 1.734 V VDR V 3.6 4.0 V 0.15 V Transconductance Error Amplifier Reference EAIN = EAO Input Range [5], VEAIN 1.667 see VEAIN_OV below 1.7 0 Maximum Output Voltage VEAMAX GM = 1 ms Minimum Output Voltage VEAMIN GM = 1 ms 0.05 Transconductance GM Factory Set 1.0 ms Zero Resistor RZEA Factory Set 11 kΩ VEAO = 50 mV, VEAIN = 0 V, GM = 17.1 mS 400 µA VEAO = 2 V, VEAIN = 5 V, GM = 17.1 mS 400 µA -8 * 80 dB 56 pF EAO Output Current Sourcing IEA_SOURCE EAO Output Current Sinking IEA_SINK Output Current Phase Shift at 1 MHz GM = 17.1mS [5] Open Loop Gain ROUT > 1 MΩ [5] 3.35 70 Input Capacitance [5] Cool-Power® Rev 1.0 vicorpower.com Page 8 of 28 12/2014 800 927.9474 PI3751-00 Electrical Characteristics (Cont.) Specifications apply for the conditions -40°C < TJ < 125°C, external VDR = 5.1 V, VIN = 54 V, VOUT = 44 V, LEXT = 500 nH, external CIN = 6 µF, COUT = 6 µF as shown in the typical application diagram, Figure 1, unless otherwise noted. All voltage nodes are referenced to PGND unless otherwise noted. Parameter Symbol Conditions Min Typ Max Unit 2.4 2.5 2.6 MHz Control and Protection Switching Frequency FSW 25°C VEAO Pulse Skip Threshold VEAO_PST VEAO to SGND 0.365 0.4 0.45 V VEAO Overload Threshold VEAO_OL VEAO to SGND 3.175 3.3 3.425 V TOL VEAO > VEAO_OL 820 µs 13 A Overload Timeout Vout Slow Current Limit VOUT_SCL 10 µs time constant VEAIN Output Over Voltage Threshold VEAIN_OV VEAIN > VEAIN_OV Over Temperature Fault Threshold Over Temperature Restart Hysteresis VBUS Rising Threshold 1.94 2.04 2.14 V TOTP [5] 135 °C TOTP_HYS [5] 30 °C VBUS VBUS Fall Threshold VBUS Discharge Current VBUS >5 V discharge current = CC; else 500 Ohms resistive VOUT Negative Fault Threshold 0.95 1.05 1.1 V 0.85 0.95 1.05 V 8 10 15 mA -0.35 -0.25 -0.15 V 1.7 V 70 mV Soft Start and Tracking Function [5] TRK Active Range 0 TRK Disable Threshold 20 45 [5] TRK Internal Capacitance 56 Soft Start Charge Current 30 Soft Start Discharge Current VTRK = 0.5 V Soft Start Time Ext CSS = 0.22 µF, 0 A < IOUT ≤ 8 A 50 [1] pF 70 µA 9 mA 7.5 ms Enable Enable High Threshold ENIH 0.9 1 1.1 V Enable Low Threshold ENIL 0.7 0.8 0.9 V ENHYS 100 200 300 mV Enable Threshold Hysteresis Enable Pin Bias Current VEN = 0 V or VEN = 2 V ±50 µA Enable Pull-up Voltage Floating 2.0 V 24 ms ½ VDR V Fault Restart Delay Time tFR_DLY Digital Signals SYNCIN High Threshold SYNCINIH SYNCOUT High SYNCOUTOH ISYNCOUT = 1 mA SYNCOUT Low SYNCOUTOL VDR - 0.5 VDR V ISYNCOUT = 1 mA 0.5 V FLT High Leakage FLTILH VFLT =VDR 10 µA FLT Output Low FLTOL IFLT = 4 mA 0.4 V [5] [6] [7] Assured to meet performance specification by design, test correlation, characterization and/or statistical process control. Input current during an output short circuit is a function of the fault restart duty cycle. The general purpose amplifier is disabled when the regulator is disabled, and VDIFF pin is internally grounded when disabled. Cool-Power® Rev 1.0 vicorpower.com Page 9 of 28 12/2014 800 927.9474 PI3751-00 Electrical Characteristics Switching Frequency Vs. Output Current @ VOUT = 44 V Efficiency @ VOUT = 44 V vs. Output Current 100% 2600 98% 2400 Frequency (kHz) Efficiency (%) 96% 94% 92% 90% 88% 86% 84% 2200 2000 1800 1600 1400 82% 1200 80% 1000 0 1 2 3 4 5 6 7 8 0 Output Current (A) 38 VIN 54 VIN 60 VIN 3 4 5 6 7 8 Power Loss (W) Output Current (A) 38 VIN 54 VIN 4 5 6 7 54 VIN 60 VIN Figure 2 — Switching Frequency vs. Output Current @ VOUT 44 V 12 11 10 9 8 7 6 5 4 3 2 1 0 2 3 38 VIN Total Power Loss (includes inductor) vs. Output Current @ VOUT = 44 V 1 2 Output Current (A) Figure 1 — Efficiency @ VOUT = 44 V vs. Output Current 0 1 60 VIN Figure 3 — Total Power Loss (includes inductor) vs. Output Current @ VOUT 44 V Cool-Power® Rev 1.0 vicorpower.com Page 10 of 28 12/2014 800 927.9474 8 PI3751-00 Functional Description The PI3751-00 is part of a family of highly integrated ZVS-BuckBoost regulators. The PI3751-00 output voltage is set with a resistive divider. Performance and maximum output current are characterized with a specific external power inductor as defined in the electrical specifications. L1 Vin Vin VS1 VS2 VOUT Vout Cout Cin PGND PGND ISP PI3751 5V ISN IMON VDR FLT VSN ENABLE VSP VDIFF SYNC OUT SS/TRK Remote Sensing Differential Amplifier A general purpose operational amplifier is provided to assist with differential remote sensing and or level shifting of the output voltage. This amplifier is enabled or disabled with the regulator ENABLE pin and the VDIFF pin is internally grounded when disabled, ensuring a defined output state. The VDIFF pin can be connected to the transconductance error amplifier input EAIN pin, or with proper configuration can also be connected to the EAO pin to drive the modulator directly. EAIN SYNC IN FT1,2,5 Soft-Start and Tracking The PI3751-00 provides a soft start and tracking feature using the SS/TRK pin. Programmable Soft Start requires an external capacitor from the SS/TRK pin to SGND in addition to the internal 56pF softstart capacitor to set the start-up ramp period. The PI3751-00 output will proportionately follow the TRK pin when it is below 1.7 VDC. If the TRK pin is asserted below the disable threshold, the regulator will finish the active switching cycle and then stop switching until the TRK pin voltage is above the disable threshold. EAO FT3,4 SGND COMP Figure 4 — ZVS-Buck-Boost with required components. Note that the current sense resistor in the output is not required for operation of the BB. Only required if using the current monitor amplifier. For basic operation, Figure 4 shows the minimum connections and components required. Note that the current sense resistor in the output is not required for operation of the BB. Only required if using the current monitor amplifier. External 5V Bias Supply The VDR pin of the PI3751-00 requires an external voltage of 5.0 VDC (5.1 VDC recommended) to power the gate drive and logic circuits. During startup the external VDR regulator must be disabled or track VIN, until VIN exceeds the expected VDR voltage. The VDR pin is precharged through an internal linear regulator which is set to 4.5 VDC nominal and is sourced from VIN. The externally applied VDR must not exceed VIN by more than 0.3 VDC at any time or damage to the device may result. Enable The ENABLE pin of the regulator is referenced to SGND and permits the user to turn the regulator on or off. The ENABLE polarity is a positive logic assertion. If the ENABLE pin is left floating or asserted high, the regulator output is enabled. When the ENABLE pin is asserted low the regulator will complete the current switching cycle, discharge the SS/TRK pin and enter a low power state until the ENABLE pin is released. The FLT pin also requires an external pull-up to enable regulator operation. Bidirectional Fault Pin The PI3751-00 FLT pin functions as a bidirectional fault indicator and startup control pin for a VTM3 device. The FLT pin is configured as an open drain and is active low during a fault or VBUS_HI condition. The FLT pin is also an input and a low value on this pin will disable the regulator. The FLT pin should have a 10K pull-up to VDR or to the TM pin of a VTM3 series device. Output Current Limit Protection PI3751-00 has three methods implemented to protect from output short circuit or over current condition. Slow Current Limit protection: prevents the output from sourcing current higher than the regulator’s maximum rated current. If the output current exceeds the Vout Slow Current Limit (VOUT_SCL) the FLT pin is asserted immediately, the regulator will complete the current switching cycle and stop, eliminating output current flow. After Fault Restart Delay (tFR_DLY), a soft-start cycle is initiated. This restart cycle will be repeated indefinitely until the excessive load is removed. Fast Current Limit protection: monitors the inductor current pulseby-pulse to prevent the regulator from supplying very high output current. If the inductor current exceeds the Fast Current Limit threshold, the FLT pin is asserted immediately, the regulator will complete the current switching cycle and stop, eliminating output current flow. After Fault Restart Delay (tFR_DLY), a soft-start cycle is initiated. This restart cycle will be repeated indefinitely until the fault condition is removed. Overload Timeout protection: If the regulator is providing excessive output power for longer than the Overload Timeout delay (TOL), the FLT pin is asserted immediately, the regulator will complete the current switching cycle and stop, eliminating output current flow. After Fault Restart Delay (tFR_DLY), a soft-start cycle is initiated. This restart cycle will be repeated indefinitely until the overload is removed. Switching Frequency Synchronization The SYNCIN input allows the user to synchronize the controller switching frequency to the falling edge of an external clock referenced to SGND. The external clock can synchronize the unit between 50% and 110% of the preset switching frequency (FSW). The SYNCIN pin should be connected to SGND when not in use, and should never be left floating. Cool-Power® Rev 1.0 vicorpower.com Page 11 of 28 12/2014 800 927.9474 PI3751-00 Input Under-Voltage Lockout If VIN falls below the input Under Voltage Lockout (UVLO) threshold the PI3751-00 will complete the current cycle and stop switching but will restart immediately once the input voltage is reestablished. However if VIN is below the UVLO threshold for more than 128 clock cycles, the FLT pin is asserted, the regulator will stop switching until a Fault Restart Delay (tFR_DLY) has finished and VIN is reestablished above the UVLO threshold. Then a soft-start cycle is initiated. IMON Amplifier The PI3751-00 provides a differential amplifier with a level shifted, SGND referenced output, the IMON Pin, which is useful for sensing input or output current on high voltage rails. A fixed gain of 25:1 is provided over a large common mode range. When using the amplifier, the ISN pin must be referenced to the common mode voltage of the ISP pin for proper operation. See Absolute Maximum Ratings for more information. If not in use, the ISN and ISP pins should be connected to SGND and the IMON pin left floating. Input Over Voltage Lockout If VIN rises above the input Over Voltage Lockout (OVLO) threshold, the FLT pin is asserted immediately, the regulator will complete the current switching cycle and stop. The regulator will restart once the input voltage is reestablished and after a Fault Restart Delay (tFR_DLY). Output Over Voltage Protection The PI3751-00 is equipped with two methods of detecting an output over voltage condition. Output Over Voltage Protection (OVP) is provided to prevent damage to downstream input voltage sensitive devices. If the output voltage exceeds 20% of its set regulated value as measured by the EAIN pin (VEAIN_OV), the FLT pin is asserted immediately, the regulator will complete the current switching cycle and stop. Also if the output voltage of the regulator exceeds the VOUT Over Voltage Threshold (VOUT_OVT), indicating a possible open-loop condition has occurred then the FLT pin is asserted immediately, the regulator will complete the current switching cycle and stop. The regulator will resume operation once the output voltage falls below the OVP threshold and after a Fault Restart Delay (tFR_DLY). Over Temperature Protection The internal package temperature is monitored to prevent internal components from reaching their thermal maximum. If the Over Temperature Protection threshold is exceeded (TOTP), the regulator will complete the current switching cycle, enter a low power mode, pull down on the FLT pin, and will soft-start when the internal temperature decreases by more than the Over Temperature Restart Hysteresis (TOTP_HYS). Pulse Skip Mode (PSM) PI3751-00 features a hysteretic Pulse Skip Mode to achieve high efficiency at light loads. The regulator is setup to skip pulses if VEAO falls below the Pulse Skip Threshold (VEAO_PST). Depending on conditions and component values, this may result in single pulses or several consecutive pulses followed by skipped pulses. Skipping cycles significantly reduces gate drive power and improves light load efficiency. The regulator will leave Pulse Skip Mode once the control node rises above the Pulse Skip Mode threshold (VEAO_PST). Variable Frequency Operation The PI3751-00 is preprogrammed to a fixed, maximum base operating frequency. The frequency is selected with respect to the required power stage inductor to operate at peak efficiency across line and load variations. The switching frequency period will stretch as needed during each cycle to accommodate low line and or high load conditions. By stretching the switching frequency period, thus decreasing the effective switching frequency, the ZVS operation is preserved throughout the input line voltage range maintaining optimum efficiency. Cool-Power® Rev 1.0 vicorpower.com Page 12 of 28 12/2014 800 927.9474 PI3751-00 Applications Information The PI3751-00 is strictly intended for use as a regulation stage in a Factorized Power Architecture™ (FPA) system. The PI3751-00 is configured for very high peak power capability optimized for high voltage computing power applications. As such, the internal error amplifier is optimized for low noise rather than speed since this type of application uses a VRx controller that overrides the internal error amplifier output through a special level shifting circuit. In addition, the internal protection circuitry is adjusted to allow very high peak transient performance. The application specific nature of the PI3751-00 may not be the best solution for a general purpose power supply. There are other members of the PI37xx family better suited for general purpose use. The following three paragraphs describe the configuration of the internal error amplifier if it must be used in a stand alone configuration for test or evaluation purposes. Buck Boost Configuration of EAIN Pin When using the PI3751-00 a resistive divider is required to define the output voltage and should be connected between the output voltage regulation point and the EAIN pin of the PI3751-00 and the SGND terminal. The PI3751-00 will regulate the output voltage in order to maintain the EAIN pin at 1.7 V. Typically a small capacitor of 56 pF is recommended from EAIN to SGND to filter out high frequencies from the control loop. The components connecting to EAIN and SGND should be placed close to the regulator, and the EAIN signal should not be routed long distances or near noise coupling sources. Buck Boost Configuration of EAO Pin The PI3751-00 contains a high performance transconductance amplifier for control loop compensation. A 56 pF capacitor from EAO to SGND is required to set the high frequency pole. The components connecting to EAO and SGND should be placed close to the regulator, and the EAO signal must not be routed long distances or near noise coupling sources. Stability Considerations The PI3751-00 powertrain small signal (plant) response consists of a single pole determined by the load resistance, the powertrain equivalent output resistance, and the total output capacitance (internal and external to the module). Both the modulator gain and the equivalent output resistance vary as a function of line, load, output voltage and mode of operation. When the load increases within a given mode of operation (discontinuous or critical conduction mode), the power train pole moves to a higher frequency relative to where it was at the previous load. As a result, the closed loop crossover frequency will increase with higher load and decrease with lower load within each mode of operation, with the highest crossover frequency occurring at the boundary between discontinuous and critical conduction mode. Figure 5 shows a reference AC small-signal model. The output voltage set point is a function of the voltage reference and the output voltage sense ratio. With reference to Figure 6, R1 and R2 form the output voltage sensing divider which provides the scaled output voltage to the negative input of the error amplifier; a dedicated reference IC provides the reference voltage to the positive input of the error amplifier. Under normal operation, the error amplifier will keep the voltages at the inverting and non-inverting inputs equal, and therefore the output voltage is defined by: VOUT = VVID • R1 + R2 R2 Note that the component R1 will also factor into the compensation as described in a later section. Buck Boost Configuration of COMP Pin The PI3751-00 contains a high performance transconductance amplifier for control loop compensation. A 4.7 nF capacitor from COMP to SGND is required to set the compensation mid band zero and pole pair. The components connecting to COMP and SGND should be placed close to the regulator, and the COMP signal must not be routed long distances or near noise coupling sources. Cool-Power® Rev 1.0 vicorpower.com Page 13 of 28 12/2014 800 927.9474 PI3751-00 VIN rEQ_IN CIN_INT gIN*VEAO VOUT gMOD*VEAO COUT_INT rEQ_OUT Figure 5 — PI3751-00 AC Small Signal Model C2 COMP Vout R3 FB R1 R2 C1 Level Shift A(s) VID + + A(s) - EAO Error Amplifier 3V Reference PRM_VOUT ZVS_BB G_PRM COUT_EXT 3V Figure 6 — PI3751-00 Using External Error Amplifier And Level Shift Circuit Cool-Power® Rev 1.0 vicorpower.com Page 14 of 28 12/2014 800 927.9474 PI3751-00 In order to properly compensate the control loop, all components which contribute to the closed loop frequency response should be identified and understood. Figure 5 shows the AC small signal model for the module. Modulator DC gain Gmod and powertrain equivalent resistance rEQ_OUT are shown. These modeling parameters will support a design cut-off frequency up to 50 kHz. Standard Bode analysis should be used for calculating the error amplifier compensation and analyzing the closed loop stability. The recommended stability criteria are as follows: 1. Phase Margin > 45º : for the closed loop response, the phase should be greater than 45º where the gain crosses 0 dB. n Compensation Pole: 1 FP2 = R3 • C1• C2 2π• C1+ C2 and for FP2 >>FZ1 (C1 + C2 ≈ C1 ): FP2 = 1 (3) 2 π • R3 • C2 2. Gain Margin > 10 dB : The closed loop gain should be lower than 10 dB where the phase crosses 0º. Midband Gain Design (R1,R3): With reference to Figure 7: curve ABC is the: 3. Gain Slope = -20 dB / decade : The closed loop gain should have a slope of -20 dB / decade at the crossover frequency. n minimum output voltage in the application The compensation characteristics must be selected to meet these stability criteria. Refer to Figure 7 for a local sense, voltage-mode control example based on the configuration in Figure 6. In this example, it is assumed that the maximum crossover frequency (FCMAX ) has been selected to occur between B and C. Type-2 compensation (Curve IJKL) is sufficient in this case. The following data must be gathered in order to proceed: n Modulator Gain Gmod n maximum load PRM open loop response, and is where the maximum crossover frequency occurs. In order for the maximum crossover frequency to occur at the design choice FCMAX, the compensation gain must be equal and opposite of the powertrain gain at this frequency. For stability purposes, the compensation should be in the Mid-band (J-K) at the crossover. Using Equation (1), the mid-band gain can be selected appropriately. Compensation Zero Design (C1): With reference to Figure 7: curve EFG is the: n Powertrain equivalent resistance rEQ n Internal output capacitance n maximum output voltage in the application n External output capacitance value In the case of ceramic capacitors, the ESR can be considered low enough to push the associated zero well above the frequency of interest. Applications with high ESR capacitor may require a different type of compensation (Type-3), or cascade control. The system poles and zeros of the closed loop can then be defined as follows: n minimum input voltage expected in the application n minimum load in the application PRM open loop response, and is where the minimum crossover frequency FCMIN occurs. Based on stability criteria, the compensation must be in the mid-band at the minimum crossover frequency, therefore FCMIN will occur where EFG is equal and opposite of GMB . C1 can be selected using Equation (2) so that FZ1 occurs prior to FCMIN . High Frequency Pole Design (C2): Using Equation (3), C2 should be selected so that FP2 is at least one decade above FCMAX and prior to the gain bandwidth product of the operational amplifier (10 MHz for this example). For applications with a higher desired crossover frequency the use of a high gain bandwidth product amplifier may be necessary to ensure that the real pole can be set at least one decade above the maximum crossover frequency. n Powertrain pole, assuming the external capacitor ESR can be neglected: rEQ_OUT • RLOAD RCOUT_EXT << n maximum input voltage expected in the application rEQ_OUT + RLOAD n Main pole frequency: 1 FP ~ ~ 2π• rEQ_OUT • RLOAD rEQ_OUT + RLOAD ( ) • COUT_INT + COUT_EXT n Compensation Mid-Band Gain: GMB = 20 log R3 (1) R1 Verifying Stability: The preferred method for verifying stability is to use a network analyzer, measuring the closed loop response across various lines and load conditions. In the absence of a network analyzer, a load step transient response can be used in order to estimate stability. Figure 8 illustrates an example of a load step response. Equation (4) can be used to predict the phase margin based on the ratio of the “kick” to “droop” (as defined in Figure 8). n Compensation Zero: FZ1 = ( ) ( ) 1n 1 (2) 2 π • R3• C1 Φm ~ ~ 100 k 1n d Cool-Power® Rev 1.0 vicorpower.com Page 15 of 28 12/2014 800 927.9474 k d 2 (4) 2 +π 2 PI3751-00 Open Loop Gain vs. Frequency 80 10MHz GBW 60 I Compensation Gain 40 Gain (dB) F E PRM Open Loop PR op p Min Load 20 B A PRM Open Loop Max Load J K L FCMIN 0 FCMAX -20 C G -40 Frequency (Hz) Figure 7 — Reference asymptotic Bode plot for the considered system Rline > Lline (C IN_INT k + CIN_EXT )• r (5) EQ_IN Vout (6) Rline << rEQ_IN d time Iout time Figure 8 — Load step response example and “droop” vs. “kick” definition Input filter stability: The PI3751-00 PRM can provide very high dynamic transients. It is therefore very important to verify that the voltage supply source as well as the interconnecting line are stable and do not oscillate. For this purpose, the regulator dynamic input impedance magnitude rEQ_IN is provided in the performance section. It is recommended to provide adequate design margin with respect to the stability conditions illustrated in the previous section. Inductive source and local, external input decoupling capacitance with negligible ESR (i.e.: ceramic type) The voltage source impedance can be modeled as a series R (line) L (line) circuit. The high performance ceramic decoupling capacitors will not significantly damp the network because of their low ESR; therefore in order to guarantee stability the following conditions must be verified: It is critical that the line source impedance be at least an octave lower than the regulator dynamic input resistance, Equation (6). However, Rline cannot be made arbitrarily low otherwise Equation (5) is violated and the system will show instability, due to under-damped RLC input network. Inductive source and local, external input decoupling capacitance with significant RCIN_EXT ESR (i.e.:electrolytic type) In order to simplify the analysis in this case, the voltage source impedance can be modeled as a simple inductor Lline . Notice that, the high performance ceramic capacitors CIN_INT within the PI375100 PRM should be included in the external electrolytic capacitance value for this purpose. The stability criteria will be: (7) rEQ_IN > RCIN_EXT Lline CIN_INT • RCIN_EXT < rEQ_IN (8) Equation (8) shows that if the aggregate ESR is too small – for example by using very high quality input capacitors (CIN_EXT) – the system will be under-damped and may even become destabilized. Again, an octave of design margin in satisfying Equation (7) should be considered the minimum. Cool-Power® Rev 1.0 vicorpower.com Page 16 of 28 12/2014 800 927.9474 PI3751-00 Inductor Pairing TOP Operation and characterization of the PI3751-00 was performed using a 500nH inductor, part # FPV1507-500-R , manufactured by Eaton. This inductor has a form factor of 8 mm x 14 mm x 7 mm. No other inductor is recommended for use with the PI3751-00. For additional inductor information and sourcing please contact Eaton directly. R_TS R_JT JUNCTION R_JB R_BA Thermal Considerations The PI3751-00 cannot be characterized as a single thermal impedance over all operating conditions. The thermal heat loads inside the package are influenced by each other when line and load conditions change. Due to the compact nature of the design thermally, heat sources are both sourcing heat and sinking it as well. Therefore it is necessary to publish thermal impedance guidelines based on operational line and load conditions. Figure 9 shows a simplified thermal impedance model that can predict the maximum temperature of the highest temperature component for a given line and load condition. V_TSINK I_HL V_TPCB Figure 9 — PI3751-00 Thermal Impedance Model Where: R_JB is defined as the thermal impedance from the hottest component junction inside the PI3751-00 SiP to the circuit board it is mounted on assuming that board has a thermal impedance of zero. (an ideal sink). R_JT is defined as the thermal impedance from the hottest component junction inside the PI3751-00 to the top side of the package. R_BA is defined as the thermal impedance from the users circuit board to ambient temperature. R_TS is the thermal impedance between the top of the package and an ideal sink. The following equation can predict the junction temperature based on the heat load applied to the SiP and the known ambient conditions: Input Voltage Output Voltage R_JB in degrees C/W R_JT in degrees C/W 38 V 38 V 6.85 12.43 38 V 44 V 6.2 12.2 38 V 50 V 7.5 14 54 V 38 V 7.05 12.43 54 V 44 V 7.45 12.5 54 V 50 V 7.05 12.12 60 V 38 V 7.4 13.1 60 V 44 V 7.7 12.8 60 V 50 V 7.4 12.4 Table 1 — PI3751-00 Thermal Impedance Guidelines P_Diss + T_J = T_Ambient R_BA + R_JB 1 R_BA + R_JB + + T_Sink R_JT + R_TS 1 R_JT + R_TS Cool-Power® Rev 1.0 vicorpower.com Page 17 of 28 12/2014 800 927.9474 PI3751-00 Design and Performance Section Low Power State Low Power State Ready Fault Steering Restart Delay Latched Fault STATE . 0 STATE . 1 STATE . 2 STATE . 3 STATE . 4 STATE 5 OPERATE BUS _DSCH 4.0V VTM Fault– FLTB Low StepLoad PRM Delayed Restart Fault PRM UVLO Fault PRM OVLO Latched Fault Toggle EN to Restart 2.0V 0V -2.0V -4.0V V( VIN)/10 V ( VLOAD) V( PRM_EAO ) V( PRM_ FLT ) - 4 V( PRM_ EN ) - 4 Time Figure 10 — PRM-VTM Mode Fault Logic Using PI3751-00 gmod vs. Output Current vs. V(EAO) VOUT = 38 V 8.000 14 7.000 12 6.000 10 5.000 8 4.000 6 3.000 2.000 4 1.000 2 0.000 0 0.50 1.00 1.50 2.00 2.50 6 9.000 5 8.000 7.000 4 6.000 3 5.000 4.000 2 3.000 2.000 1 1.000 0.000 0.00 V(EAO) Volts 0 0.50 1.00 1.50 2.00 V(EAO) Volts IOUT @ VIN = 38 V gmod @ VIN = 38 V IOUT @ VIN = 38 V gIN @ VIN = 38 V IOUT @ VIN = 54 V gmod @ VIN = 54 V IOUT @ VIN = 54 V gIN @ VIN = 54 V IOUT @ VIN = 44 V gmod @ VIN = 44 V IOUT @ VIN = 44 V gIN @ VIN = 44 V IOUT @ VIN = 48 V gmod @ VIN = 48 V IOUT @ VIN = 48 V gIN @ VIN = 48 V Figure 11 — AC Small Signal Modulator Gain VOUT = 38 V Figure 12 — AC Small Signal GIN @ VOUT = 38 V Cool-Power® Rev 1.0 vicorpower.com Page 18 of 28 12/2014 800 927.9474 2.50 gIN S 16 10.000 Output Current DC Amps 9.000 0.00 gIN vs. Output Current vs. V(EAO) VOUT = 38 V 18 gm dBS Output Current DC Amps 10.000 PI3751-00 Design and Performance Section (Cont.) Output Current DC Amps 200 180 140 120 100 80 60 40 18 8.000 16 7.000 14 6.000 12 5.000 10 4.000 8 3.000 6 2.000 4 1.000 2 0.000 20 0.00 0 1 2 3 4 5 6 7 req_VIN = 44 V req_VIN = 48 V req_VIN = 54 V 8.000 5 7.000 4 6.000 5.000 3 4.000 3.000 2 2.000 1 1.000 0.000 Output Current DC Amps 6 gIN S Output Current DC Amps IOUT @ VIN = 38 V gmod @ VIN = 38 V IOUT @ VIN = 54 V gmod @ VIN = 54 V IOUT @ VIN = 44 V gmod @ VIN = 44 V rEQ_OUT vs. Output Current vs. V(EAO) VOUT = 44 V gIN vs. Output Current vs. V(EAO) VOUT = 44 V 1.00 1.50 2.00 9.000 40 8.000 35 7.000 30 6.000 25 5.000 20 4.000 15 3.000 2.000 10 1.000 5 0.000 0 0.00 2.50 0 0.50 1.50 2.00 IOUT @ VIN = 38 V gIN @ VIN = 38 V IOUT @ VIN = 38 V rEQ_OUT @ VIN = 38 V IOUT @ VIN = 54 V gIN @ VIN = 54 V IOUT @ VIN = 54 V rEQ_OUT @ VIN = 54 V IOUT @ VIN = 44 V gIN @ VIN = 44 V IOUT @ VIN = 44 V rEQ_OUT @ VIN = 44 V IOUT @ VIN = 48 V gIN @ VIN = 48 V IOUT @ VIN = 48 V rEQ_OUT @ VIN = 48 V gmod vs. Output Current vs. V(EAO) VOUT = 50 V Output Current DC Amps rEQ_IN vs. Ouput Current VOUT = 44 V 160 140 120 100 80 60 40 20 8.000 16 7.000 14 6.000 12 5.000 10 4.000 8 3.000 6 2.000 4 1.000 2 0.000 0.00 0 1 2 3 4 5 6 7 req_VIN = 54 V req_VIN = 44 V req_VIN = 48 V Figure 17 — rEQ_IN @ VOUT = 44 V 0.50 1.00 1.50 2.00 V(EAO) Volts 8 Output Current (Amps) req_VIN = 38 V 2.50 Figure 16 — rEQ_OUT @ VOUT = 44 V Figure 15 — AC Small Signal GIN @ VOUT = 44 V r EQ_IN (Ohms) 1.00 V(EAO) Volts V(EAO) Volts 0 0 2.50 Figure 14 — AC Small Signal Modulator Gain VOUT = 44 V 9.000 0.50 2.00 gmod @ VIN = 48 V Figure 13 — rEQ_IN @ VOUT = 38 V 0.00 1.50 V(EAO) Volts 8 Output Current (Amps) req_VIN = 38 V 1.00 Ohms 0 0.50 IOUT @ VIN = 38 V gmod @ VIN = 38 V IOUT @ VIN = 54 V gmod @ VIN = 54 V IOUT @ VIN = 44 V gmod @ VIN = 44 V IOUT @ VIN = 48 V gmod @ VIN = 48 V Figure 18 — AC Small Signal Modulator Gain VOUT = 50 V Cool-Power® Rev 1.0 vicorpower.com Page 19 of 28 12/2014 800 927.9474 0 2.50 gm dBS r EQ_IN (Ohms) 160 9.000 gm dBS gmod vs. Output Current vs. V(EAO) VOUT = 44 V rEQ_IN vs. Ouput Current VOUT = 38 V PI3751-00 Design and Performance Section (Cont.) gIN vs. Output Current vs. V(EAO) VOUT = 50 V rEQ_IN vs. Ouput Current VOUT = 50 V 7 120 7.000 6 6.000 100 4 4.000 r EQ_IN (Ohms) 5 5.000 gIN S Output Current DC Amps 8.000 3 3.000 2 2.000 1.000 1 0.000 0.00 0 0.50 1.00 1.50 2.00 80 60 40 20 2.50 0 V(EAO) Volts 0 IOUT @ VIN = 38 V gIN @ VIN = 38 V IOUT @ VIN = 54 V gIN @ VIN = 54 V IOUT @ VIN = 44 V gIN @ VIN = 44 V IOUT @ VIN = 48 V gIN @ VIN = 48 V No Load Power Dissipation Watts VDR Bias Current DC Amps VDR Bias Current vs. Ouput Current - VOUT = 44 V 0.1 0.08 0.06 0.04 0.02 0 2 3 4 5 3 4 6 7 8 I (Load) Amps 6 7 req_VIN = 38 V req_VIN = 44 V req_VIN = 54 V req_VIN = 48 V 8 I_VDR @ VIN = 38 V I_VDR @ VIN = 48 V I_VDR @ VIN = 54 V I_VDR @ VIN = 38 V No Load Power Dissipation - VOUT = 44 V 0.13 0.125 0.12 0.115 0.11 0.105 0 10 20 30 40 50 60 70 Input Voltage Volts No Load Power I_VDR @ VIN = 44 V Figure 22 — No Load Power Dissipation @ VOUT = 44 V Figure 21 — VDR Bias Current @ VOUT = 44 V PI3751 Thermal De-Rating @ 38 VOUT, 0 LFM, Board Cooling Only PI3751 Thermal De-Rating @ 38 VOUT, 0 LFM, Top Cooling Only 6.0 5.0 Output Load Current (A) Output Load Current (A) 5 Figure 20 — rEQ_IN @ VOUT = 50 V 0.12 1 2 Output Current (Amps) Figure 19 — AC Small Signal GIN @ VOUT = 50 V 0 1 5.0 4.0 3.0 2.0 1.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0.0 0 25 50 75 100 125 0 Ambient Temperature (°C) VIN = 38 V VIN = 54 V 50 75 100 125 Ambient Temperature (°C) VIN = 38 V VIN = 60 V Figure 23 — Thermal De-Rating @ VOUT = 38 V SiP PCB to Ideal Sink 25 VIN = 54 V VIN = 60 V Figure 24 — Thermal De-Rating @ VOUT = 38 V SiP Top to Ideal Sink Cool-Power® Rev 1.0 vicorpower.com Page 20 of 28 12/2014 800 927.9474 PI3751-00 Design and Performance Section (Cont.) PI3751 Thermal De-Rating @ 44 VOUT, 0 LFM, Board Cooling Only PI3751 Thermal De-Rating @ 44 VOUT, 0 LFM, Top Cooling Only 5.0 Output Load Current (A) Output Load Current (A) 6.0 5.0 4.0 3.0 2.0 1.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0.0 0 25 50 75 100 0 125 25 50 Ambient Temperature (°C) VIN = 38 V VIN = 54 V VIN = 38 V VIN = 60 V Figure 25 — Thermal De-Rating @ VOUT = 44 V SiP PCB to Ideal Sink 100 125 VIN = 54 V VIN = 60 V Figure 26 — Thermal De-Rating @ VOUT = 44 V SiP Top to Ideal Sink PI3751 Thermal De-Rating @ 50 VOUT, 0 LFM, Board Cooling Only PI3751 Thermal De-Rating @ 50 VOUT, 0 LFM, Top Cooling Only 6.0 5.0 Output Load Current (A) Output Load Current (A) 75 Ambient Temperature (°C) 5.0 4.0 3.0 2.0 1.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0.0 0 25 50 75 100 125 0 Ambient Temperature (°C) VIN = 38 V VIN = 54 V 25 50 75 100 125 Ambient Temperature (°C) VIN = 38 V VIN = 60 V VIN = 54 V VIN = 60 V Figure 27 — Thermal De-Rating @ VOUT = 50 V SiP PCB to Ideal Sink Figure 28 — Thermal De-Rating @ VOUT = 50 V SiP Top to Ideal Sink Figure 29 — Ex.1: VID 1.8 V, VTM Load Step 20 A to 164 A, Loading Frequency 50.12 kHz, Duty Cycle for High Current 10%, Load Slew Rate 550 A/µs Figure 30 — Ex.1: VID 1.8 V, VTM Load Step 20 A to 164 A, Loading Frequency 50.12 kHz, Duty Cycle for High Current 90%, Load Slew Rate 550 A/µs Cool-Power® Rev 1.0 vicorpower.com Page 21 of 28 12/2014 800 927.9474 PI3751-00 Design and Performance Section (Cont.) Figure 31 — Ex.3: VID 1.8 V, VTM Load Step 36 A to 180 A, Loading Frequency 199.53 kHz, Duty Cycle for High Current 50%, Load Slew Rate 550 A/µs Figure 32 — PI3751-00 Output Ripple with VTM @ 1.8 V 188 A Load Steady State 04/22/14 16:49:39 Mag [B/A] (dB) Modulator Gain, 54V, 1.8VID, 22A Phase [B-A] (deg) 50.000 225.000 40.000 180.000 30.000 135.000 20.000 90.000 10.000 45.000 0.000 0.000 -10.000 -45.000 -20.000 -90.000 -30.000 -135.000 -40.000 -180.000 -50.000 1 10 Frequency Magnitude Phase Var. Source 100 M1 20.51 Hz 39.658 dB -2.512 deg 176.92 mV -225.000 2 M2 822.05 Hz 36.679 dB -45.039 deg 18.50 mV 1k 10 k M2 - M1 801.53 Hz -2.979 dB -42.528 deg -158.42 mV Figure 33 — PI3751-00 Measured Modulator Gain @ VTM Output = 1.8 V 22 A Load Steady State Cool-Power® Rev 1.0 vicorpower.com Page 22 of 28 12/2014 800 927.9474 100 k 1M PI3751-00 Design and Performance Section (Cont.) 04/22/14 16:57:57 Mag [B/A] (dB) Modulator Gain, 54V, 1.8VID, 188A Phase [B-A] (deg) 50.000 225.000 40.000 180.000 30.000 135.000 20.000 90.000 10.000 45.000 0.000 0.000 -10.000 -45.000 -20.000 -90.000 -30.000 -135.000 -40.000 -180.000 -50.000 1 10 Frequency Magnitude Phase Var. Source 100 M1 20.51 Hz 31.490 dB 0.107 deg 176.92 mV -225.000 2 M2 3.61 kHz 29.155 dB -45.091 deg 47.31 mV 1k 10 k M2 - M1 3.59 kHz -2.335 dB -45.198 deg -129.61 mV Figure 34 — PI3751-00 Measured Modulator Gain @ VTM Ouptut = 1.8 V 188 A Load Steady State Cool-Power® Rev 1.0 vicorpower.com Page 23 of 28 12/2014 800 927.9474 100 k 1M PI3751-00 Design and Performance Section (Cont.) Temp -40 ºC -30 ºC -20 ºC -10 ºC 0 ºC 10 ºC 20 ºC 30 ºC 40 ºC 50 ºC 60 ºC 70 ºC 80 ºC 90 ºC 100 ºC 110 ºC 120 ºC 125 ºC MTBF (GF) 3.82E+9 2.29E+9 1.36E+9 7.98E+8 4.68E+8 2.75E+8 1.64E+8 9.85E+7 6.04E+7 3.78E+7 2.41E+7 1.57E+7 1.04E+7 7.06E+6 4.87E+6 Figure 35 — PI3751-00 Calculated MTBF Telcordia SR-332 GF Cool-Power® Rev 1.0 vicorpower.com Page 24 of 28 12/2014 800 927.9474 3.42E+6 2.45E+6 2.07E+6 PI3751-00 Package Drawings B // bbb C aaa C 4x 3 A2 A C E PIN 1 INDEX aaa C SEATING PLANE A1 SOLDER MASK PAD OPENING DETAIL A D A PACKAGE TOP VIEW ddd M C A B eee M C L DETAIL A MOLD CAP 2 SEE NOTES b ddd M C A B eee M C L SUBSTRATE PACKAGE SIDE VIEW PAD OPENING L1 b DETAIL B 1 SEE NOTES DATUM A e SYMBOL MIN NOM MAX DATUM B E1 DETAIL B e 1 D1 SEE NOTES PIN 1 INDEX PACKAGE BOTTOM VIEW A 2.49 2.56 2.63 A1 – – 0.04 A2 – – 2.59 b 0.50 0.55 0.60 L 0.50 0.55 0.60 D 14.00 BSC E 10.00 BSC D1 13.00 BSC E1 9.00 BSC e 1.00 BSC L1 NOTES 0.175 0.225 0.275 aaa 0.10 1 ‘e’ REPRESENTS THE BASIC TERMINAL PITCH. SPECIFIES THE TRUE GEOMETRIC POSITION OF THE TERMINAL AXIS. bbb 0.10 2 DIMENSION ‘b’ APPLIES TO METALLIZED PAD OPENING. ccc 0.08 3 DIMENSION ‘A’ INCLUDES PACKAGE WARPAGE. ddd 0.10 4 EXPOSED METALLIZED PADS ARE CU PADS WITH SURFACE FINISH PROTECTION. eee 0.08 5 ALL DIMENSIONS IN MILLIMETERS. DIMENSIONS Cool-Power® Rev 1.0 vicorpower.com Page 25 of 28 12/2014 800 927.9474 PI3751-00 Receiving PCB Pattern Design Recommendations Thermal Vias DATU M A 1mm DETAIL A DATU M B E1 DETAIL B 1mm D1 PIN 1A INDEX PACKAGE PCB FOOTPRINT TOP VIEW Exposed Cop per Package Outline 0.55mm (SMD) Solder Mask Over Copper SMD = Soldermask Defined Pads Solder Mask Over Board 0.55mm (SMD) ≥0.5mm ≥0.5mm ≥0.5mm 0.55mm (SMD) 0.55mm (SMD) ≥0.5mm 0.65mm (Cu Pad) 0.35mm 0.55mm (SMD) 0.65mm (Cu Pad) 0.55mm (SMD) 0.55mm (SMD) 0.55mm (SMD) 0.65mm (Cu Pad) DETAIL A DETAIL B Cool-Power® Rev 1.0 vicorpower.com Page 26 of 28 12/2014 800 927.9474 0.65mm (Cu Pad) Package Outline PI3751-00 Revision History Revision Date 1.0 12/11/14 Description Initial Release Page Number(s) n/a Cool-Power® Rev 1.0 vicorpower.com Page 27 of 28 12/2014 800 927.9474 PI3751-00 Vicor’s comprehensive line of power solutions includes high density AC-DC and DC-DC modules and accessory components, fully configurable AC-DC and DC-DC power supplies, and complete custom power systems. Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by Vicor for its use. Vicor makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication. Vicor reserves the right to make changes to any products, specifications, and product descriptions at any time without notice. Information published by Vicor has been checked and is believed to be accurate at the time it was printed; however, Vicor assumes no responsibility for inaccuracies. Testing and other quality controls are used to the extent Vicor deems necessary to support Vicor’s product warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. Specifications are subject to change without notice. Vicor’s Standard Terms and Conditions All sales are subject to Vicor’s Standard Terms and Conditions of Sale, which are available on Vicor’s webpage or upon request. Product Warranty In Vicor’s standard terms and conditions of sale, Vicor warrants that its products are free from non-conformity to its Standard Specifications (the “Express Limited Warranty”). This warranty is extended only to the original Buyer for the period expiring two (2) years after the date of shipment and is not transferable. UNLESS OTHERWISE EXPRESSLY STATED IN A WRITTEN SALES AGREEMENT SIGNED BY A DULY AUTHORIZED VICOR SIGNATORY, VICOR DISCLAIMS ALL REPRESENTATIONS, LIABILITIES, AND WARRANTIES OF ANY KIND (WHETHER ARISING BY IMPLICATION OR BY OPERATION OF LAW) WITH RESPECT TO THE PRODUCTS, INCLUDING, WITHOUT LIMITATION, ANY WARRANTIES OR REPRESENTATIONS AS TO MERCHANTABILITY, FITNESS FOR PARTICULAR PURPOSE, INFRINGEMENT OF ANY PATENT, COPYRIGHT, OR OTHER INTELLECTUAL PROPERTY RIGHT, OR ANY OTHER MATTER. This warranty does not extend to products subjected to misuse, accident, or improper application, maintenance, or storage. Vicor shall not be liable for collateral or consequential damage. Vicor disclaims any and all liability arising out of the application or use of any product or circuit and assumes no liability for applications assistance or buyer product design. Buyers are responsible for their products and applications using Vicor products and components. Prior to using or distributing any products that include Vicor components, buyers should provide adequate design, testing and operating safeguards. Vicor will repair or replace defective products in accordance with its own best judgment. For service under this warranty, the buyer must contact Vicor to obtain a Return Material Authorization (RMA) number and shipping instructions. Products returned without prior authorization will be returned to the buyer. The buyer will pay all charges incurred in returning the product to the factory. Vicor will pay all reshipment charges if the product was defective within the terms of this warranty. Life Support Policy VICOR’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS PRIOR WRITTEN APPROVAL OF THE CHIEF EXECUTIVE OFFICER AND GENERAL COUNSEL OF VICOR CORPORATION. As used herein, life support devices or systems are devices which (a) are intended for surgical implant into the body, or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness. Per Vicor Terms and Conditions of Sale, the user of Vicor products and components in life support applications assumes all risks of such use and indemnifies Vicor against all liability and damages. Intellectual Property Notice Vicor and its subsidiaries own Intellectual Property (including issued U.S. and Foreign Patents and pending patent applications) relating to the products described in this data sheet. No license, whether express, implied, or arising by estoppel or otherwise, to any intellectual property rights is granted by this document. Interested parties should contact Vicor's Intellectual Property Department. The products described on this data sheet are protected by the following U.S. Patents Numbers: RE40,072; 6,788,033; 7,154,250; 6,421,262; 8,669,744; and for use under: 6,984,965; 6,975,098. Vicor Corporation 25 Frontage Road Andover, MA 01810 USA Picor Corporation 51 Industrial Drive North Smithfield, RI 02896 USA email Customer Service: [email protected] Technical Support: [email protected] Cool-Power® Rev 1.0 vicorpower.com Page 28 of 28 12/2014 800 927.9474