Data Sheet

Cool-Power®
PI3302-03
11V to 36VIN, 5 Vout, 15A, Cool-Power ZVS Buck Regulator
Product Description
Features & Benefits
The PI3302-03 is a high efficiency, wide input range DC-DC
ZVS Buck Regulator integrating controller, power switches,
and support components all within a high density System-inPackage (SiP). The integration of a high performance ZeroVoltage Switching (ZVS) topology, within the PI3302-03 model,
increases point of load performance providing best in class power
efficiency. The PI3302-03 requires only an external inductor and
minimal capacitors to form a complete DC-DC switching mode
Buck Regulator.
• High Efficiency ZVS-Buck Topology
• Wide input voltage range of 11V to 36V
• Output power up to 75W
• Very fast transient response
• High accuracy pre-trimmed output voltage
• User adjustable soft-start & tracking
• Parallel capable with single wire current sharing
Device
PI3302-03-LGIZ
Output Voltage
IOUT Max
Set
Range
5.0V
3.3 to 6.5V
15A
• Input Over/Undevoltage Lockout (OVLO/UVLO)
• Output Overvoltage Protection (OVP)
• Overtemperature Protection (OTP)
• Fast and slow current limits
The ZVS architecture also enables high frequency operation while
minimizing switching losses and maximizing efficiency. The high
switching frequency operation reduces the size of the external
filtering components, improves power density, and enables very
fast dynamic response to line and load transients.
• -40°C to 125°C operating range (TJ)
*I2C is a trademark of NXP Semiconductors
• High efficiency systems
Applications
• Computing, Communications, Industrial,
Automotive Equipment
• High voltage battery operation
Package Information
• 10mm x 14mm x 2.6mm (LGA SiP)
Cool-Power®
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PI3302-03
Contents
Contents
Page
Contents
Page
Order Information
3
Application Description
10
Absolute Maximum Ratings
3
Output Voltage Trim
10
Block Diagram
3
Soft-Start Adjust and Tracking
11
Pin Description
4
Inductor Pairing
11
Package Pin-Out
4
Thermal Derating
12
Electrical Characteristics
5
I2C Operation
12
PI3302-03 (5.0VOUT ) Electrical Characteristics
7
Filter Considerations
12
PI3302-x0 (5.0VOUT ) Electrical Characteristics
8
Layout Guidelines
13
Functional Description
9
Recommended PCB Footprint and Stencil
14
Enable
9
Package Drawings
15
Remote Sensing
9
Revision History
16
Switching Frequency Synchronization
9
Warranty
17
Soft-Start
9
Output Voltage Trim
9
Output Current Limit Protection
9
Input Undervoltage Lockout
9
Input Overvoltage Lockout
9
Output Overvoltage Protection
9
Overtemperature Protection
10
Pulse Skip Mode (PSM)
10
Variable Frequency Operation
10
Parallel Operation
10
Cool-Power®
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PI3302-03
Order Information
Cool-Power
PI3302-03-LGIZ
Output Range
Set
Range
5.0V
3.3 to 6.5V
IOUT Max
Package
15A
10mm x 14mm 123-pin LGA
Transport
Media
TRAY
Absolute Maximum Ratings
Name
Rating
VIN
–0.7V to 36V
VS1
–0.7 to 36V, –4V for 5ns
SGND
100mA
PGD, SYNCO, SYNCI, EN, EAO, ADJ, TRK, ADR1, ADR2, SCL, SDA, REM
–0.3V to 5.5V / 5mA
VOUT
–1.5V to 21V
Storage Temperature
–65°C to 150°C
Operating Junction Temperature
–40°C to 125°C
Soldering Temperature for 20 seconds
245°C
ESD Rating
2kV HBM
Notes: At 25°C ambient temperature. Stresses beyond these limits may cause permanent damage to the device. Operation at these conditions or conditions
beyond those listed in the Electrical Specifications table is not guaranteed. All voltage nodes are referenced to PGND unless otherwise noted. Test conditions
are per the specifications within the individual product electrical characteristics.
Functional Block Diagram
Simplified Block Diagram
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PI3302-03
Pin Description
Pin Number
Pin Name
Description
SGND
Block 1
Signal ground: Internal logic ground for EA, TRK, SYNCI, SYNCO, ADJ and I2C (options) communication
returns. SGND and PGND are star connected within the regulator package.
PGND
Block 2
Power ground: VIN and VOUT power returns.
VIN
Block 3
Input voltage: and sense for UVLO, OVLO and feed forward ramp.
VOUT
Block 5
Output voltage: and sense for power switches and feed-forward ramp.
VS1
Block 4
Switching node: and ZVS sense for power switches.
PGD
A1
Power Good: High impedance when regulator is operating and VOUT is in regulation. May also be used
as “Parallel Good” – see applications section.
EAO
A2
Error amp output: External connection for additional compensation and current sharing.
EN
A3
Enable Input: Regulator enable control. Asserted high or left floating – regulator enabled;
Asserted low, regulator output disabled. Polarity is programmable via I2C interface.
REM
A5
Remote Sense: High side connection. Connect to output regulation point.
ADJ
B1
Adjust input: An external resistor may be connected between ADJ pin and SGND or VOUT to trim the
output voltage up or down.
TRK
C1
Soft-start and track input: An external capacitor may be connected between TRK pin and SGND to
decrease the rate of rise during soft-start.
NC
K3, A4
SYNCO
K4
Synchronization output: Outputs a low signal for ½ of the minimum period for synchronization of other
converters.
SYNCI
K5
Synchronization input: Synchronize to the falling edge of external clock frequency. SYNCI is a high
impedance digital input node and should always be connected to SGND when not in use.
SDA
D1
Data Line: I2C serial data line.
SCL
E1
Clock Line: I2C serial clock line.
ADR1
H1
Tri-state Address: Supports I2C addressing.
No Connect: Leave pins floating.
SYNCI
2
SYNCO
1
NC
Package Pin-Out
3
4
5
6
7
PGND
Block 2
8
9
10
11
12
13
SGND K
Block 1
J
Block 1: B2-4, C2-4, D2-3, E2-3, F1-3, G2-3, H2-3, J1-3, K1-2
14
VIN
Block 3
ADR1 H
Block 2: A8-10, B8-10, C8-10, D8-10, E4-10,
F4-10, G4-10, H4-10, J4-10, K6-10
ADR0 G
SGND F
Block 3: G12-14, H12-14, J12-14, K12-14
SCL E
SDA D
TRK C
VS1
Block 4
ADJ B
PGD A
REM
NC
EN
EAO
Cool-Power®
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Block 4: A12-14, B12-14, C12-14, D12-14, E12-14
Block 5: A6-7, B6-7, C6-7, D6-7
VOUT
Block 5
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PI3302-03
Electrical Characteristics
Specifications apply for the conditions -40°C < TJ < 125°C, VIN = 2 V, L1 = 185nH [1] unless other conditons are noted.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
11
24
36
V
Input Specifications
Input Voltage
VIN_DC
[7]
Input Current
IIN_DC
VIN = 24V, TC = 25°C, IOUT = 15A
Input Current At Output Short
(fault condition duty cycle)
IIN_Short
3.31
[2]
20
Disabled
2.0
Enabled (no load)
2.5
Input Quiescent Current
IQ_VIN
Input Voltage Slew Rate
VIN_SR
[2]
VOUT_DC
[2]
A
mA
mA
1
V/µs
5.08
V
6.5
V
Output Specifications
Output Voltage Total Regulation
4.92
[3][7]
Output Voltage Trim Range
Line Regulation
∆VOUT(∆VIN)
Load Regulation
∆VOUT(∆IOUT)
5.00
3.3
@ 25°C, 11V <VIN <36V
0.10
@ 25°C, 0.5A <IOUT <15A
0.10
%
44
mVp-p
Output Voltage Ripple
VOUT_AC
IOUT = 7.5A, COUT = 5 x 47µF 20MHz BW [4]
Continuous Output Current Range
IOUT_DC
[5][7]
Current Limit
IOUT_CL
%
15
18
A
A
Protection
VIN UVLO Start Threshold
VUVLO_START
9.6
10.4
10.87
V
VIN UVLO Stop Threshold
VUVLO_STOP
9.3
9.9
10.6
V
VIN UVLO Hysteresis
VUVLO_HYS
0.50
V
VIN OVLO Start Threshold
VOVLO_START
36.1
37.6
V
VIN OVLO Stop Threshold
VOVLO_STOP
37.0
38.4
V
VIN OVLO Hysteresis
VOVLO_HYS
0.8
V
VIN UVLO/OVLO Response Time
tf
500
ns
Output Over Voltage Protection
VOVP
Above VOUT
Over-Temperature Fault Threshold
TOTP
[2]
Over-Temperature Restart
Hysteresis
20
130
TOTP_HYS
135
%
140
°C
30
°C
0.800
MHz
36
ms
Timing
Switching Frequency
Fault Restart Delay
fS
[6]
tFR_DLY
Sync In (SYNCI)
Synchronization Frequency Range
∆fSYNCI
SYNCI Threshold
VSYNCI
Cool-Power®
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Relative to set switching frequency [3]
50
110
2.5
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%
V
PI3302-03
Electrical Characteristics
Specifications apply for the conditions -40°C < TJ < 125°C, VIN = 24V, L1 = 185nH [1] unless other conditons are noted.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Sync Out (SYNCO)
SYNCO High
VSYNCO_HI
Source 1mA
4.5
V
SYNCO Low
VSYNCO_LO
Sink 1mA
SYNCO Rise Time
tSYNCO_RT
20pF load
10
SYNCO Fall Time
tSYNCO_FT
20pF load
10
0.5
V
ns
ns
Soft Start and Tracking
TRK Active Input Range
0
VTRK
TRK Max Output Voltage
TRK Disable Threshold
Charge Current (Soft-Start)
Discharge Current (Fault)
Soft-Start Time
1.04
1.2
V
V
VTRK_OV
20
40
60
mV
ITRK
-70
-50
-30
µA
ITRK_DIS
tSS
CTRK = 0µF
6.8
mA
2.2
ms
Enable
High Threshold
VEN_HI
0.9
1
1.1
V
Low Threshold
VEN_LO
0.7
0.8
0.9
V
Threshold Hysteresis
VEN_HYS
100
200
300
mV
Enable Pull-Up Voltage
(floating, unfaulted)
VEN_PU
2
V
Enable Pull-Down Voltage
(floating, faulted)
VEN_PD
0
V
Source Current
IEN_SO
-50
µA
Sink Current
IEN_SK
50
µA
PGD
PGD Rising Threshold
PGD Falling Threshold
PGD Output Low
VPG_HI%
[2]
VPG_LO%
[2]
VPG_SAT
Sink = 4mA
79
85
91
% VOUT_DC
77
83
89
% VOUT_DC
0.4
V
[2]
[1] All
parameters reflect regulator and inductor system performance. Measurements were made using a standard PI3302-03 evaluation board with 3x4”
dimensions and 4 layer, 2oz copper. Refer to inductor pairing table within Application Description section for specific inductor manufacturer and value.
[2]
Regulator is assured to meet performance specifications by design, test correlation, characterization, and/or statistical process control.
[3]
Output current capability may be limited and other performance may vary from electrical characteristics when switching frequency or VOUT is modified.
[4]
Refer to Output Ripple plots.
[5]
Refer to Load Current vs. Ambient Temperature curves.
[6]
Refer to Switching Frequency vs. Load current curves.
[7]
VIN – VOUT must be 5V or more to avoid a minimum load requirement of 3mA. Regulator must be disabled if VIN – VOUT is less than 1V.
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PI3302-03
PI3302-03 (5.0VOUT) Electrical Characteristics
Efficiency (%)
95
90
85
80
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
IOUT (A)
12VIN
18VIN
24VIN
36VIN
Figure 4 — Transient Response: 3.75 to 11.25A, at 5A/µs
Figure 1 — Efficiency at 25°C
Switching Frequency (kHz)
900
800
700
600
500
400
300
200
100
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
IOUT (A)
12VIN
18VIN
24VIN
36VIN
Figure 2 — Switching Frequency vs. Load Current
Figure 5 — Transient Response: 0 to 15A, at 5A/µs
Figure 3 — Short Circuit Test
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PI3302-03
PI3302-03 (5.0VOUT) Electrical Characteristics
Output Load Current (A)
16
14
12
10
8
6
4
2
0
50
75
100
125
Ambient Temperature (°C)
12VIN
18VIN
24VIN
36VIN
Figure 9 — Load Current vs. Ambient Temperature, 200 LFM
Figure 6 — Output Ripple: 24VIN, 5.0VOUT at 7.5A
Output Load Current (A)
16
14
12
10
8
6
4
2
0
50
75
100
125
Ambient Temperature (°C)
12VIN
Output Load Current (A)
16
14
12
10
8
6
4
2
0
75
100
125
Ambient Temperature (°C)
12VIN
18VIN
24VIN
36VIN
Figure 8 — Load Current vs. Ambient Temperature, 0 LFM
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24VIN
36VIN
Figure 10 — Load Current vs. Ambient Temperature, 400 LFM
Figure 7 — Output Ripple: 24VIN, 5.0VOUT at 15A
50
18VIN
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PI3302-03
Functional Description
The PI3302-03 is a highly integrated ZVS-Buck regulator.
The PI3302-03 has a set output voltage that can be trimmed
within a prescribed range shown on page 1. Performance and
maximum output current are characterized with a specific
external power inductor (see Table 4).
L1
VIN
CIN
VIN
PGND
PI33xx
VS1
VOUT
EAO
SGND
ADJ
EN
The PI3302-03 includes an internal soft-start capacitor to
control the rate of rise of the output voltage. See “Electrical
Characteristics” for the default value. Connecting an external
capacitor from the TRK pin to SGND will increase the start-up
ramp period. See, “Soft Start Adjustment and Track,” in the
Applications Description section for more details.
Output Voltage Trim
The PI3302-03 output voltage can be trimmed up from the
preset output by connecting a resistor from ADJ pin to SGND
and can be trimmed down by connecting a resistor from ADJ pin
to VOUT. The Table 1 defines the voltage range for
the PI3302-03.
TRK
SYNCO
Soft-Start
VOUT
COUT
REM
SYNCI
When using the internal oscillator, the SYNCO pin provides a 5V
clock that can be used to sync other regulators. Therefore, one
PI3302-03 can act as the lead regulator and have one additional
PI3302-03 running in parallel and interleaved.
Device
PI3302-03-LGIZ
Figure 11 — ZVS Buck-Boost with required components
For basic operation, Figure 11 shows the connections and
components required. No additional design or settings
are required.
ENABLE (EN)
EN is the enable pin of the converter. The EN Pin is referenced
to SGND and permits the user to turn the regulator on or off.
The EN default polarity is a positive logic assertion. If the EN pin
is left floating or asserted high, the converter output is enabled.
Pulling EN pin below 0.8VDC with respect to SGND will disable
the regulator output.
Remote Sensing
An internal 100Ω resistor is connected between REM pin and
VOUT pin to provide regulation when the REM connection is
broken. Referring to Figure 11, it is important to note that L1 and
Cout are the output filter and the local sense point for the power
supply output. As such, the REM pin should be connected at
COUT as the default local sense connection unless remote sensing
to compensate additional distribution losses in the system. The
REM pin should not be left floating.
Switching Frequency Synchronization
The SYNCI input allows the user to synchronize the controller
switching frequency by an external clock referenced to SGND.
The external clock can synchronize the unit between 50% and
110% of the preset switching frequency (fS). The PI3302-03
default for SYNCI is to sync with respect to the falling edge of
the applied clock providing 180° phase shift from SYNCO. This
allows for the paralleling of two PI3302-03 devices without the
need for further user programming or external sync
clock circuitry.
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Output Voltage
Set
Range
5.0V
3.3 to 6.5V
Table 1 — PI3302-03 output adjustment range
Output Current Limit Protection
PI3302-03 has two methods implemented to protect from
output short or over current condition.
Slow Current Limit protection: prevents the output load from
sourcing current higher than the regulator’s maximum rated
current. If the output current exceeds the Current Limit (IOUT_CL)
for 1024µs, a slow current limit fault is initiated and the regulator
is shutdown which eliminates output current flow. After Fault
Restart Delay (tFR_DLY ), a soft-start cycle is initiated. This restart
cycle will be repeated indefinitely until the excessive load is
removed.
Fast Current Limit protection: PI3302-03 monitors the
regulator inductor current pulse-by-pulse to prevent the output
from supplying very high current due to sudden low impedance
short. If the regulator senses a high inductor current pulse, it will
initiate a fault and stop switching until Fault Restart Delay ends
and then initiate a soft-start cycle.
Input Undervoltage Lockout
If VIN falls below the input Undervoltage Lockout (UVLO)
threshold, but remains high enough to power the internal bias
supply, the PI3302-03 will complete the current cycle and stop
switching. The system will restart once the input voltage is
reestablished and after the Fault Restart Delay.
Input Overvoltage Lockout
If VIN exceeds the input Overvoltage Lockout (OVLO) threshold
(VOVLO), while the controller is running, the PI3302-03 will
complete the current cycle and stop switching. The system will
resume operation after the Fault Restart Delay.
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PI3302-03
Output Overvoltage Protection
Parallel Operation
The PI3302-03 is equipped with output Overvoltage Protection
(OVP) to prevent damage to input voltage sensitive devices. If
the output voltage exceeds 20% of its set regulated value, the
regulator will complete the current cycle, stop switching and
issue an OVP fault. The system will resume operation once the
output voltage falls below the OVP threshold and after Fault
Restart Delay.
Paralleling modules can be used to increase the output current
capability of a single power rail and reduce output voltage ripple.
Overtemperature Protection
By connecting the EAO pins and SGND pins of each module
together the units will share the current equally. When the TRK
pins of each unit are connected together, the units will track
each other during soft-start and all unit EN pins have to be
released to allow the units to start (See Figure 12). Also, any fault
event in any regulator will disable the other regulators. The two
regulators will be out of phase with each other reducing output
ripple (refer to Switching Frequency Synchronization).
The internal package temperature is monitored to prevent
internal components from reaching their thermal maximum.
If the Over Temperature Protection Threshold (OTP) is exceeded
(TOTP), the regulator will complete the current switching cycle,
enter a low power mode, set a fault flag, and will soft-start when
the internal temperature falls below Overtemperature Restart
Hysteresis (TOTP_HYS).
Pulse Skip Mode (PSM)
PI3302-03 features a PSM to achieve high efficiency at light
loads. The regulators are setup to skip pulses if EAO falls below
a PSM threshold. Depending on conditions and component
values, this may result in single pulses or several consecutive
pulses followed by skipped pulses. Skipping cycles significantly
reduces gate drive power and improves light load efficiency. The
regulator will leave PSM once the EAO rises above the
Skip Mode threshold.
Variable Frequency Operation
Each PI3302-03 is preprogrammed to a base operating
frequency, with respect to the power stage inductor
(see Table 3), to operate at peak efficiency across line and
load variations. At low line and high load applications, the
base frequency will decrease to accommodate these extreme
operating ranges. By stretching the frequency, the ZVS operation
is preserved throughout the total input line voltage range
therefore maintaining optimum efficiency.
VIN
VIN
CIN
R1
SYNCO(#2)
SYNCI(#2)
EN(#2)
PGND
PGD
SYNCI
VS1
PI33xx
(#1)
EAO
TRK
PGND
PGD
SYNCI(#1)
EN(#1)
SYNCI
With a single resistor connected from the ADJ pin to SGND
or REM, a device’s output can be varied above or below the
nominal set voltage. The remote pin (REM) should always be
connected to the VOUT pin, if not used, to prevent an output
voltage offset. Figure 13 shows the internal feedback voltage
divider network.
COUT
REM
VOUT
R4
REM
L1
R1
VS1
VOUT
PI33xx
(#2)
COUT
+
REM
1.0 Vdc
SYNCO
EN
EAO(#1)
EAO
TRK(#1)
TRK
ADJ
SGND
Figure 13 — Internal resistor divider network
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Rlow
Rhigh
R2
SGND
Figure 12 — PI3302-03 parallel operation
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Output Voltage Trim
SGND
VIN
SYNCO(#1)
Application Description
EN
TRK(#2)
CIN
VOUT
To provide synchronization between regulators over the entire
operational frequency range, the Power Good (PGD) pin must be
connected to the lead regulator’s (#1) SYNCI pin and a
2.5kΩ Resistor, R1, must be placed between SYNCO (#2) return
and the lead regulator’s SYNCI (#1) pin, as shown in Figure 12. In
this configuration, at system soft-start, the PGD pin pulls SYNCI
low forcing the lead regulator to initialize the open-loop startup
synchronization. Once the regulators reach regulation, SYNCI is
released and the system is now synchronized in a closed-loop
configuration which allows the system to adjust, on the fly, when
any of the individual regulators begin to enter variable frequency
mode in the loop.
SYNCO
EAO(#2)
VIN
L1
VOUT
The PI3302-03 default for SYNCI is to sync with respect to the
falling edge of the applied clock providing 180° phase shift from
SYNCO. This allows for the paralleling of two PI3302-03 devices
without the need for further user programming or external sync
clock circuitry.
PI3302-03
R1, R2, and R4 are all internal 1.0% resistors and Rlow and R_
high are external resistors which the designer can add to modify
VOUT to a desired output. The internal resistor value for each
regulator is listed below in Table 2.
VOUT 1
VOUT 2
Conditions
R1
R2
R4
PI3302-03-LGIZ
4.53 K
1.13k
100
(a)
Master VOUT
Table 2 — PI3302-03 Internal divider values
VOUT 2
By choosing an output voltage value within the ranges stated in
Table 1, VOUT can simply be adjusted up or down by selecting the
proper Rhigh or Rlow value, respectively. The following equations
can be used to calculate Rhigh an Rlow values:
(b)
+
Figure 14 — PI3302-03 tracking methods
For Direct Tracking, choose the PI3302-03 or power supply with
the highest output voltage as the master and connect the master
output voltage to the TRK pin of the other PI3302-03 regulator(s)
through a divider (Figure 15) with the same ratio as the slave’s
feedback divider (see Table 2 for values).
Soft-Start Adjust and Tracking
The TRK pin offers a means to increase the regulator’s soft-start
time or to track with additional regulators. The soft-start slope
is controlled by an internal capacitor and a fixed charge current
to provide a Soft-Start Time tSS for all PI3302-03 regulators. By
adding an additional external capacitor to the TRK pin, the softstart time can beincreased further. The following equation can
be used to calculate the proper capacitor for a desired soft-start
times:
CTRK = (tTRK x ITRK) – 100 x
Master VOUT
R1
PI33xx
TRK
Slave
10–9,
R2
SGND
Where, tTRK is the soft-start time and ITRK is a 50µA internal
charge current (see Electrical Characteristics for limits).
There is typically either proportional or direct tracking
implemented within a design. For proportional tracking between
several regulators at startup, simply connect all PI3302-03 device
TRK pins together. This type of tracking will force all connected
regulators to startup and reach regulation at the same time (see
Figure 14).
Figure 15 — Voltage divider connections for direct tracking
All connected PI3302-03 regulator soft-start slopes will track
with this method. Direct tracking timing is demonstrated in
Figure 14b. All tracking regulators should have their Enable (EN)
pins connected together to work properly.
Inductor Pairing
The PI3302-03 utilizes an external inductor. This inductor has
been optimized for maximum efficiency performance. Table 3
details the specific inductor value and part number utilized for
the PI3302-03 device and is available from Eaton Corp.
Device
Inductor
(nH)
Inductor
Part Number
Manufacturer
PI3302-03
185
FP1507R1-R185-R
Eaton Corp.
Table 3 — PI3302-03 Inductor pairing
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PI3302-03
Thermal Derating
Filter Considerations
Thermal de-rating curves are provided that are based on
component temperature changes versus load current, input
voltage and air flow. It is recommended to use these curves as a
guideline for proper thermal de-rating. These curves represent
the entire system and are inclusive to both the Picor regulator
and the external inductor. Maximum thermal operation is limited
by either the MOSFETs or inductor depending upon line and
load conditions.
The PI3302-03 requires low impedance ceramic X5R input
capacitors to ensure proper start up and high frequency
decoupling for the power stage. The PI3302-03 will draw nearly
all of the high frequency current from the low impedance
ceramic capacitors when the main high side MOSFET is
conducting. During the time the high side MOSFET is off, they
are replenished from the source. If the source impedance is high
at the switching frequency of the converter, a bulk capacitor may
be necessary. This value has been chosen to be 100µF so that
the PI3302-03 can start up into a full resistive load and supply
the output capacitive load with the default minimum soft start
capacitor when the input source impedance is 50 Ohms at 1MHz.
If it is used, it should be decoupled from the ceramic capacitors
using a 200nH inductor rated for the maximum input current. A
parallel damping resistor of 1 Ohm is also recommended. Table
4 shows the recommended input and output capacitors to be
used for the PI3302-03 as well as expected transient response,
RMS ripple currents per capacitor, and input and output ripple
voltages. Table 5 includes the recommended input and output
ceramic capacitors.
Thermal measurements were made using a standard
PI3302-03 Evaluation board which is 3x4 inches in area and uses
4-layer, 2oz copper. Thermal measurements were made on the
three main power devices, the two internal MOSFETs and the
external inductor, with air flows of 0, 200, and 400 LFM.
I2C Operation
The PI3302-03 provides an I2C digital interface that enables
the user to program EN pin polarity, frequency synchronization
phase/delay, dynamic margining and fault monitoring. The fault
telemetry that can be monitored is:
n
Input under and over voltage (UV/OV)
n
Output voltage too high
n
Fast and slow current limit
n
Over temperature protection
Please refer to PI33XX-2X I2C Digital Interface Guide for details.
Device
VIN
(V)
ILOAD
(A)
CINPUT
Ceramic
X5R
CINPUT
Bulk
Elec.
COUTPUT
Ceramic
X5R
CINPUT
Ripple
Current
(IRMS)
COUTPUT
Ripple
Current
(IRMS)
Input
Ripple
(mVpp)
Output
Ripple
(mVpp)
PI3302-03
24
15
4 x 4.7µF
50V
100µF
50V
6 X 10µF
1.2
1.5
220
60
Transient Recovery
Deviation
Time
(mVpk)
(µs)
-/+170
30
Load
Step
(A)
(Slew/µs)
7.5
(5A/µs)
Table 4 — Recommended input and output capacitance
Part Number
Description
Part Number
Description
GRM188R71C105KA12D - Murata
1µF 16V 0603 X7R
C3216X5R1H106K160AB - TDK
10µF 50V 1206 X7R
GRM319R71H104KA01D - Murata
0.1µF 50V 1206 X7R
GRM31CR61A476ME15L - Murata
47µF 10V 1206 X5R
Table 5 — Recommended capacitor types
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PI3302-03
Layout Guidelines
To optimize maximum efficiency and low noise performance
from a PI3302-03 design, layout considerations are necessary.
Reducing trace resistance and minimizing high current loop
returns along with proper component placement will contribute
to optimized performance.
A typical buck converter circuit is shown in Figure 16. The
potential areas of high parasitic inductance and resistance are
the circuit return paths, shown as LR below.
When Q1 is on and Q2 is off, the majority of CIN’s current is used
to satisfy the output load and to recharge the COUT capacitors.
When Q1 is off and Q2 is on, the load current is supplied by the
inductor and the COUT capacitor as shown in Figure 18. During
this period CIN is also being recharged by the VIN. Minimizing CIN
loop inductance is important to reduce peak voltage excursions
when Q1 turns off. Also, the difference in area between the CIN
loop and COUT loop is vital to minimize switching and GND noise.
VIN
VIN
CIN
COUT
CIN
COUT
Figure 16 — Typical Buck Converter
The path between the COUT and CIN capacitors is of particular
importance since the AC currents are flowing through both of
them when Q1 is turned on. Figure 17, schematically, shows the
reduced trace length between input and output capacitors. The
shorter path lessens the effects that copper trace parasitics can
have on the PI3302-03 performance.
Figure 18 — Current flow: Q2 closed
The recommended component placement, shown in Figure 19,
illustrates the tight path between CIN and COUT (and VIN and
VOUT ) for the high AC return current. This optimized layout is
used on the PI3302-03 evaluation board.
VOUT
VIN
COUT
CIN
GND
CIN
COUT
VIN
VSW
GND
Figure 17 — Current flow: Q1 closed
Figure 19 — Recommended component placement and
metal routing
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PI3302-03
Recommended PCB Footprint and Stencil
Figure 20 — Details the recommended receiving footprint for PI3302-03 10mm x 14mm package. All pads should have a final copper size
of 0.55mm x 0.55mm, whether they are solder-mask defined or copper defined, on a 1mm x 1mm grid. All stencil
openings are 0.45mm when using either a 5 mil or 6 mil stencil.
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PI3302-03
LGIZ Package Drawing
DIMESIONAL REFERENCES
REF.
MIN
NOM
2.50
2.56
A
A1
A2
0.50
0.55
b
L
0.50
0.55
14.00 BSC
D
10.00 BSC
E
13.00 BSC
D1
9.00 BSC
E1
e
1.00 BSC
0.10
0.15
L1
aaa
bbb
ccc
ddd
eee
Cool-Power®
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MAX
2.62
0.05
2.57
0.60
0.60
0.20
0.10
0.10
0.08
0.10
0.08
PI3302-03
Revision History
Revision
Date
1.0
05/05/2016
Initial Release
1.1
05/13/2016
Change PGD description
Cool-Power®
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Description
05/2016
Page Number(s)
n/a
4 & 10
vicorpower.com
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PI3302-03
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email
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