Application Note Rev. 1.02 / July 2015 ZSC31050 Two-Wire Current-Loop Output Multi-Market Sensing Platforms Precise and Deliberate ZSC31050 Two-Wire Current-Loop Output Contents 1 2 3 Introduction .......................................................................................................................................................... 3 The ZSC31050 with 4-to-20mA Current Loop Output ......................................................................................... 3 Setup and Evaluation of Current Loop Configuration ......................................................................................... 5 3.1. Setup for Two-Wire Current Loop Evaluation Using the ZSC31050 SSC Evaluation Kit ............................ 5 4 Calibration of the Current Loop ........................................................................................................................... 7 5 Communication via Current Loop for Calibration .............................................................................................. 14 6 Test of Communication via Current Loop .......................................................................................................... 16 7 Schematics for Three-Wire Current-Loop Applications ..................................................................................... 17 8 Related Documents ........................................................................................................................................... 18 9 Glossary ............................................................................................................................................................ 18 10 Document Revision History ............................................................................................................................... 19 List of Figures Figure 2.1 Figure 3.1 Figure 3.2 Figure 4.1 Figure 4.2 Figure 4.3 Figure 4.4 Figure 4.5 Figure 4.6 Figure 5.1 Figure 5.2 Figure 6.1 Figure 7.1 Figure 7.2 2 Schematic of the ZSC31050’s Current Loop Output Stage with Communication via I C™ Interface ... 3 2 Schematic of I C™ Communication with a Current Loop Output Module ............................................. 5 Evaluation of a Current Loop Output Module using the ZSC31050 Evaluation Board V3.0 ................. 6 4mA to 20mA Interface Fine Tuning ...................................................................................................... 7 Step 1: Configuration and Pre-Adjustment of Current-Loop Output Mode ............................................ 9 Step 2: Transfer the Pre-Adjustments to the RAM and EEPROM ...................................................... 10 Step 3a: Adjustment of the External Current-Loop Circuitry ............................................................... 11 Step 3b: Adjustment of the External Current-Loop Circuitry with External DMM Readout ................. 12 Step 4: Calibration using the Re-calculated Target Values ................................................................. 13 Schematic of the ZSC31050’s Current Loop Output Stage with Communication via ZACwire™ ....... 14 Example for Initialization of ZACwire™ Communication via the Current Loop Interface .................... 15 Schematic for the Adaptation Circuitry for Current Loop Communication ........................................... 16 Load Referenced to GND .................................................................................................................... 17 Load Referenced to Positive Supply VS .............................................................................................. 17 List of Tables Table 3.1 Table 5.1 Settings on the Board Needed to Enable the Output Mode .................................................................. 5 Signal Coding....................................................................................................................................... 14 For more information, contact ZMDI via [email protected]. Application Note July 9, 2015 © 2011 Zentrum Mikroelektronik Dresden AG — Rev. 1.02 All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice. 2 of 19 ZSC31050 Two-Wire Current-Loop Output 1 Introduction This application note covers the principles of a two-wire current-loop output for the ZSC31050 sensor signal conditioner IC and provides examples of output circuits and information about the calibration procedure. The analog current loop is a typical output signal configuration, especially for industrial sensors. Using only two wires, the sensor is supplied with power and transmits its output signal to the processing unit. This saves cost, offers a very robust signal transmission in terms of EMI, and provides a connection check of the sensor module via the “life zero” behavior of the output signal’s range of 4 to 20 mA. When the ZSC31050 is used in current-loop mode, a buffer is used in the output signal path, which is not offsetcompensated. Tolerances of the required external elements cause additional errors, especially for the 50Ω current sense resistor (see Figure 2.1). An “over-all” calibration can remove such errors. 2 The ZSC31050 with 4-to-20mA Current Loop Output The ZSC31050’s analog output stage is configurable for controlling a current-loop output signal via EEPROM settings. As a result, fewer external parts are needed and the parts are less expensive. See Figure 2.1 for an illustration of the functionality of this configuration: Figure 2.1 2 Schematic of the ZSC31050’s Current Loop Output Stage with Communication via I C™ Interface IIC<3.5mA VDDA = 5 VDC ZSC31050 10nF VDDA ZD1 7.5V 100nF R9* VGATE TR1 R2** OUT SCL Communication Module (I²CTM) (e.g., ZMDI’s SSC Communication Board) Positive 2.2kΩ OUTBUF TR2 SDA 220pF ITR R9* VDAC R2** 150Ω FBN VSS * The two internal resistors marked R9 are matched. **The two internal resistors marked R2 are matched. ICL VSS Current Loop IIC 50Ω Negative FBP ICL The 2.2kΩ resistor and the 220pF capacitor are not needed for the main functionality but are useful for protecting the ZSC31050’s analog output OUT from over-voltage (e.g., due to ESD) and for suppressing noise. The Zener diode ZD1 (7.5V) protects the VDDA line from positive over-voltage and protects the FBP input of the ZSC31050 from negative over-voltage (e.g., caused by the response time of the internal VDDA regulator after power-on). Recommended types for TR1 include the BSS169 or DN3545; for TR2, the BCX56-10 can be used. Application Note July 9, 2015 © 2011 Zentrum Mikroelektronik Dresden AG — Rev. 1.02 All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice. 3 of 19 ZSC31050 Two-Wire Current-Loop Output The communication module’s power supply must be isolated from the current loop for proper operation via the 2 I C™* interface. The ZSC31050’s 11-bit digital-to-analog converter (DAC) is controlled by an internal calibration microcontroller 11 (CMC) using the normalized and inverted value (1 – P11/ 2 ) of the digital 11-bit value P11, which represents the 11 MSBs of the digital 15-bit output signal P. Therefore, its analog output voltage VDAC can be calculated with equation (1). P VDAC VDDA 1 11 11 2 (1) Based on this equation and on the fact that all voltages are referenced to VSS, the loop current ICL can be calculated with equation (2). ICL P11 211 VDDA 9 50 2 (2) To ensure that IIC < 3.5 mA (includes supply current of the transducer to be conditioned) within the operational temperature range, the ZSC31050’s bias current level is adjusted during final test to the optimal value for proper operation of the analog front-end before delivery. Therefore the individual default values stored in bits 4 to 6 of EEPROM register C1HEX/28DEC must be left unchanged to ensure operation in current loop mode within specifications. For more details, refer to the ZSC31050 Techical Note – EEPROM Changes Bias Adjustment (see section 8). Adjusting the clock to a frequency of <1.2MHz is recommended to minimize the current consumption of the ZSC31050’s digital section to the required level in current-loop output mode. * I2C™ is a trademark of NXP. Application Note July 9, 2015 © 2011 Zentrum Mikroelektronik Dresden AG — Rev. 1.02 All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice. 4 of 19 ZSC31050 Two-Wire Current-Loop Output 3 Setup and Evaluation of Current Loop Configuration The ZSC31050 current loop application can be verified with ZMDI’s ZSC31050 SSC Evaluation Kit, user-provided customized hardware, or a combination. The user’s customized ZSC31050-based sensor module can be connected directly to the kit’s SSC Communication Board (SSC CB) to connect to the user’s computer running the ZSC31050 Evaluation Software or user software. Alternately, the current loop configuration can be evaluated by mounting the ZSC31050 on the kit’s SSC Evaluation Board (SSC EB) and communicating via the SSC CB. The required additional user-customized hardware can be connected to the SSC EB or the SSC CB via the interface and GND pins on the boards (see the example in Figure 3.1). Figure 3.1 2 Schematic of I C™ Communication with a Current Loop Output Module Sensor Module with Current Loop LOOP+ Supply Voltage (7 to 40 VDC) (Partial Circuit) VDDA mA VGATE SCL SDA ZSC31050 Customized Hardware with I2C™ or Communication Board (CB) of ZSC31050KIT mA Meter SCL SCL Pin SDA Pin SDA VSS LOOP GND VSS 3.1. Setup for Two-Wire Current Loop Evaluation Using the ZSC31050 SSC Evaluation Kit When using the ZSC31050 Evaluation Kit, an evaluation of the current loop configuration is supported by the kit’s hardware directly. Only an external current loop supply and a mA-meter are needed to setup a current loop application. Refer to Table 3.1 and Figure 3.2 for the correct setup of the jumpers and switches on the ZSC31050 SSC Evaluation Board V3.0. Table 3.1 gives an overview of the settings on the ZSC31050 SSC Evaluation Board needed to enable the output mode to be evaluated. For this application, use the “2-Wire Current Loop” settings. Table 3.1 Settings on the Board Needed to Enable the Output Mode Power Supply ZSC31050 Output Mode CB-KS5V CB-KS12V 2-Wire Current Loop (4 to 20 mA) Ratiometric K15 K17 K19 Slide Switch S1 Position OUT-5V Open Shorted Current 5P-VDDA OUT-5V Open Open Voltage Via KL3 12P-VDDA OUT-5V Shorted if CB-KS12V Open Voltage Shorted Voltage ext. K12 Via KL3 12P-VDDA Via K1 Non-ratiometric (0-5)V Jumper Settings Via K1 Open if ext. Non-ratiometric (0-10)V Via K1 Via KL3 12P-VDDA OUT-10V Shorted if CB-KS12V Open if ext. Application Note July 9, 2015 © 2011 Zentrum Mikroelektronik Dresden AG — Rev. 1.02 All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice. 5 of 19 ZSC31050 Two-Wire Current-Loop Output Figure 3.2 Evaluation of a Current Loop Output Module using the ZSC31050 Evaluation Board V3.0 KL3 screw terminal Connect external power supply for the current loop VDDA VINN VINN VSS VDDA VSS VSS VSS VDDA VINP VINP VSS VDDA VBR VBR VSS VDDA IRT IRT VSS VDDA FBP FBP VSS VDDA OUT OUT VSS VDDA FBN FBN VSS KL1/KL2 screw terminal for connecting external bridge Jumper K12 – “VDDA” Set to 12P Jumper K11 – “Bridge Mode” Voltage supplied Current supplied Jumper K17 – “V+ ext” Leave open Jumper K19 – “OUT” Short Pin 1 of ZSC31050 K1 connector to SSC CB Slide Switch S2 Communication via I²C™ Communication via SPI Slide Switch S1 Current output mode Resistors for board identification Jumper K15 Set to 5V Application Note July 9, 2015 ZMDI SSC Board ZSC31050 V3.0 VSS VDDA VDDA VDDA VSS IN3 IN3 VDDA LED for IO1 and IO2 VSS VGATE VGATE VDDA VSS IO1 IO1 VDDA VSS IO2 IO2 VDDA VSS SCL SCL VDDA © 2011 Zentrum Mikroelektronik Dresden AG — Rev. 1.02 All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice. VSS SDA SDA VDDA VSS VDD VDD VDDA 6 of 19 ZSC31050 Two-Wire Current-Loop Output 4 Calibration of the Current Loop The ZSC31050 calibration procedure performed via the digital interfaces removes all errors of the front-end and achieves the adaptation of gain, offset, and non-linearity correction for the sensor element within the temperature range. For calibrating a sensor module with current-loop output configuration, an additional 2-point calibration is needed to remove the tolerances of the external parts. To use the same calibration method as used for the voltage-output mode, a recalculation of the calibration target values TGX [%VDDA] for the output voltage can be used to remove the tolerances of the external parts. Figure 4.1 illustrates how to calculate these corrected target values for TGX [%VDDA]. Figure 4.1 4mA to 20mA Interface Fine Tuning Iout Initial I20mA 20 mA Corrected VDAC values 4 mA Initial I4mA VDAC1 VDAC2 The blue line shows the ideal function. The green line is the error line (with 2 initial measurement points: I4mA and I20mA). This transfer function for the measured currents I4mA and I20mA is given by equation: Ix mA VDAC VOffset R R (3) Where: P VDAC VDDA 1 11 VDDA TG X % 11 2 ΔVOffset = Offset error R 9 50 225 2 ΔR = Resistor and gain error R = Current loop resistance Both error values provide a good indication of the physical behavior of the circuitry: The offset error of the uncompensated amplifier The tolerance errors of the resistors Application Note July 9, 2015 © 2011 Zentrum Mikroelektronik Dresden AG — Rev. 1.02 All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice. 7 of 19 ZSC31050 Two-Wire Current-Loop Output Using a VDDA voltage of 5V is recommended for the ZSC31050 current loop application. The resulting “free-oferror” target values TG4mA and TG20mA for the MIN and MAX values of the loop current ICL can be calculated by equations (4) and (5): ICL _ min 4mA VDAC _ 4mA ICL _ max 20mA 225 VDAC _ 20 mA 225 VDDA TG4mA 225 VDDA TG20 mA 225 TG4mA 18% (4) TG20 mA 90% (5) However, the offset of the operational amp and the tolerances of the resistors cause different values of I CL when setting the DAC of the ZSC31050 to these “free-of-error” target values via the SET_DAC command (see the ZSC31050 Functional Description). Based on the resolution of the 11-bit DAC (DAC-IN = 0 to 2047), a decimal value of 368 at TG 4mA = 18% and of 1843 at TG20mA = 90% can be calculated. After setting the DAC to each value, the resulting currents I4mA and I20mA must be measured. Based on equation (3) and on the calculated target values of equations (4) and (5), the error values VOffset and R can be determined with equations (6) and (7): R VDDA 90% 18% 225 I 20 mA I 4mA VOffset I 4mA 225 R 18% VDDA I 20 mA 225 R 90% VDDA (6) (7) These error values can be used to re-calculate the target values TG4mA and TG20mA via equations (8) and (9): TG4mA TG20 mA 4mA 225 R VOffset VDDA (8) 20mA 225 R VOffset VDDA (9) The Excel™ spreadsheet ZSC31050 Current Loop Calibration can be used to perform this calculation (see section 8). The ZSC31050 SSC Evaluation Software Revision 1.5.0.9 or higher for the ZSC31050 Evaluation Kit also supports this calibration step as demonstrated in Figure 4.2 through Figure 4.6. Refer to the ZSC31050 Evaluation Kit Description for setup instructions. Note that references to “…Pressure” in the software are for the measurand of any sensor type, not just pressure. Application Note July 9, 2015 © 2011 Zentrum Mikroelektronik Dresden AG — Rev. 1.02 All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice. 8 of 19 ZSC31050 Two-Wire Current-Loop Output Figure 4.2 Step 1: Configuration and Pre-Adjustment of Current-Loop Output Mode 1. Select “I2C – Comm Bd.” in the “Interface & Settings” section for this example. 2. Set the analog front-end (AFE) of the ZSC31050 according to the sensor element’s parameters. 3. Select “Current” under “Output Mode.” 4. Adjust the clock frequency to the minimum level = 1MHz. Application Note July 9, 2015 © 2011 Zentrum Mikroelektronik Dresden AG — Rev. 1.02 All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice. 9 of 19 ZSC31050 Two-Wire Current-Loop Output Figure 4.3 Step 2: Transfer the Pre-Adjustments to the RAM and EEPROM 1. Write the adjustments to RAM by clicking the “Write” button. 2. Verify the WRITE_RAM operation. (If ok, then all READ cells become green.) 3. Copy RAM to EEPROM by clicking the “RAM --> EEP” button. 1. 2. 3. Application Note July 9, 2015 © 2011 Zentrum Mikroelektronik Dresden AG — Rev. 1.02 All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice. 10 of 19 ZSC31050 Two-Wire Current-Loop Output For the third step, there is the option to use a programmable digital multimeter (DMM) to import the actual current measurement into the SSC Evaluation Software. If using a non-programmable multimeter, follow step 3a below in Figure 4.4. If using a programmable multimeter, follow step 3b in Figure 4.5 instead. Figure 4.4 Step 3a: Adjustment of the External Current-Loop Circuitry 1. Complete the fields for VDDA, RSens, I(min) and I(max) in the “Current Loop Output Adjust & Measurement” dialog menu accessed by clicking on “Current Loop Adjust” under the “Tools” menu at the top. 2. Set the analog output of ZSC31050 to the “ideal” 4mA value, measure the actual loop current via a milliamp meter, and input this in the “SetMin” field. 3. Set the analog output of ZSC31050 to the “ideal” 20mA value, measure the actual loop current via the milliamp meter, and input this in the “SetMax” field. 4. Check the “cpy2Cal” function box. 5. Calculate the calibration target values based on the measured parameters of the external parts by clicking the “Calculate Adjust” button. 6. Verify the calculated target values at up to four current values (Tmin, Tmid, T_3rd, and Tmax). 7. Verify the limits for the loop current (Lmin and Lmax). Application Note July 9, 2015 © 2011 Zentrum Mikroelektronik Dresden AG — Rev. 1.02 All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice. 11 of 19 ZSC31050 Two-Wire Current-Loop Output Figure 4.5 Step 3b: Adjustment of the External Current-Loop Circuitry with External DMM Readout Note: Implementing an external digital multimeter’s (DMM) readout requires a user-program that communicates with the DMM and reads out the data. DMM readout is applicable for ZSC31050 software version 1.5.3 or later. Connect the DMM according to the manufacturer’s instructions. 1. 2. 3. 4. 5. 6. 7. Complete the fields for VDDA, RSens, I(min) and I(max) in the “Current Loop Output Adjust & Measurement” dialog menu accessed by clicking on “Current Loop Adjust” under the “Tools” menu at the top. Check the box to activate “Serial DMM” mode. “MMin” and “MMax” are enabled. Set the analog output of the ZSC31050 to the “ideal” 4mA value with “SetMin.” Read the measurement results from the DMM by clicking the “MMin” button. The result is input by the software in the correlating input field. Set the analog output of the ZSC31050 to the “ideal” 20mA value with “SetMax.” Read the measurement results from the DMM by clicking the “MMax” button. The result is input by the software in the correlating input field. Continue as described for step 3a from paragraph 4. Application Note July 9, 2015 1. 3. 4. 2. 5. 6. © 2011 Zentrum Mikroelektronik Dresden AG — Rev. 1.02 All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice. 12 of 19 ZSC31050 Two-Wire Current-Loop Output Figure 4.6 1. Step 4: Calibration using the Re-calculated Target Values Adjust the calibration setup based on the characteristics vs. measurand and temperature of the sensor element to be conditioned. 2. Enter recalculated calibration “Pressure” targets (refer to step 5 illustrated in Figure 4.4 or step 4 Figure 4.5). 3. Check the box to activate the “RngChk” function to avoid saturation of the ADC input. Acquire raw values stepwise according to the adjusted setup. Calculate coefficients (and limits and alarm values, if needed). Write all coefficients to EEPROM. Start the Normal Operating Mode (NOM) based on the new EEPROM data (main software window). 4. 5. 6. 7. Application Note July 9, 2015 1. 5. 4. 6. 2. 3. © 2011 Zentrum Mikroelektronik Dresden AG — Rev. 1.02 All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice. 13 of 19 ZSC31050 Two-Wire Current-Loop Output 5 Communication via Current Loop for Calibration In the application, communication for configuring and calibrating the sensor module can be completed via its two terminals for the current loop while in Command Mode (not an option during Normal Operating Mode). In this case, an additional communication module with special features is needed (see Figure 5.1). A galvanic isolation is needed for external access to the ZSC31050’s analog output pin for ZACwire™ communication via the current loop terminals. A common optocoupler (e.g., CNY17-2) can be used for short-circuiting the ZSC31050’s analog output OUT pin to VSS (signals a logic “L” is to be written). Schematic of the ZSC31050’s Current Loop Output Stage with Communication via ZACwire™ Figure 5.1 VDDA = 5 VDC ZSC31050 * The two resistors marked R9 are matched. ZD1 7.5V 10nF VDDA IIC<3.5mA 100nF R9* VGATE R2** ITR OUT OUTBUF ICL TR1 4.3kΩ ZD2 VDAC 2.2kΩ Data IN R2** Positive TR2 Interface Control R9* **The two resistors marked R2 are matched. RZD 220pF CNY17-2 150Ω Data OUT 15kΩ Current Loop Communication Module with Current Loop Voltage Control and Loop Current Measurement FBN 5.6kΩ VSS VSS IIC 50Ω Negative FBP ICL The principle of communication is simple using the four possible signal codes shown in Table 5.1, which are color coded for the signal levels illustrated in Figure 5.2. Communication must be initiated by sending the command 72HEX (switches the ZSC31050 into the Command Mode) within the ZACwire™ start window of 20ms after the power supply has been turned on for the circuit in Figure 5.2. Table 5.1 Signal Coding Operation Current Loop Voltage [VDC] Loop Current [mA] WRITE “L” > Maximal NOM voltage level < 5mA WRITE “H” Within NOM voltage range > 15mA READ “L” Within NOM voltage range < 5 mA READ “H” Within NOM voltage range > 15 mA Application Note July 9, 2015 Remarks Data from master to slave (coded by loop voltage) Data from slave to master (coded by loop current) © 2011 Zentrum Mikroelektronik Dresden AG — Rev. 1.02 All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice. 14 of 19 ZSC31050 Two-Wire Current-Loop Output The ZACwire™ communication is initiated by increasing the current loop voltage above its maximal value for the Normal Operation Mode. The WRITE “L” level is determined by the Zener voltage of ZD2. The 15kΩ resistor avoids unintended switching of the optocoupler caused by leakage current. Because the 5.6kΩ resistor significantly decreases the switch-OFF time of the optocoupler’s transistor, a low-speed/low-cost part can be used for this application. The 4.3kΩ pull-up-resistor at the ZSC31050’s OUT pin is needed for communication for the WRITE and READ “H” operations. During normal operation, the ZSC31050’s current consumption must be IIC < 3.5mA (including the transducer supply current and additional pull-up-current of less than 1mA). Refer to section 2 for a detailed description. Figure 5.2 Example for Initialization of ZACwire™ Communication via the Current Loop Interface Loop Voltage VCL “LW” MAX MIN Voltage at IC’s OUT pin “H” “L” Loop Current ICL “H” “L” Start Cond. 111BIN = 7HEX 1000BIN = 8HEX “0” 0111BIN = 7HEX 0010BIN = 2HEX WRIT E Standard slave address 78HEX for ZSC31050 STOP Cond. Command 72HEX sets ZSC31050 into Command Mode ZACwire™ 20ms Start Window after Power-on Application Note July 9, 2015 © 2011 Zentrum Mikroelektronik Dresden AG — Rev. 1.02 All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice. 15 of 19 ZSC31050 Two-Wire Current-Loop Output 6 Test of Communication via Current Loop TM For testing ZACwire communication with the ZSC31050 via the two wires of the current loop, the SSC Communication Board (CB) and the application circuitry in Figure 5.1 can be used to communicate using the CB’s OWI interface. To adapt the CB for signal coding (see Figure 5.2), the circuitry shown in Figure 6.1 can be used. For WRITE operations (i.e., data from the CB to the ZSC31050), the OWI pin of the CB is driven by its internal microcontroller to 0V = “L” or to 5V = “H.” This turns the PNP-transistor TR2 on (at “L”) or off (at “H”) and changes the supply voltage of the sensor module from < 9VDC when off to > 11VDC when on. If the supply voltage of the sensor module is below 9VDC, then the optocoupler stays off and the collector of its NPN-transistor is at high impedance. Via the 4.3kΩ pull-up resistor, the ZSC31050’s OUT pin is set to “H” potential. If the supply voltage increases approximately 11 VDC, then the optocoupler is turned on and its NPN-transistor shorts the OUT pin of the ZSC31050 to VSS, which indicates “L.” Figure 6.1 Schematic for the Adaptation Circuitry for Current Loop Communication TR3 mA KS12V 56Ω 27kΩ 4.7kΩ ZD 3.0V VDDA 1N414 ZD 9.1V VGATE ZD 7.5V 10nF TR1 TR2.1 100nF 4.3 kΩ 180Ω OUT 12kΩ USB Comm. Board 100nF CNY17-2 TR2.2 1.2kΩ TR4 15 kΩ 820Ω 2.2 kΩ ZSC31050 220pF OWI ZD 4.7V ZD 10V 5.6kΩ 150Ω VSS 820Ω 330Ω 50Ω GND FBN FBP For READ operations (i.e., data from the ZSC31050 to the CB), the OWI pin of the CB is at high impedance (“tri-state”). The logic level “L” is determined by the 820Ω resistor relative to GND; however the voltage at OWI is approximately 1 VDC. This cannot turn on transistor TR2 because its emitter-to-base-saturation voltage is > 1VDC (Darlington transistor), so TR2 stays off during a READ operation. If the ZSC31050’s ZACwire™ interface transmits a logic “L,” then the voltage at the OUT pin = 0VDC. As a result, the loop current is < 5mA and the voltage drop across the 56Ω resistor is smaller than the emitter-to-base-saturation voltage of TR1. Its collector stays in the high impedance state, and the voltage at the OWI pin on the CB is 1VDC. TM If the ZSC31050’s ZACwire interface transmits a logic “H,” then the voltage at the OUT pin = 5VDC. Therefore the loop current is > 15mA and the voltage drop across the 56Ω resistor becomes greater than the emitter-tobase-saturation voltage of TR1. Its collector shorts the 1.2kΩ resistor with KS12V = 12 VDC and the voltage at the OWI pin of the CB is > 4.7VDC, which indicates a logic “H.” Important: This circuitry is designed for the 12V supply line of ZMDI’s Communication Board only and can be TM used for evaluations of the principle of ZACwire communication only via the current loop. Application Note July 9, 2015 © 2011 Zentrum Mikroelektronik Dresden AG — Rev. 1.02 All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice. 16 of 19 ZSC31050 Two-Wire Current-Loop Output 7 Schematics for Three-Wire Current-Loop Applications The ZSC31050 must be configured for voltage output for three-wire current-loop applications. If the load of the current loop is referenced to GND (see Figure 7.1), then the characteristic of the output voltage must be inverted (negative gradient); otherwise, the standard characteristic must be used (see Figure 7.2). This can be achieved by setting the target values for calibration according to the required output characteristics. Figure 7.1 Load Referenced to GND VSUPPLY VDDA (ZSC31050) = 5V VGATE (ZSC31050) R1 RB VOUT (ZSC31050) ≈ VDDA – (IC * R1) IOUT ICL = 4 to 20 mA Load {RL < [(VDDA –VECsat) / 20mA – R1]} GND Figure 7.2 VSS (ZSC31050) Load Referenced to Positive Supply VS VSUPPLY VDDA (ZSC31050) = 5V VGATE (ZSC31050) Load {RL < [(VS –VCEsat) / 20 mA – R1]} IOUT RB VOUT (ZSC31050) ≈ IC * R1 ICL = 4 to 20 mA R1 GND Application Note July 9, 2015 VSS (ZSC31050) © 2011 Zentrum Mikroelektronik Dresden AG — Rev. 1.02 All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice. 17 of 19 ZSC31050 Two-Wire Current-Loop Output 8 Related Documents Note: X_xy refers to the current version of the document. Document File Name ZSC31050 Data Sheet ZSC31050_DataSheet_Rev_X_xy.pdf ZSC31050 Functional Description ZSC31050_FunctionalDescription_Rev_X_xy.pdf ZSC31050 Evaluation Kit Description ZSC31050_Evaluation_Kit_Description_Rev_X_xy.pdf ZSC31050 Technical Note – EEPROM Changes Bias Adjustment * ZSC31050_TechNote_EEPROM_Changes_Bias_Adjust_Rev_X_xy.pdf ZSC31050 Current Loop Calibration Spreadsheet * ZSC31050_Calibration_Current_Loop_Rev_X_xy.xls SSC Command Board Data Sheet ** SSC_CommunicationBoard_V4-1_DataSheet_Rev_X_xy.pdf Visit the ZSC31050 product page www.zmdi.com/zsc31050 on ZMDI’s website www.zmdi.com or contact your nearest sales office for the latest version of these documents. * Note: Documents marked with an asterisk (*) are available on request. See contact information on page 19. **Note: Documents marked with two asterisks (**) are available on the SSC Tools page: www.zmdi.com/ssc-tools 9 Glossary Term Description ADC Analog-to-Digital-Converter AFE Analog Front-End CB Communication Board CMC Calibration Microcontroller DAC Digital-to-Analog-Converter EEPROM Electrically Erasable Programmable Read Only Memory EMI Electromagnetic Interference ESD Electrostatic Discharge IC Integrated Circuit NOM Normal Operation Mode MSB Most Significant Bit SDA Serial Data (I C™ Interface) SCL Serial Clock (I C™ Interface) SSC Sensor Signal Conditioner Application Note July 9, 2015 2 2 © 2011 Zentrum Mikroelektronik Dresden AG — Rev. 1.02 All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice. 18 of 19 ZSC31050 Two-Wire Current-Loop Output 10 Document Revision History Revision Date 1.00 August 8, 2011 1.02 July 9, 2015 Description First release of document. Formula corrected on page 4. Updates for SSC Evaluation Software images and references to SSC Evaluation Kit hardware. Updates for procedures in Figure 4.2 through Figure 4.6. Minor edits for clarity. Update for contact information, related documents, and imagery. Sales and Further Information www.zmdi.com [email protected] Zentrum Mikroelektronik Dresden AG Global Headquarters Grenzstrasse 28 01109 Dresden, Germany ZMD America, Inc. 1525 McCarthy Blvd., #212 Milpitas, CA 95035-7453 USA Central Office: Phone +49.351.8822.306 Fax +49.351.8822.337 USA Phone 1.855.275.9634 Phone +1.408.883.6310 Fax +1.408.883.6358 European Technical Support Phone +49.351.8822.7.772 Fax +49.351.8822.87.772 DISCLAIMER: This information applies to a product under development. Its characteristics and specifications are subject to change without notice. Zentrum Mikroelektronik Dresden AG (ZMD AG) assumes no obligation regarding future manufacture unless otherwise agreed to in writing. The information furnished hereby is believed to be true and accurate. However, under no circumstances shall ZMD AG be liable to any customer, licensee, or any other third party for any special, indirect, incidental, or consequential damages of any kind or nature whatsoever arising out of or in any way related to the furnishing, performance, or use of this technical data. ZMD AG hereby expressly disclaims any liability of ZMD AG to any customer, licensee or any other third party, and any such customer, licensee and any other third party hereby waives any liability of ZMD AG for any damages in connection with or arising out of the furnishing, performance or use of this technical data, whether based on contract, warranty, tort (including negligence), strict liability, or otherwise. European Sales (Stuttgart) Phone +49.711.674517.55 Fax +49.711.674517.87955 Application Note July 9, 2015 Zentrum Mikroelektronik Dresden AG, Japan Office 2nd Floor, Shinbashi Tokyu Bldg. 4-21-3, Shinbashi, Minato-ku Tokyo, 105-0004 Japan ZMD FAR EAST, Ltd. 3F, No. 51, Sec. 2, Keelung Road 11052 Taipei Taiwan Phone +81.3.6895.7410 Fax +81.3.6895.7301 Phone +886.2.2377.8189 Fax +886.2.2377.8199 Zentrum Mikroelektronik Dresden AG, Korea Office U-space 1 Building Unit B, 906-1 660, Daewangpangyo-ro Bundang-gu, Seongnam-si Gyeonggi-do, 463-400 Korea Phone +82.31.950.7679 Fax +82.504.841.3026 © 2011 Zentrum Mikroelektronik Dresden AG — Rev. 1.02 All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice. 19 of 19