AIE Adaptive Image Enhancer Series Real Time Video Processor IC No.09060EAT04 BU1574GUW ●Description BU1574GUW is AIE : Adaptive Image Enhancer (image processing technology by ROHM’s hardware). ●Features 1) Compatible with image data from QCIF size (176 144) up to WVGA+ size (864 480). 2) Compatible with I/O data formats of ITU-R BT.656-4 or YCbCr with synchronizing signals. 3) Multiple operation modes: Image Enhance, Through and Sleep. 2 4) Registers can be set up through the 2-wire serial interface (I C). 5) PWM output for image adjustment LCD backlight control. 6) Built-in edge-enhancement and gamma filters. ●Applications Car camera, Car display, Car navigation system, Mobile phone, and portable DVD etc. ●Absolute maximum ratings Parameter Symbol Rating Unit Power supply voltage 1 VDDIO -0.3～+4.2 V Power supply voltage 2 VDD -0.3～+2.1 V Input voltage VIN -0.3～VDDIO+0.3 V Storage temperature range Tstg -40～+125 ℃ Power dissipation PD 310*1,570*2 mW *1 IC only. In the case exceeding 25 °C, 3.1 mW should be reduced per 1 °C. *2 When mounted on a glass epoxy board of 70 x 70 x 1.6 mm. If exceeding 25 °C, 5.7 mW should be reduced per 1 °C. * Has not been designed to withstand radiation. * Operation is not guaranteed. ●Operating conditions Parameter Power supply voltage 1 (IO) Power supply voltage 2 (CORE) Input voltage range Operating temperature range * Symbol Rating Unit VDDIO 2.70～3.60(Typ:3.00) V VDD 1.40～1.60(Typ:1.50) V VIN-VDDIO 0～VDDIO V Topr -40～+85 ℃ Supply the power source in order of VDD VDDIO. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 1/12 2009.06 - Rev.A Technical Note BU1574GUW ●Electrical characteristics MIN Limits TYP MAX fIN - - 36.0 Operating current consumption IDD1 - 24 - mA At Enhance mode setting (36 MHz). Static current consumption IDDst - - 30 uA At Sleep mode setting input terminal= GND setting Input "H" current IIH -10 - 10 uA VIH=VDDIO Input "L" current IIL -10 - 10 uA VIL=GND Input "H" voltage 1 VIH1 VDDIO x0.8 - Input "L" voltage 1 VIL1 -0.3 - Input "H" voltage 2 VIH2 VDDIO x0.85 - Input "L" voltage 2 VIL2 -0.3 - Hysteresis voltage width Vhys - 0.7 - V Output "H" voltage VOH VDDIO -0.4 - VDDIO V Output "L" voltage VOL 0.0 - 0.4 V Parameter Symbol Input frequency Unit Conditions MHz CAMCKI (DUTY45%～55%) VDDIO +0.3 VDDIO x0.2 VDDIO +0.3 VDDIO x0.15 V V V V Normal input (including the input mode of I/O terminal) Normal input (including the input mode of I/O terminal) Hysteresis input (RESETB, CAMCKI, SDA, SDC, I2CDEV0) Hysteresis input (RESETB, CAMCKI, SDA, SDC, I2CDEV0) Hysteresis input (RESETB, CAMCKI, SDA, SDC, I2CDEV0) IOH = -1.0 mA (DC) (including the output mode of I/O terminal) IOL = 1.0 mA (DC) (including the output mode of I/O terminal) (Unless otherwise specified; VDD = 1.50 V, VDDIO = 3.00 V, GND = 0.0 V, Ta = 25 ℃, fIN = 36.0 MHz) ●Terminal Layout H G F E D C 17 18 22 24 RESERVEI2 RESERVEI3 RESERVEI7 RESERVEI9 27 VDDIO 29 GND 31 MSEL0 33 MSEL2 15 16 20 21 RESERVEI0 RESERVEI1 RESERVEI5 RESERVEI6 25 RESERVEI10 30 VDD 32 MSEL1 34 PWMO 13 CAMDI6 14 CAMDI7 11 CAMDI4 9 CAMDI2 10 CAMDI3 12 CAMDI5 28 CAMCKI 8 CAMDI1 5 SDC 7 CAMDI0 60 RESETB RESERVEO2 RESERVEO4 RESERVEO5 6 I2CDEV0 4 SDA 3 CAMHSI 58 CAMHSO 55 CAMDO0 51 CAMDO4 RESERVEO0 RESERVEO1 64 VDD 62 57 CAMCKO RESERVEO12 53 CAMDO2 52 CAMDO3 48 CAMDO7 47 GND 56 I2CDEV6B 54 CAMDO1 50 CAMDO5 49 CAMDO6 7 8 B A 1 CAMVSI 63 GND 1 2 www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 19 23 RESERVEI4 RESERVEI8 61 VDDIO 59 CAMVSO 26 35 RESERVEI11 RESERVEO11 44 39 37 RESERVEO7 RESERVEO9 42 3 4 5 6 Fig.1 Terminal Layout (Bottom View) 2/12 36 38 RESERVEO10 RESERVEO8 41 46 40 RESERVEO6 43 RESERVEO3 45 2009.06 - Rev.A Technical Note BU1574GUW ●Terminal functions PIN No. Pin Name In/Out Active Level Init In * - Descriptions In/Output type C*1 1 CAMVSI Vertical timing input 2 N.C. *2 - - - 3 CAMHSI In * - Horizontal timing input 4 SDA In/Out DATA In In/Output serial data F 5 SDC In CLK - In/Output serial clock D*1 6 I2CDEV0 In * - I2C device address setting D*1 7 CAMDI0 In DATA - Data input: bit 0 G*1 8 CAMDI1 In DATA - Data input: bit 1 G*1 9 CAMDI2 In DATA - Data input: bit 2 G*1 10 CAMDI3 In DATA - Data input: bit 3 G*1 11 CAMDI4 In DATA - Data input: bit 4 G*1 12 CAMDI5 In DATA - Data input: bit 5 G*1 13 CAMDI6 In DATA - Data input: bit 6 G*1 14 CAMDI7 In DATA - Data input: bit 7 G*1 15 RESERVEI0 *3 In * - RESERVE C*1 16 RESERVEI1 *3 In * - RESERVE C*1 17 RESERVEI2 *3 In * - RESERVE C*1 18 RESERVEI3 *3 In * - RESERVE C*1 19 RESERVEI4 *3 In * - RESERVE C*1 20 RESERVEI5 *3 In * - RESERVE C*1 21 RESERVEI6 *3 In * - RESERVE C*1 22 RESERVEI7 *3 In * - RESERVE C*1 23 RESERVEI8 *3 In * - RESERVE C*1 24 RESERVEI9 *3 In * - RESERVE C*1 25 RESERVEI10 *3 In * - RESERVE C*1 26 RESERVEI11 *3 In * - RESERVE C*1 27 VDDIO - PWR - DIGITAL IO power source 28 CAMCKI In CLK - Clock input 29 GND - GND - Common GROUND - 30 VDD - PWR - CORE power source - 31 MSEL0 *3 In * - Mode select 0 A 32 MSEL1 *3 In * - Mode select 1 A - C*1 D*1 *Change by setup by the register is possible for the "*" display in the column of an Active level. Moreover, Init is a pin state under reset. *1 : It suspends during reset (initial state) *2 : Please connect with GND *3 : Please connect with GND. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 3/12 2009.06 - Rev.A Technical Note BU1574GUW PIN No. Pin Name 33 MSEL2 34 PWMO In/Out *4 Active Level Init Descriptions In/Output type In * - Mode select 2 A Out * Low PWM output for LCD backlight E 35 RESERVEO11 *5 Out * Low RESERVE E 36 RESERVEO10 *5 Out * Low RESERVE E RESERVEO9 *5 Out * Low RESERVE E 38 RESERVEO8 *5 Out * Low RESERVE E 39 RESERVEO7 *5 Out * Low RESERVE E 40 RESERVEO6 *5 Out * Low RESERVE E 41 RESERVEO5 *5 Out * Low RESERVE E 42 RESERVEO4 *5 Out * Low RESERVE E 43 RESERVEO3 *5 Out * Low RESERVE E 44 RESERVEO2 *5 Out * Low RESERVE E 45 RESERVEO1 *5 Out * Low RESERVE E 46 RESERVEO0 *5 Out * Low 47 GND - GND - 48 CAMDO7 Out DATA 49 CAMDO6 Out 50 CAMDO5 Out 51 CAMDO4 52 CAMDO3 53 37 RESERVE E Common GROUND - Low Data output: bit 7 E DATA Low Data output: bit 6 E DATA Low Data output: bit 5 E Out DATA Low Data output: bit 4 E Out DATA Low Data output: bit 3 E CAMDO2 Out DATA Low Data output: bit 2 E 54 CAMDO1 Out DATA Low Data output: bit 1 E 55 CAMDO0 Out DATA Low Data output: bit 0 E In * - RESERVE A 56 I2CDEV6B *3 *5 57 RESERVEO12 Out * High RESERVE E 58 CAMHSO Out * Low Horizontal timing output signal E 59 CAMVSO Out * Low Vertical timing output signal E 60 RESETB In Low - System reset signal B 61 VDDIO - PWR - DIGITAL IO power source - 62 CAMCKO Out CLK Low Clock output E 63 GND - GND - Common GROUND - 64 VDD - PWR - CORE power source - *Change by setup by the register is possible for the "*" display in the column of an Active level. Moreover, Init is a pin state under reset. *3 : Please connect with GND *4 : Please connect with VDDIO *5 : Leave OPEN www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 4/12 2009.06 - Rev.A Technical Note BU1574GUW ●I/O pins equivalent circuit diagrams Type Equivalent circuit structure Type Equivalent circuit structure VDDIO VDDIO VDDIO A To internal To internal B GND GND GND Input pin Input pin with the hysteresis function VDDIO VDDIO Internal signal VDDIO To internal C D GND Internal signal GND Internal signal GND Input pin with the suspend function VDDIO Input pin with the hysteresis and suspend functions VDDIO VDDIO VDDIO To internal Internal signal Internal signal E F GND GND Internal signal GND Output-pin GND Internal signal In/output pin with the hysteresis function VDDIO To internal Internal signal VDDIO VDDIO Internal signal G GND Internal signal GND GND Internal signal In/output pin with the suspend function Fig.2 I/O pins equivalent circuit diagrams www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 5/12 2009.06 - Rev.A Technical Note BU1574GUW ●Block diagram CAMDI[17:0] Color correction Brightness distinction Image enhance Register SDA SDC CAMVSI CAMHSI CAMCKI CAMDO[17:0] Edge enhancement Gamma control PWM control generation I2C interface PWMO CAMVSO CAMHSO CAMCKO Timing generator MSEL0/1/2 RESETB Fig.3 Block diagram ●Functional descriptions 1. Brightness distinction Luminance of the input image is analyzed, and collection coefficient value is calculated. Calculated collection coefficient value is kept until the next frame is input, and it is reflected on the image enhancement part and the color collection part when the next frame is processed. 2. Image enhance The correction operation is done to the luminance element of the input image based on the correction coefficient value from the luminance distinction part. It puts the chroma element from the color correction together, and outputs along output format. It is possible to change correction strength of the output image. 3. Color correction The correction operation is done to the chroma element of the input image based on the correction coefficient value from the luminance distinction part. Color correction strength can be changed. 4. Edge enhancement The edge emphasis filter is built into. The image is corrected to sharp image quality by emphasizing the outline. Strength of the edge emphasis filter can be adjusted. 5. Gamma control Gamma control can be given to the luminance element. A line form is interpolated with a setup point of the gamma curve between the setup point nine points, and output value is calculated from that curve. 6. PWM control generation The PWM signal for the LCD backlight control can be output. There is a setup of a manual by the register in the DUTY control of the PWM signal, and an auto-setup to be controlled automatically by BU1574GUW. As for the auto-setup, DUTY is calculated from the luminance information of the input image every frame. 7. Register The image correction parameter, the image size, and the format are set from the register. 2 The data of the register can be written by the I C interface, and be read. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 6/12 2009.06 - Rev.A Technical Note BU1574GUW 8. Data input format 8.1 ITU-R BT.656 input format 8.1.1 Horizontal direction synchronization timing CAMCKI 1st CAMDI0 -CAMDI7 2nd 3rd 4th Cb0 Y0 Cr0 Y1 Cb359 Y718 Cr359 Y719 Valid data section 720pixel SAV 1st 2nd 3rd 4th 1st EAV 2nd 3rd 4th SAV Y: 720 data Cb,Cr: 360 data 1440 clocks [NTSC] 1716 clocks / [PAL] 1728 clocks Fig.4 ITU-R BT.656 input format (horizontal direction) 8.1.2 Vertical direction synchronization timing Field 1 524 525 1 2 3 4 5 19 20 21 22 262 263 264 265 266 267 268 282 283 284 285 H bit V bit F bit Field 2 H bit V bit F bit Fig.5 ITU-R BT.656 input format for NTSC (vertical direction) Field 1 622 623 624 625 1 2 3 22 23 24 25 309 310 311 312 313 314 315 335 336 337 338 H bit V bit F bit Field 2 H bit V bit F bit Fig.6 ITU-R BT.656 input format for PAL (vertical direction, bottom view) www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 7/12 2009.06 - Rev.A Technical Note BU1574GUW 8.2. YCbCr with synchronizing signals 8-bit input format 8.2.1. Horizontal direction synchronization timing YUV_XST XSIZE ×2 AIE_XST×2 AIE_XSIZE ×2 CAMCKI (*1) Image area AIE varid area CAMDI0 -CAMDI7 (*3) Y0 Cb0 Y1 Cr0 Y2 Cb1 Y3 Cr1 Cr158 Y318 Cb158 Y317 Cr158 Y318 Cb159 Y319 Cr159 CAMHSI （*2） Fig.7 Horizontal direction synchronization timing (Note) * YUV_XST, XSIZE x 2, AIE_XST x 2 and AIE_XSIZE×2, which are described in the figures and the notes, are set by the registers. (*1) By changing the setting of the POL register (INDEX Address: E1h), the polarities of CAMCKI, CAMVSI and CAMHSI can be set independently. The figure above shows the timing in the case that the data are fetched at the CAMCKI falling edge (CKPOL = 1 setting) and the polarity of HSYNC is low active (HSPOL = 0 setting). (*2) Set CAMHSI so as not to become 'L' in other sections than the sync section (CAMHSI = 'L' section in the figure shown above). (*3) Do not change the frequency of CAMCKI during the operation. (*4) Take note of the items described above to input each signal. 8.2.2. Vertical direction synchronization timing YSIZE AIE_YST line AIE_YSIZE line CAMHSI CAMVSI Line. 1 CAMDIO -CAMDI7 Line. 2 Line. 3 AIE_YSIZE AIE_YSIZE -1 Original image Invalid area Fig.8 Vertical direction synchronization timing (Note) * Y_SIZE, AIE_YST and AIE_YSIZE, which are described in the figures and the notes, are set by the registers. (*1) The figure above shows the timing in the case that the polarity of VSYNC is low active (VSPOL = 0 setting) and also the polarity of HSYNC is low active (HSPOL = 0 setting). (*2) Take note of the items described above to input each signal. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 8/12 2009.06 - Rev.A Technical Note BU1574GUW 2 I C Interface format 9. The slave address is 42h when I2CDEV0 = 0 and 43h when I2CDEV0 = 1. When both of the write and read accesses are respectively executed successively 2 times or more, the sub-address is automatically incremented. SDA SDC S START condition 1-7 8 9 1-7 Slave address R/W ACK 8 9 Sub address 1-7 ACK 8 9 Data ACK P STOP condition Data transfer Write sequence Read sequence S Slave address (42h or 43h) W A(S) Sub address A(S) (0) S Slave address (42h or 43h) W Slave address R A(S) Sub address A(S) S A(S) (0) (42h or 43h) (1) Data A(S) Data A(S) Data Data A(M) S = START condition A(S) = acknowledge by slave A(S) = not acknowledge by slave P = STOP condition A(M) = acknowledge by master A(M) = not acknowledge by master A(S)/ P A(S) A(M)/ P A(M) Data Fig.9 I2C Interface format ●Timing chart 1. Data input interface timing CAMVSI CAMHSI CAMDI0 -CAMDI7 CAMCKI (CKPOL-“0”) CAMCKI (CKPOL-“1”) tDS tDH Fig.10 Data input interface timing Symbol MIN TYP MAX Unit tDS Setup time to CAMCKI rising / falling edge Descriptions 8 - - ns tDH Hold time to CAMCKI rising / falling edge 8 - - ns www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 9/12 2009.06 - Rev.A Technical Note BU1574GUW 2. Data output interface timing tPCLK CAMCKO tOCD CAMVSO tOCD CAMHSO tODD CAMDO[7:0] Fig.11 Data output interface timing Symbol Descriptions MIN TYP MAX Unit ns tPCLK Clock cycle 27.7 - - dPCLK Clock duty 40 50 60 % tODD CAMDO is defined from CAMCKO - - 5 ns tOCD CAMVSO and CAMHSO are defined from CAMCKO - - 5 ns 2 3. I C interface timing SDA t SU;DAT t LOW t BUF t HD;ST SDC t HD;STA t SU;STA t HD;DAT t SU;STO t HIGH 2 Fig.12 I C interface timing Symbol fSCL tHD;STA fLOW tHIGH Descriptions SDC clock frequency Hold time (repeat) "START" condition The first clock pulse is generated after this period SDC clock "L" period MIN TYP MAX Unit 0 - 400 kHz 0.6 - - µs 1.3 - - µs SDC clock "H" period 0.6 - - µs tSU;STA Repeat "START" condition setup time 0.6 - - µs tHD;DAT Data hold time 0 tSU;DAT Data setup time 100 - - ns tSU;STO "STOP" condition setup time 0.6 - - µs Bus free period between the "STOP" condition and "START" condition 1.3 - - µs tBUF µs ●Application example CAMDI[7:0] Camera module CAMHSI CAMVSI CAMCKI CAMDOI[7:0] CAMHSI CAMDO[7:0] CAMHSO BU1574GUW CAMVSI CAMVSO CAMCKI CAMCKO CAMDO[7:0] CAMHSO Image processing IC CAMVSO CAMCKO SDA SDC Fig.13 Application example www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 10/12 2009.06 - Rev.A Technical Note BU1574GUW ●Notes for use (1) Absolute Maximum Ratings An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down devices, thus making impossible to identify breaking mode such as a short circuit or an open circuit. If any special mode exceeding the absolute maximum ratings is assumed, consideration should be given to take physical safety measures including the use of fuses, etc. (2) Operating conditions These conditions represent a range within which characteristics can be provided approximately as expected. The electrical characteristics are guaranteed under the conditions of each parameter. (3) Reverse connection of power supply connector The reverse connection of power supply connector can break down ICs. Take protective measures against the breakdown due to the reverse connection, such as mounting an external diode between the power supply and the IC’s power supply terminal. (4) Power supply line Design PCB pattern to provide low impedance for the wiring between the power supply and the GND lines. In this regard, for the digital block power supply and the analog block power supply, even though these power supplies has the same level of potential, separate the power supply pattern for the digital block from that for the analog block, thus suppressing the diffraction of digital noises to the analog block power supply resulting from impedance common to the wiring patterns. For the GND line, give consideration to design the patterns in a similar manner. Furthermore, for all power supply terminals to ICs, mount a capacitor between the power supply and the GND terminal. At the same time, in order to use an electrolytic capacitor, thoroughly check to be sure the characteristics of the capacitor to be used present no problem including the occurrence of capacity dropout at a low temperature, thus determining the constant. (5) GND voltage Make setting of the potential of the GND terminal so that it will be maintained at the minimum in any operating state. Furthermore, check to be sure no terminals are at a potential lower than the GND voltage including an actual electric transient. (6) Short circuit between terminals and erroneous mounting In order to mount ICs on a set PCB, pay thorough attention to the direction and offset of the ICs. Erroneous mounting can break down the ICs. Furthermore, if a short circuit occurs due to foreign matters entering between terminals or between the terminal and the power supply or the GND terminal, the ICs can break down. (7) Operation in strong electromagnetic field Be noted that using ICs in the strong electromagnetic field can malfunction them. (8) Inspection with set PCB On the inspection with the set PCB, if a capacitor is connected to a low-impedance IC terminal, the IC can suffer stress. Therefore, be sure to discharge from the set PCB by each process. Furthermore, in order to mount or dismount the set PCB to/from the jig for the inspection process, be sure to turn OFF the power supply and then mount the set PCB to the jig. After the completion of the inspection, be sure to turn OFF the power supply and then dismount it from the jig. In addition, for protection against static electricity, establish a ground for the assembly process and pay thorough attention to the transportation and the storage of the set PCB. (9) Input terminals In terms of the construction of IC, parasitic elements are inevitably formed in relation to potential. The operation of the parasitic element can cause interference with circuit operation, thus resulting in a malfunction and then breakdown of the input terminal. Therefore, pay thorough attention not to handle the input terminals, such as to apply to the input terminals a voltage lower than the GND respectively, so that any parasitic element will operate. Furthermore, do not apply a voltage to the input terminals when no power supply voltage is applied to the IC. In addition, even if the power supply voltage is applied, apply to the input terminals a voltage lower than the power supply voltage or within the guaranteed value of electrical characteristics. (10) Ground wiring pattern If small-signal GND and large-current GND are provided, It will be recommended to separate the large-current GND pattern from the small-signal GND pattern and establish a single ground at the reference point of the set PCB so that resistance to the wiring pattern and voltage fluctuations due to a large current will cause no fluctuations in voltages of the small-signal GND. Pay attention not to cause fluctuations in the GND wiring pattern of external parts as well. (11) External capacitor In order to use a ceramic capacitor as the external capacitor, determine the constant with consideration given to a degradation in the nominal capacitance due to DC bias and changes in the capacitance due to temperature, etc. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 11/12 2009.06 - Rev.A Technical Note BU1574GUW ●Ordering part number B U 1 ROHM model name 5 7 4 G Product number U W Package type GUW: VBGA063W050 - E 2 Taping model name E2: Embossed reel tape ●Package specification VBGA063W050 <Tape and Reel information> 5.0 ± 0.1 5.0±0.1 0.08 S 63- φ 0.295±0.05 φ 0.05 M S AB P=0.5×7 0.5 0.10 0.9MAX 1PIN MARK Tape Embossed carrier tape (with dry pack) Quantity 2500pcs Direction of feed S E2 The direction is the 1pin of product is at the upper left when you hold ( reel on the left hand and you pull out the tape on the right hand ) 0.75±0.1 0.5 B 12345678 0.75± 0.1 H G F E D C B A P=0.5× 7 A www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 1pin (Unit : mm) Reel 12/12 Direction of feed ∗ Order quantity needs to be multiple of the minimum quantity. 2009.06 - Rev.A Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. 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If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law. Thank you for your accessing to ROHM product informations. More detail product informations and catalogs are available, please contact us. ROHM Customer Support System http://www.rohm.com/contact/ www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. R0039A