Ordering number : ENN*6685 CMOS IC LC7454A/M CMOS Data Slicer Preliminary Overview The LC7454A/M is a data slicer IC for the Index Plus + signals. The LC7454A/M extracts the Caption and the Index Plus + data form the Vertical Blanking Period of the TV signal and send it out to the decoder IC (Usually Microcomputer). The LC7454A/M can be used to extract the Closed Caption signals, the XDS signals and the Index Plus + signals. Features (1) Low power dessipation by CMOS process (2) Stable signal extraction by integrated peak hold circuit and digital circuit. (3) Operation Voltage range : 5V ± 10% (4) Package LC7454A : DIP18 LC7454M : MFP20 Ver.1.03 90699 91400 RM (IM) Ohta No.6685-1/16 LC7454A/M Pin Assignment DIP18 MFP20 1 VSS1 CP 18 1 VSS1 CP 20 2 TEST VSS2 17 2 TEST VSS2 19 3 LN26 VDD2 16 3 LN26 VDD2 18 MOD1 15 4 O/E/CFOUT MOD1 17 4 O/E/CFOUT 5 HS/CFIN VCOR 16 5 HS/CFIN VCOR 14 6 DATA CVIN 15 7 SCKIN MOD0 14 8 CE VDD1 13 VDD1 11 9 IOC SLICE 12 SLICE 10 10 NC 6 DATA CVIN 13 7 SCKIN MOD0 12 8 CE 9 IOC LC7454A NC 11 LC7454M * VDD1and VSS1are power supply terminals for digital circuit. VDD2 and VSS2 are power supply terminals for analog circuit. Connect there terminals as the following diagram in order to reduce the noise disturbance between two powers. LC7454A/M Power supply VDD1 VSS1 VDD2 VSS2 No.6685-2/16 LC7454A/M Package Dimension (unit : mm) 3007B SANYO : DIP-18 Package Dimension (unit : mm) 3036C SANYO : MFP-20 No.6685-3/16 Input control Data input/output control 16bit data judgement buffer 32bit data output buffer 1 Data judgment 32bit data output buffer 2 Data transmit control 32bit data buffer 32bit data output buffer 3 32bit data output buffer 4 PLL (VCO) 32bit data output buffer 5 PLL reference clock (Mode 3) (Mode 1) (Mode 2) circuit (Mode 2) (Mode 2) (Mode 1) (Mode3) Oscillation O/E/CFOUT SCKIN DATA CE Slice line selection Data slicer control Sync separator CVIN IOC 16bit line select data buffer Data slicer Pedestal clamp HS/CFIN LN26 LC7454system block diagram SLICE VCOR CP (Mode 1,3) LC7454A/M No.6685-4/16 LC7454A/M Operation on each mode The LC7454 has three operating modes. The operation mode be selected by the status of MOD0 and MOD1 terminals. The functionality of three modes are the same. Only the PLL reference frequency which is used to generate operation clock is different. Use mode1 or mode3 only in the application which uses 2x data. Any mode (Mode1,2 or 3) can be used in the 1x data only application. Terminal MOD1 MOD0 MODE Applications PLL reference Open Open Mode1 NTSC-VCR Use H-sync signal which is separated from C-Video signal. Open VDD1 Mode2 NTSC-VCR Use 1/32 divided signal 503 KHz which is generated by external ceramic resonator. VDD Open Mode3 NTSC-TV Use H-sync signal from Fly Back. Terminal Functions Terminal # (DIP18) Function Description Terminal name Mode 1 Mode 2 1 VSS1 Ground 2 TEST Test terminal, Open in normal operation 3 LN26 32µs Pulse output at line 26 timing on both field 4 O/ E /CFOUT Pulse output for field judgment *1 Sync separated HS pulse *4 Pulse output for field judgment Input terminal for Ceramic resonator External HS pulse input HS /CFIN 6 DATA Line select data input and slice data output 7 SCKIN Data transmit clock input 8 CE *3 *4 9 IOC Data direction control signal input SLICE Pulse output at selected slice line 11 VDD1 Power terminal 12 MOD0 Open 13 CVIN Conposit video input 14 VCOR Connect resister for internal VCO oscillation frequency control 15 MOD1 Open 16 VDD2 Power terminal 17 VSS2 Ground CP Connect to VDD Open *1 *2 Chip select input 10 18 *1 *2 *3 Output terminal for ceramic resonator 5 output Mode 3 Open Connect to VDD Filter terminal for internal PLL ‘H’ level in Odd field, ‘L’ level in Even field. N-ch open drain in output mode. Feed ‘L’ level only when data transmission is in effect. If CE=’H’, data terminal will become input/output disable, SCKIN terminal will become input disable. ‘H’ level : Output mode ‘L’ level : Input mode No.6685-5/16 LC7454A/M 1. Absolute Maximum Ratings at VSS=0V and Ta=25°C Parameter Symbol Pins Conditions Maximum Supply voltage Input voltage VDDMAX VDD1,VDD2 VI Output voltage VO Input/output voltage Allowable power dissipation Operating temperature Storage temperature VIO CVIN,SCKIN, CE ,IOC LN26, O/ E /CFOUT,SLICE DATA, HS /CFIN DIP18 MFP20 Pdmax min. VDD1=VDD2 Ratings typ. max. -0.3 +7.0 -0.3 VDD+0.3 -0.3 VDD+0.3 -0.3 VDD+0.3 unit V 300 150 mW °C Topr -30 +70 Tstg -55 +150 * VSS1 and VSS2 must be the same level. VDD1 and VDD2 must be the same level. 2. Allowable Operating Conditions at Ta=-30°C to +70°C, VSS=0V Parameter Operating Supply voltage ‘H’ level input voltage ‘L’ level input voltage CVIN input amplitude HS input frequency range Oscillation frequency range (Note 1) Oscillation stabilizing time period (Note 2) Symbol Pins VDD VDD1,VDD2 VIH CVSYNC HS /CFIN, DATA, SCKIN, CE , IOC HS /CFIN, DATA, SCKIN, CE , IOC CVIN fH HS /CFIN VIL Conditions VDD[V] VDD1=VDD2 min. Ratings typ. max. 4.5 5.5 unit V VDD 4.5 to 5.5 0.75VDD 4.5 to 5.5 VSS 4.5 to 5.5 1Vp-p -3dB 1V 1Vp-p +3dB Mode3 4.5 to 5.5 15.23 15.73 16.23 kHz 5 ms SYNC-WHITE=1.0V 0.25VDD FmCF HS /CFIN O/ E /CFOUT •Mode2 •Refer to figure 1 4.5 to 5.5 503 tmsCF HS /CFIN O/ E /CFOUT •MODE2 •Refer to figure 2 4.5 to 5.5 0.5 (Note 1) Refer to table 1 for oscillator constants. (Note 2) Oscillation stabilizing period is the time needed to stabilize the oscillation after power is fed. Refer to figure 2. No.6685-6/16 LC7454A/M 3. Electrical Characteristics at Ta=-30°C to +70°C, VSS=0V Parameter Symbol ‘H’ level input current ‘L’ level input current IIH ‘H’ level output voltage VOH ‘L’ level output voltage VOL Input clamp voltage Clamp input current Clamp output current Power dissipation VCLM P CII Pins Conditions VDD[V] min. Ratings typ. HS /CFIN, DATA, SCKIN, CE , IOC HS /CFIN, DATA, SCKIN, CE , IOC VIN=VDD 4.5 to 5.5 VIN=VSS 4.5 to 5.5 LN26, SLICE, O/ E /CFOUT, HS /CFIN LN26, DATA, O/ E /CFIN, HS /CFIN, SLICE CVIN IOH=-4mA 4.5 to 5.5 VDD-1.2 IOL=10mA 4.5 to 5.5 CVIN COI CVIN IDD VDD1,VDD2 IIL max. 1 unit µA -1 V 1 5.0 2.3 2.5 2.7 CVIN=3V 5.0 5 10 18 CVIN=2V 5.0 -120 -70 -30 8 20 4.5 to 5.5 µA mA 4. Serial Input/Output Characteristics at Ta=-30°C to +70°C, VSS=0V Cycle ‘L’ Level pulse width ‘H’ Level pulse width Symbol Pins Serial input VDD[V] min. SCKIN SCKIN Refer to figure 3 Refer to figure 3 4.5 to 5.5 4.5 to 5.5 1 0.5 tCKH SCKIN Refer to figure 3 4.5 to 5.5 0.5 tICK SCKIN Data set up time tIDO DATA Data hold time tHDO 4.5 to 5.5 •Applied to CE falling edge. •Refer to figure 3 •Applied to SCKIN 4.5 to 5.5 rising edge. •Refer to figure 3 4.5 to 5.5 Output delay tODT Set up time Serial output Conditions tCKCY tCKL Input clock Serial clock Parameter DATA Ratings typ. max. unit µs 1 0.1 0.1 •Applied to SCKIN 4.5 to 5.5 falling edge. •Use external 1kΩ pull-up resister. •Refer to figure 3 0.5 Table 1. Ceramic resonator constants Type of oscillation 503kHz ceramic oscillation Maker Murata Resonator CSB 503E9 C1 150pF C2 150pF * Both C1 and C2 must be use K rank (±10%) and SL characteristics. (Notes) • Please place the oscillation-related parts as close to the oscillation pins as possible with the shortest possible pattern length since the circuit pattern affects the oscillation frequency. • If you use other oscillators herein, we provide no guarantee for the characteristics. No.6685-7/16 LC7454A/M HS/CFIN O/E/CFOUT CF C1 C2 Figure 1 Ceramic resonator oscillation VDD Lowest limit of operation Power supply 0V tmsCF HS/CFIN O/E/CFOUT Figure 2 Oscillation stable time period 0.5VDD tICK <AC timing measure point> VDD CE tCKCY 1kΩ tCKL tCKH SCKIN DATA(Input) 50pF tIDT tHDT <test load> DATA(Output) tODT •DATA is high-impedance when CE=H Figure 3 <timing> Serial output test condition No.6685-8/16 LC7454A/M Slice line selection <Input timing of slice selection data> Line26 C-Video LN26 CE IOC L level SCKIN DATA D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 Slice line selection data is sent to the LC7454 in serial format . When sending the data to LC7454, the IOC terminal has to be ‘L’ level (It will change the Data line to the input mode). The data has to be transmitted after sensing the LN26 signal. Before sending the data, set the CE terminal to the ‘L’ level. Each bit of the data has to be changed at the falling edge of the SCKIN and the data is captured into the LC7454 at raising edge of the SCKIN signal. <Selection of slice line> Maximum of 5 lines between line 10 and 25 can be selected at a time in a field. The LC7454 can slice 1x and 2x data format signals. Each D0 to D15 corresponds to line 10 to line 25. Set specific bit to ‘H’ to select the corresponding line. Example: To select 15, 18, 19, 21 and 23 lines Send D0 - D15 = [0000010011010100] Note: If more than 6 line are selected, data extraction will be made on the first 5 lines. The data on the 6th line and after are not extracted. The new data sent to the LC7454 takes effects from the next field. No.6685-9/16 DATA SCKIN CE LN21 C-Video Data transfer clock (inside IC) IOC CE LN26 C-Video 25H (H level) (H level) 12H (L level) 14H Data 15H 26H b0 b1 13 16 clock 28H b15 29H b1 29 b30 b31 31H 20H b0 b1 29 b30 32 clock 32H b31 b0 b1 29 32 clock 34H 21H Data b30 b31 Selected line 5 23H 35H b1 29 b30 b31 b1 29 b30 32 clock 38H b31 [Data of 32 bit data output buffer 5] b0 37H 24H [Data of 32 bit data output buffer 4] b0 32 clock 36H 32 bit data output buffer 5 22H [Data of 32 bit data output buffer 3] 33H [Data of 32 bit data output buffer 2] [Data of 32 bit data output buffer 1] b0 32 clock 30H 19H 32 bit data output buffer 4 32 bit data output buffer 3 17H Data 18H Selected line 4 32 bit data output buffer 2 Data 16H Selected line 3 [16 bit data judgment buffer data] 27H b14 Selected line 2 32 bit data output buffer 1 Data 13H Selected line 1 Data output timing 39H 40H LC7454A/M No.6685-10/16 LC7454A/M <Data format> The LC7454 can extract the Index Plus + format data. If the line contains the 1x format data, the first 15 bits of the 32 bit data buffer are filled with ‘0’ and 16th bit becomes ‘1’. The extracted data is stored is stored form 16th to 31st bit. 1x data format Data Byte 1 Data Byte 2 b0 b1 b2 b3 b4 b5 b6 p1 b0 b1 b2 b3 b4 b5 b6 p2 LSB Output direction 0 MSB 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 b0 b1 b2 b3 b4 b5 b6 p1 b0 b1 b2 b3 b4 b5 b6 p2 b31 b0 Fixed to ‘0000000000000001’, if 1x data is received 32 bit data output buffer 2x data format Data Byte 1 Data Byte 2 Data Byte 3 Data Byte 4 b0 b1 b2 b3 b4 b5 b6 p1 b0 b1 b2 b3 b4 b5 b6 p2 b0 b1 b2 b3 b4 b5 b6 p3 b0 b1 b2 b3 b4 b5 b6 p4 LSB Output direction MSB b0 b1 b2 b3 b4 b5 b6 p1 b0 b1 b2 b3 b4 b5 b6 p2 b0 b1 b2 b3 b4 b5 b6 p3 b0 b1 b2 b3p b4 b5 b6 p4 b0 b31 32 bit data output buffer Five 32 bit data buffer are provided to store maximum of 5 line data in a field. If the data with correct format exists in the selected lines, the extracted data are stored into the buffers by the order of line number. If correct data is not found on the selected line, the data buffer is filled with ‘0’. All five data buffers are cleared by the line 10 sensing signal in the next field. Therefore, the data have to be read out between LN26 and the line 10 of the next field. Please read only the selected buffers. For example, if three lines are selected, read the first three 32 bit buffers only. No.6685-11/16 LC7454A/M <16 bit data judgment buffer> The data judgment buffer includes the data which indicates the existence of the Index Plus + format data and data rate (1x or 2x). Bit 0 to 4 contain the existence of the signal and bit 8 to 15 contain the data rate. Bit 7 contains the field information (Odd or Even). The following table shows functions of each bit. Output direction b0 b1 b2 b3 b4 b5 b6 b7 b8 b0 to b7 : Existence of 1x or 2x data format. Bit Contents b0 0 : Data do not exist on the first selected line. 1 : Data exist on the first selected line. b1 0 : Data do not exist on the second selected line. 1 : Data exist on the second selected line. b2 0 : Data do not exist on the third selected line. 1 : Data exist on the third selected line. b3 0 : Data do not exist on the fourth selected line. 1 : Data exist on the fourth selected line. b4 0 : Data do not exist on the fifth selected line. 1 : Data exist on the fifth selected line. b5 NOT USE b6 always”0” b7 0 : Even field 1 : Odd field b8 to b15 : Data format judgment on the selected line. Bit Contents b8 0 : 1x data format on the first line. 1 : 2x data format on the first line. b9 0 : 1x data format on the second line. 1 : 2x data format on the second line. b10 0 : 1x data format on the third line. 1 : 2x data format on the third line. b11 0 : 1x data format on the fourth line. 1 : 2x data format on the fourth line. b12 0 : 1x data format on the fifth line. 1 : 2x data format on the fifth line. b13 NOT USE b14 always”0” b15 b9 b10 b11 b12 b13 b14 b15 Note ‘0’ if no line is selected. ‘0’ if one or less line is selected. ‘0’ if two or less line is selected. ‘0’ if three or less line is selected. ‘0’ if four or less line is selected. Note ‘0’ if no line is selected. ‘0’ if one or less line is selected. ‘0’ if two or less line is selected. ‘0’ if three or less line is selected. ‘0’ if four or less line is selected. *If neither 1x nor 2x data are sensed on the selected line, these bits become ‘0’. *16 bit data judgment buffer is cleared at the next line 10 as well as 32 bit data output buffer 1-5. *Even though the data judgment buffer indicates the existence of the data, it is recommended that the existence of the data should be verified by checking the parity bit of the data. No.6685-12/16 LC7454A/M Applications (Mode 1) CP 18 2 TEST VSS2 17 3 LN26 VDD2 16 4 O/E/CFOUT MOD1 15 5 HS/CFIN VCOR 14 2.2µF 1 VSS1 + - 1MΩ DIP18 10kΩ MAIN µ-COM C-Video 6 DATA CVIN 13 1µF 7 SCKIN MOD0 12 8 CE VDD1 11 9 IOC SLICE 10 CP 20 2 TEST VSS2 19 3 LN26 VDD2 18 4 O/E/CFOUT MOD1 17 5 HS/CFIN VCOR 16 2.2µF 1 VSS1 + - 1MΩ MFP20 10kΩ C-Video MAIN µCOM 6 DATA CVIN 15 1µF 7 SCKIN MOD0 14 8 CE VDD1 13 9 IOC SLICE 12 10 NC NC 11 No.6685-13/16 LC7454A/M Applications (Mode 2) CP 18 2 TEST VSS2 17 3 LN26 VDD2 16 4 O/E/CFOUT MOD1 15 5 HS/CFIN VCOR 14 + - 1MΩ 1 VSS1 2.2µF DIP18 10kΩ C-Video MAIN µ-COM 6 DATA CVIN 13 1µF 7 SCKIN MOD0 12 8 CE VDD1 11 9 IOC SLICE 10 CP 20 VSS2 19 3 LN26 VDD2 18 4 O/E/CFOUT MOD1 17 5 HS/CFIN VCOR 16 CF 2 TEST 2.2µF 1 VSS1 + - 1MΩ MFP20 10kΩ C-Video 6 DATA CVIN 15 1µF MAIN µ-COM 7 SCKIN MOD0 14 8 CE VDD1 13 9 IOC SLICE 12 10 NC NC 11 No.6685-14/16 LC7454A/M Applications (Mode 3) Hsync signal (From F.B.) MAIN µ-COM CP 18 2 TEST VSS2 17 3 LN26 VDD2 16 4 O/E/CFOUT MOD1 15 5 HS/CFIN VCOR 14 2.2µF 1 VSS1 + - 1MΩ DIP18 10kΩ C-Video 6 DATA CVIN 13 1µF 7 SCKIN MOD0 12 8 CE VDD1 11 9 IOC SLICE 10 MFP20 Hsync signal (From F.B.) CP 20 2 TEST VSS2 19 3 LN26 VDD2 18 4 O/E/CFOUT MOD1 17 5 HS/CFIN VCOR 16 2.2µF 1 VSS1 + - 10kΩ C-Video 6 DATA CVIN 15 7 SCKIN MOD0 14 8 CE VDD1 13 9 IOC SLICE 12 1µF MAIN µ-COM 10 NC NC 11 No.6685-15/16 LC7454A/M memo: PS No.6685-16/16