4Gb: x4, x8, x16 DDR3L SDRAM Addendum

4Gb: x4, x8, x16 DDR3L SDRAM Addendum
Description
Addendum
DDR3L SDRAM
MT41K512M8RH-125 V:E
MT41K256M16HA-125 V:E
Description
•
•
•
•
•
DDR3L SDRAM (1.35V) is a low voltage version of the
DDR3 (1.5V) SDRAM. Refer to the DDR3 (1.5V)
SDRAM data sheet specifications when running in
1.5V compatible mode.
Self refresh temperature (SRT)
Automatic self refresh (ASR)
Write leveling
Multipurpose register
Output driver calibration
Options
Features
Marking
• Configuration
– 1 Gig x 4
– 512 Meg x 8
– 256 Meg x 16
• FBGA package (Pb-free) – x4, x8
– 78-ball (10.5mm x 12mm) Rev. D
– 78-ball (9mm x 10.5mm) Rev. E, J
• FBGA package (Pb-free) – x16
– 96-ball (10mm x 14mm) Rev. D
– 96-ball (9mm x 14mm) Rev. E
• Timing – cycle time
– 1.071ns @ CL = 13 (DDR3-1866)
– 1.25ns @ CL = 11 (DDR3-1600)
– 1.5ns @ CL = 9 (DDR3-1333)
– 1.875ns @ CL = 7 (DDR3-1066)
• Special options
– Visual inspection
• Operating temperature
– Commercial (0°C ≤ T C ≤ +95°C)
– Industrial (–40°C ≤ T C ≤ +95°C)
• Revision
• VDD = V DDQ = 1.35V (1.283–1.45V)
• Backward compatible to V DD = V DDQ = 1.5V ±0.075V
– Supports DDR3L devices to be backward compatible in 1.5V applications
• Differential bidirectional data strobe
• 8n-bit prefetch architecture
• Differential clock inputs (CK, CK#)
• 8 internal banks
• Nominal and dynamic on-die termination (ODT)
for data, strobe, and mask signals
• Programmable CAS (READ) latency (CL)
• Programmable posted CAS additive latency (AL)
• Programmable CAS (WRITE) latency (CWL)
• Fixed burst length (BL) of 8 and burst chop (BC) of 4
(via the mode register set [MRS])
• Selectable BC4 or BL8 on-the-fly (OTF)
• Self refresh mode
• TC of 0°C to +95°C
– 64ms, 8192-cycle refresh at 0°C to +85°C
– 32ms at +85°C to +95°C
1G4
512M8
256M16
RA
RH
RE
HA
-107
-125
-15E
-187E
V
None
IT
:D/:E/:J
Table 1: Key Timing Parameters
Speed Grade
Data Rate (MT/s)
Target tRCD-tRP-CL
-1071, 2, 3
1866
13-13-13
13.91
13.91
13.91
-1251, 2
1600
11-11-11
13.75
13.75
13.75
-15E1
1333
9-9-9
13.5
13.5
13.5
-187E
1066
7-7-7
13.1
13.1
13.1
Notes:
tRCD
(ns)
tRP
(ns)
CL (ns)
1. Backward compatible to 1066, CL = 7 (-187E).
2. Backward compatible to 1333, CL = 9 (-15E).
3. Backward compatible to 1600, CL = 11 (-125).
PDF: 09005aef858c7838
4Gb_DDR3L_addendum.pdf - Rev. B 4/15 EN
1
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2014 Micron Technology, Inc. All rights reserved.
Products and specifications discussed herein are subject to change by Micron without notice.
4Gb: x4, x8, x16 DDR3L SDRAM Addendum
Description
Table 2: Addressing
Parameter
Configuration
1 Gig x 4
512 Meg x 8
256 Meg x 16
128 Meg x 4 x 8 banks
64 Meg x 8 x 8 banks
32 Meg x 16 x 8 banks
Refresh count
8K
8K
8K
Row address
64K (A[15:0])
64K (A[15:0])
32K (A[14:0])
Bank address
8 (BA[2:0])
8 (BA[2:0])
8 (BA[2:0])
2K (A[11, 9:0])
1K (A[9:0])
1K (A[9:0])
1KB
1KB
2KB
Column address
Page size
Figure 1: DDR3L Part Numbers
Example Part Number:
MT41K512M8RH-125 V:E
-
Configuration
Package
Speed
Revision
{
MT41K
:
:D/:E/:J
Revision
Temperature
Configuration
1 Gig x 4
1G4
Commercial
512 Meg x 8
512M8
Industrial temperature
256 Meg x 16
256M16
None
IT
Special Options
Note:
Package
78-ball 10.5mm x 12mm FBGA
Rev.
D
Mark
RA
78-ball 9mm x 10.5mm FBGA
E, J
RH
96-ball 10.0mm x 14mm FBGA
96-ball 9mm x 14mm FBGA
D
E
RE
HA
Visual inspection
V
Speed Grade
-107
tCK
= 1.071ns, CL = 13
-125
tCK
= 1.25ns, CL = 11
-15E
tCK
= 1.5ns, CL = 9
-187E
tCK
= 1.875ns, CL = 7
1. Not all options listed can be combined to define an offered product. Use the part catalog search on
http://www.micron.com for available offerings.
FBGA Part Marking Decoder
Due to space limitations, FBGA-packaged components have an abbreviated part marking that is different from the
part number. For a quick conversion of an FBGA code, see the FBGA Part Marking Decoder on Micron’s Web site:
http://www.micron.com.
PDF: 09005aef858c7838
4Gb_DDR3L_addendum.pdf - Rev. B 4/15 EN
2
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2014 Micron Technology, Inc. All rights reserved.
4Gb: x4, x8, x16 DDR3L SDRAM Addendum
Revision History
Revision History
Rev. B – 04/15
• Removed Micron Confidential and Proprietary mark
Rev. A – 02/14
• Initial release; based on 4Gb: x4, x8, x16 DDR3L SDRAM, Rev I 09/13 data sheet
(09005aef84780270)
8000 S. Federal Way, P.O. Box 6, Boise, ID 83707-0006, Tel: 208-368-4000
www.micron.com/products/support Sales inquiries: 800-932-4992
Micron and the Micron logo are trademarks of Micron Technology, Inc.
All other trademarks are the property of their respective owners.
This data sheet contains minimum and maximum limits specified over the power supply and temperature range set forth herein.
Although considered final, these specifications are subject to change, as further product development and data characterization sometimes occur.
PDF: 09005aef858c7838
4Gb_DDR3L_addendum.pdf - Rev. B 4/15 EN
3
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2014 Micron Technology, Inc. All rights reserved.