High Stability Isolated Error Amplifier ADuM3190 Data Sheet FEATURES GENERAL DESCRIPTION Stability in isolated feedback applications 0.5% initial accuracy 1% accuracy over the full temperature range Compatible with Type II or Type III compensation networks Reference voltage: 1.225 V Compatible with DOSA Low power operation: <7 mA total Wide voltage supply range VDD1: 3 V to 20 V VDD2: 3 V to 20 V Bandwidth: 400 kHz Isolation voltage: 2.5 kV rms Safety and regulatory approvals UL recognition: 2500 V rms for 1 minute per UL 1577 CSA Component Acceptance Notice #5A VDE certificate of conformity DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 VIORM = 565 V peak Wide temperature range −40°C to +125°C ambient operation 150°C maximum junction temperature Qualified for automotive applications The ADuM31901 is an isolated error amplifier based on Analog Devices, Inc., iCoupler® technology. The ADuM3190 is ideal for linear feedback power supplies. The primary side controllers of the ADuM3190 enable improvements in transient response, power density, and stability as compared to commonly used optocoupler and shunt regulator solutions. Unlike optocoupler-based solutions, which have an uncertain current transfer ratio over lifetime and at high temperatures, the ADuM3190 transfer function does not change over its lifetime, and it is stable over a wide temperature range of −40°C to +125°C. Included in the ADuM3190 is a wideband operational amplifier for a variety of commonly used power supply loop compensation techniques. The ADuM3190 is fast enough to allow a feedback loop to react to fast transient conditions and overcurrent conditions. Also included is a high accuracy 1.225 V reference to compare with the supply output setpoint. The ADuM3190 is packaged in a small 16-lead QSOP package for a 2.5 kV rms isolation voltage rating. APPLICATIONS Linear power supplies Inverters Uninterruptible Power Supply (UPS) DOSA-compatible modules Voltage monitors Automotive systems VDD1 1 16 VDD2 GND1 2 15 GND2 14 VREG2 13 REFOUT 12 +IN 11 –IN EAOUT 7 10 COMP GND1 8 9 GND2 VREG1 3 REFOUT1 4 REG UVLO UVLO REF REF NC 5 EAOUT2 6 REG Tx Rx 11335-001 FUNCTIONAL BLOCK DIAGRAM Figure 1. 1 Protected by U.S. Patents 5,952,849, 6,873,065 and 7,075,329. Other patents pending. Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. 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Technical Support www.analog.com ADuM3190 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Typical Performance Characteristics ..............................................9 Applications ....................................................................................... 1 Test Circuits..................................................................................... 13 General Description ......................................................................... 1 Applications Information .............................................................. 14 Functional Block Diagram .............................................................. 1 Theory of Operation .................................................................. 14 Revision History ............................................................................... 2 Accuracy Circuit Operation...................................................... 14 Specifications..................................................................................... 3 Isolated Amplifier Circuit Operation ...................................... 14 Package Characteristics ............................................................... 5 Application Block Diagram ...................................................... 15 Regulatory Information ............................................................... 5 Setting the Output Voltage ........................................................ 15 Insulation and Safety Related Specifications ............................ 5 DOSA Module Application....................................................... 15 Recommended Operating Conditions ...................................... 5 DC Correctness and Magnetic Field Immunity .......................... 16 DIN V VDE V 0884-10 (VDE V 0884-10) Insulation Characteristics .............................................................................. 6 Insulation Lifetime ..................................................................... 17 Packaging and Ordering Information ......................................... 18 Absolute Maximum Ratings ....................................................... 7 Outline Dimensions ................................................................... 18 ESD Caution .................................................................................. 7 Ordering Guide .......................................................................... 18 Pin Configuration and Function Descriptions ............................. 8 Automotive Products ................................................................. 18 REVISION HISTORY 7/15—Rev. 0 to Rev. A Added W Models ................................................................ Universal Changes to Features Section and Applications Section ............... 1 Changes to Table 1 ............................................................................ 3 Changes to Regulatory Information Section and Table 3 ........... 5 Changes to DIN V VDE V 0884-10 (VDE V 0884-10) Insulation Characteristics Section and Table 6............................. 6 Change to AC Voltage, Bipolar Parameter, Table 8 ...................... 7 Changes to Figure 12 and Figure 14............................................. 10 Added Figure 16 to Figure 24; Renumbered Sequentially ........ 11 Deleted Figure 24; Renumbered Sequentially ............................ 13 Added Isolated Amplifier Circuit Operation Section................ 14 Changes to Applications Block Diagram Section....................... 15 Updated Outline Dimensions ....................................................... 18 Changes to Ordering Guide .......................................................... 18 Added Automotive Products Section........................................... 18 2/13—Revision 0: Initial Version Rev. A | Page 2 of 18 Data Sheet ADuM3190 SPECIFICATIONS VDD1 = VDD2 = 3 V to 20 V for TA = TMIN to TMAX. All typical specifications are at TA = 25°C and VDD1 = VDD2 = 5 V, unless otherwise noted. Table 1. Parameter ACCURACY Initial Error Total Error OP AMP Offset Error Open-Loop Gain Input Common-Mode Range Gain Bandwidth Product Common-Mode Rejection Input Capacitance Output Voltage Range Input Bias Current REFERENCE Output Voltage Output Current UVLO Positive Going Threshold Negative Going Threshold EAOUT Impedance OUTPUT CHARACTERISTICS Output Gain1 A, B, S, and T Grades WS and WT Grades Output Offset Voltage Output Linearity2 Output −3 dB Bandwidth A, S, and WS Grades B, T, and WT Grades Output Voltage, EAOUT Low Voltage High Voltage Output Voltage, EAOUT2 Low Voltage High Voltage Noise, EAOUT Noise, EAOUT2 Test Conditions/Comments (1.225 V − EAOUT)/1.225 V × 100%; see Figure 27 TA = 25°C TA = TMIN to TMAX Min −5 66 0.35 Typ Max Unit 0.25 0.5 0.5 1 % % ±2.5 80 +5 mV dB V MHz dB pF V µA 1.5 10 72 2 COMP pin 0.2 2.7 0.01 0 mA to 1 mA load, CREFOUT = 15 pF TA = 25°C TA = TMIN to TMAX CREFOUT = 15 pF 1.215 1.213 2.0 1.225 1.225 1.235 1.237 V V mA 2.8 2.6 High-Z 2.96 2.4 V V Ω 0.9 2.34 1.0 2.6 1.1 2.86 V/V V/V 0.83 2.5 1.0 2.6 1.17 2.7 V/V V/V −0.2 −0.1 +0.05 +0.01 +0.2 +0.1 V V −1.0 −1.0 +0.15 +0.1 +1.0 +1.0 % % 100 250 200 400 2.4 2.7 4.8 5.0 0.3 0.3 4.9 5.4 1.7 4.8 VDD2 or VDD1 < UVLO threshold See Figure 29 From COMP to EAOUT, 0.4 V to 2.1 V, ±3 mA From EAOUT to EAOUT2, 0.4 V to 2.1 V, ±1 mA, VDD1 = 20 V From COMP to EAOUT, 0.4 V to 2.1 V, ±3 mA From EAOUT to EAOUT2, 0.4 V to 2.1 V, ±1 mA, VDD1 = 20 V From COMP to EAOUT, 0.4 V to 2.1 V, ±3 mA From EAOUT to EAOUT2, 0.4 V to 2.1 V, ±1 mA, VDD1 = 20 V From COMP to EAOUT, 0.4 V to 2.1 V, ±3 mA From EAOUT to EAOUT2, 0.4 V to 2.1 V, ±1 mA, VDD1 = 20 V From COMP to EAOUT, 0.4 V to 2.1 V, ±3 mA, and from COMP to EAOUT2, 0.4 V to 2.1 V, ±1 mA, VDD1 = 20 V kHz kHz ±3 mA output ±1 mA output VDD1 = 4.5 V to 5.5 V VDD1 = 10 V to 20 V VDD1 = 4.5 V to 5.5 V VDD1 = 10 V to 20 V See Figure 15 See Figure 15 Rev. A | Page 3 of 18 0.4 V V 0.6 0.6 V V V V mV rms mV rms ADuM3190 Parameter POWER SUPPLY Operating Range, Side 1 Operating Range, Side 2 Power Supply Rejection Supply Current IDD1 IDD2 1 2 Data Sheet Test Conditions/Comments Min VDD1 VDD2 DC, VDD1 = VDD2 = 3 V to 20 V 3.0 3.0 60 See Figure 4 See Figure 5 Typ 1.4 2.9 Max Unit 20 20 V V dB 2.0 5.0 mA mA Output gain is defined as the slope of the best-fit line of the output voltage vs. the input voltage over the specified input range, with the offset error adjusted out. Output linearity is defined as the peak-to-peak output deviation from the best-fit line of the output gain, expressed as a percentage of the full-scale output voltage. Rev. A | Page 4 of 18 Data Sheet ADuM3190 PACKAGE CHARACTERISTICS Table 2. Parameter RESISTANCE Input-to-Output1 CAPACITANCE Input-to-Output1 Input Capacitance2 IC JUNCTION-TO-AMBIENT THERMAL RESISTANCE 16-Lead QSOP 1 2 Symbol Min Typ Max Unit RI-O 1013 Ω CI-O CI 2.2 4.0 pF pF Test Conditions/Comments f = 1 MHz Thermocouple located at center of package underside θJA 76 °C/W The device is considered a 2-terminal device; Pin 1 through Pin 8 are shorted together, and Pin 9 through Pin 16 are shorted together. Input capacitance is from any input data pin to ground. REGULATORY INFORMATION The ADuM3190 is approved by the organizations listed in Table 3. See Table 8 and the Insulation Lifetime section for recommended maximum working voltages for specific cross-isolation waveforms and insulation levels. Table 3. UL Recognized Under 1577 Component Recognition Program1 Single Protection, 2500 V rms Isolation Voltage, 16-Lead QSOP File E214400 1 2 CSA Approved under CSA Component Acceptance Notice #5A Basic insulation per CSA 60950-1-03 and IEC 60950-1, 400 V rms (565 V peak) maximum working voltage File 205078 VDE Certified according to DIN V VDE V 0884-10 (VDE V 0884-10): 2006-122 Reinforced insulation, 565 V peak File 2471900-4880-0001 In accordance with UL 1577, each ADuM3190 is proof tested by applying an insulation test voltage ≥ 3000 V rms for 1 sec (current leakage detection limit = 5 µA). In accordance with DIN V VDE V 0884-10, each ADuM3190 is proof tested by applying an insulation test voltage ≥ 1050 V peak for 1 sec (partial discharge detection limit = 5 pC). The asterisk (*) marked on the component designates DIN V VDE V 0884-10 approval. INSULATION AND SAFETY RELATED SPECIFICATIONS Table 4. Parameter Rated Dielectric Insulation Voltage Minimum External Air Gap (Clearance) Symbol L(I01) Value 2500 3.8 min Unit V rms mm Minimum External Tracking (Creepage) L(I02) 3.1 min mm Minimum Internal Gap (Internal Clearance) Tracking Resistance (Comparative Tracking Index) Isolation Group CTI 0.017 min >400 II mm V Test Conditions/Comments 1-minute duration Measured from input terminals to output terminals, shortest distance through air Measured from input terminals to output terminals, shortest distance path along body Insulation distance through insulation DIN IEC 112/VDE 0303, Part 1 Material Group DIN VDE 0110, 1/89, Table 1 RECOMMENDED OPERATING CONDITIONS Table 5. Parameter OPERATING TEMPERATURE BY MODEL ADuM3190A/ADuM3190B ADuM3190S/ADuM3190T SUPPLY VOLTAGES1 INPUT SIGNAL RISE AND FALL TIMES 1 Symbol TA VDD1, VDD2 tR , tF All voltages are relative to their respective grounds. Rev. A | Page 5 of 18 Min Max Unit −40 −40 3.0 +85 +125 20 1.0 °C °C V ms ADuM3190 Data Sheet DIN V VDE V 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS These isolators are suitable for reinforced isolation only within the safety limit data. Maintenance of the safety data is ensured by protective circuits. The asterisk (*) marking branded on the package denotes DIN V VDE V 0884-10 approval for a 565 V peak working voltage. Table 6. Description Installation Classification per DIN VDE 0110 For Rated Mains Voltage ≤ 150 V rms For Rated Mains Voltage ≤ 300 V rms For Rated Mains Voltage ≤ 400 V rms Climatic Classification Pollution Degree per DIN VDE 0110, Table 1 Maximum Working Insulation Voltage Input-to-Output Test Voltage, Method B1 Test Conditions/Comments VIORM × 1.875 = Vpd(m), 100% production test, tini = tm = 1 sec, partial discharge < 5 pC Input-to-Output Test Voltage, Method A After Environmental Tests Subgroup 1 VIORM × 1.5 = Vpd(m), tini = 60 sec, tm = 10 sec, partial discharge < 5 pC VIORM × 1.2 = Vpd(m), tini = 60 sec, tm = 10 sec, partial discharge < 5 pC After Input and/or Safety Test Subgroup 2 and Subgroup 3 Highest Allowable Overvoltage Surge Isolation Voltage Safety Limiting Values VPEAK = 10 kV; 1.2 µs rise time; 50 µs, 50% fall time Maximum value allowed in the event of a failure (see Figure 2) Case Temperature Safety Total Dissipated Power Insulation Resistance at TS VIO = 500 V Symbol Characteristic Unit VIORM Vpd(m) I to IV I to III I to II 40/105/21 2 565 1059 V peak V peak Vpd(m) 848 V peak Vpd(m) 678 V peak VIOTM VIOSM 4000 6250 V peak V peak TS PS RS 150 1.64 >109 °C W Ω 1.8 SAFE LIMITING POWER (W) 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0 0 50 100 150 AMBIENT TEMPERATURE (°C) 200 11335-004 0.2 Figure 2. Thermal Derating Curve, Dependence of Safety Limiting Values on Case Temperature, per DIN V VDE V 0884-10 Rev. A | Page 6 of 18 Data Sheet ADuM3190 ABSOLUTE MAXIMUM RATINGS Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. TA = 25°C, unless otherwise noted. Table 7. Parameter Storage Temperature (TST) Range Ambient Operating Temperature (TA) Range Junction Temperature Supply Voltages VDD1, VDD21 VREG1, VREG21 Input Voltages (+IN, −IN) Output Voltages REFOUT, COMP, REFOUT1, EAOUT EAOUT2 Output Current per Output Pin Common-Mode Transients2 1 2 Rating −65°C to +150°C −40°C to +125°C −40°C to +150°C Table 8. Maximum Continuous Working Voltage1 −0.5 V to +24 V −0.5 V to +3.6 V −0.5 V to +3.6 V −0.5 V to +3.6 V −0.5 V to +5.5 V −11 mA to +11 mA −100 kV/µs to +100 kV/µs All voltages are relative to their respective grounds. Refers to common-mode transients across the insulation barrier. Commonmode transients exceeding the absolute maximum ratings may cause latch-up or permanent damage. Parameter WAVEFORM AC Voltage Bipolar Unipolar DC Voltage 1 Max Unit Constraint 565 1131 1131 V peak V peak V peak 50-year minimum lifetime 50-year minimum lifetime 50-year minimum lifetime Refers to continuous voltage magnitude imposed across the isolation barrier. See the Insulation Lifetime section for more details. ESD CAUTION Rev. A | Page 7 of 18 ADuM3190 Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 1 16 VDD2 2 15 GND2 14 VREG2 VREG1 3 REFOUT1 4 ADuM3190 13 REFOUT NC 5 TOP VIEW (Not to Scale) 12 +IN EAOUT2 6 11 –IN EAOUT 7 10 COMP GND1 8 9 GND2 NC = NO CONNECTION. CONNECT PIN 5 TO GND1; DO NOT LEAVE THIS PIN FLOATING. 11335-005 VDD1 Figure 3. Pin Configuration Table 9. Pin Function Descriptions Pin No. 1 2 3 4 5 6 Mnemonic VDD1 GND1 VREG1 REFOUT1 NC EAOUT2 7 8 9 10 11 12 13 14 15 16 EAOUT GND1 GND2 COMP −IN +IN REFOUT VREG2 GND2 VDD2 Description Supply Voltage for Side 1 (3.0 V to 20 V). Connect a 1 μF capacitor between VDD1 and GND1. Ground Reference for Side 1. Internal Supply Voltage for Side 1. Connect a 1 μF capacitor between VREG1 and GND1. Reference Output Voltage for Side 1. The maximum capacitance for this pin (CREFOUT1) must not exceed 15 pF. No Connection. Connect Pin 5 to GND1; do not leave this pin floating. Isolated Output Voltage 2, Open-Drain Output. Connect a pull-up resistor between EAOUT2 and VDD1 for current up to 1 mA. Isolated Output Voltage. Ground Reference for Side 1. Ground Reference for Side 2. Output of the Op Amp. A loop compensation network can be connected between the COMP pin and the −IN pin. Inverting Op Amp Input. Pin 11 is the connection for the power supply setpoint and compensation network. Noninverting Op Amp Input. Pin 12 can be used as a reference input. Reference Output Voltage for Side 2. The maximum capacitance for this pin (CREFOUT) must not exceed 15 pF. Internal Supply Voltage for Side 2. Connect a 1 μF capacitor between VREG2 and GND2. Ground Reference for Side 2. Supply Voltage for Side 2 (3.0 V to 20 V). Connect a 1 μF capacitor between VDD2 and GND2. Rev. A | Page 8 of 18 Data Sheet ADuM3190 TYPICAL PERFORMANCE CHARACTERISTICS 3 1.228 VDDx = 20V VDDx = 5V REFOUT ACCURACY (V) 1.227 IDD1 (mA) 2 1 1.226 1.225 1.224 –20 0 20 40 60 80 100 120 140 TEMPERATURE (°C) 1.222 –40 11335-017 0 –40 0 20 40 60 80 100 120 140 TEMPERATURE (°C) Figure 4. Typical IDD1 Supply Current vs. Temperature 5 –20 11335-020 1.223 Figure 7. REFOUT Accuracy vs. Temperature 1.0 VDDx = 20V VDDx = 5V EAOUT ACCURACY (%) IDD2 (mA) 4 3 2 0.5 0 –0.5 0 20 40 60 80 100 120 140 TEMPERATURE (°C) –1.0 –40 2 OP AMP OFFSET VOLTAGE (mV) 10 8 6 4 2 20 40 60 80 100 120 TEMPERATURE (°C) 140 40 60 80 100 120 140 120 140 1 0 –1 –2 –3 –40 11335-019 INPUT BIAS CURRENT (nA) 3 0 20 Figure 8. EAOUT Accuracy vs. Temperature 12 –20 0 TEMPERATURE (°C) Figure 5. Typical IDD2 Supply Current vs. Temperature 0 –40 –20 –20 0 20 40 60 80 100 TEMPERATURE (°C) Figure 6. +IN, −IN Input Bias Current vs. Temperature Figure 9. Op Amp Offset Voltage vs. Temperature Rev. A | Page 9 of 18 11335-022 –20 11335-018 0 –40 11335-021 1 Data Sheet 0 90 –20 EAOUT OFFSET (mV) 100 80 70 60 –40 –60 –20 0 20 40 60 80 100 120 140 TEMPERATURE (°C) –100 –40 20 40 60 80 100 120 140 Figure 13. EAOUT Offset Voltage vs. Temperature 1.05 100 EAOUT2 OFFSET VOLTAGE (mV) 1.04 EAOUT GAIN (V/V) 0 TEMPERATURE (°C) Figure 10. Op Amp Open-Loop Gain vs. Temperature 1.03 1.02 –20 0 20 40 60 80 100 120 140 TEMPERATURE (°C) 11335-024 1.01 1.00 –40 –20 50 0 –50 –100 –40 –20 0 20 40 60 80 100 120 140 TEMPERATURE (°C) Figure 11. EAOUT Gain vs. Temperature Figure 14. EAOUT2 Offset Voltage vs. Temperature 2.66 2.64 2.62 2.60 2 2.56 –40 –20 0 20 40 60 80 100 TEMPERATURE (°C) 120 140 CH1 10mV Ω CH2 10mV Ω M4.0µs A CH1 T 102.4ns 1.18V Figure 15. Output Noise with Test Circuit 1 (10 mV/DIV), Channel 1 = EAOUT, Channel 2 = EAOUT2 Figure 12. EAOUT2 Gain vs. Temperature Rev. A | Page 10 of 18 11335-028 2.58 11335-025 EAOUT2 GAIN (V/V) 1 11335-027 50 –40 11335-026 –80 11335-023 OP AMP OPEN-LOOP GAIN (dB) ADuM3190 ADuM3190 30 30 25 25 NUMBER OF AMPLIFIERS 20 15 10 5 15 10 0.95 1.00 1.05 1.10 COMP TO EAOUT GAIN (V/V) 0 –0.4 30 30 25 25 20 15 10 5 0.4 20 15 10 1.05 1.10 0 –0.4 –0.2 0 0.2 0.4 COMP TO EAOUT OFFSET VOLTAGE (V) 11335-120 1.00 11335-117 0.95 Figure 17. EAOUT Gain Distribution at 125°C Figure 20. EAOUT Offset Voltage Distribution at 125°C 30 25 25 NUMBER OF AMPLIFIERS 30 20 15 10 5 20 15 10 5 0.95 1.00 1.05 COMP TO EAOUT GAIN (V/V) 1.10 11335-118 NUMBER OF AMPLIFIERS 0.2 5 COMP TO EAOUT GAIN (V/V) 0 0.90 0 Figure 19. EAOUT Offset Voltage Distribution at 25°C NUMBER OF AMPLIFIERS NUMBER OF AMPLIFIERS Figure 16. EAOUT Gain Distribution at 25°C 0 0.90 –0.2 COMP TO EAOUT OFFSET VOLTAGE (V) 11335-119 5 11335-116 0 0.90 20 Figure 18. EAOUT Gain Distribution at −40°C 0 –0.4 –0.2 0 0.2 COMP TO EAOUT OFFSET VOLTAGE (V) Figure 21. EAOUT Offset Voltage Distribution at −40°C Rev. A | Page 11 of 18 0.4 11335-121 NUMBER OF AMPLIFIERS Data Sheet ADuM3190 Data Sheet 30 NUMBER OF AMPLIFIERS 25 20 15 1 10 5 1.225 1.230 1.235 EAOUT ACCURACY (V) 11335-122 3 1.220 Figure 22. EAOUT Accuracy Voltage Distribution at 25°C CH1 100mV Ω CH2 100mV Ω CH3 200mV Ω M2µs T 0s A CH1 434mV 11335-029 2 0 1.215 Figure 25. Output 100 kHz Signal with Test Circuit 3, Channel 1 = +IN, Channel 2 = EAOUT, Channel 3 = EAOUT2 30 NUMBER OF AMPLIFIERS 25 20 2 1 15 3 10 1.220 1.225 1.230 1.235 EAOUT ACCURACY (V) 30 20 15 10 5 1.225 1.230 1.235 EAOUT ACCURACY (V) 11335-124 NUMBER OF AMPLIFIERS 25 1.220 CH2 50mV Ω M2µs A CH1 T 5.92µs 399mV Figure 26. Output Square Wave Response with Test Circuit 3, Channel 1 = +IN, Channel 2 = EAOUT, Channel 3 = EAOUT2 Figure 23. EAOUT Accuracy Voltage Distribution at 125°C 0 1.215 CH1 20mV Ω CH3 20mV Ω Figure 24. EAOUT Accuracy Voltage Distribution at −40°C Rev. A | Page 12 of 18 11335-030 0 1.215 11335-123 5 Data Sheet ADuM3190 TEST CIRCUITS VDD1 1µF GND1 1µF VREG1 1 16 2 15 REG 3 REFOUT1 4 UVLO UVLO REF REF NC 5 GND2 1µF VREG2 1µF REFOUT 13 12 Tx EAOUT2 6 EAOUT 11 Rx 7 10 8 9 +IN –IN 680Ω COMP 2.2nF GND2 11335-002 GND1 14 REG VDD2 Figure 27. Test Circuit 1: Accuracy Circuit Using EAOUT VDD1 1µF GND1 1µF VREG1 1 16 2 15 REG 3 REFOUT1 4 ROD UVLO REF 12 11 Rx GND2 1µF VREG2 1µF REFOUT 13 Tx 6 7 10 8 9 +IN –IN 680Ω COMP 2.2nF GND2 11335-003 GND1 14 REG REF NC 5 EAOUT2 EAOUT UVLO VDD2 Figure 28. Test Circuit 2: Accuracy Circuit Using EAOUT2 GND1 1µF VREG1 ROD 1 16 2 15 REG 3 REFOUT1 4 UVLO EAOUT GND1 6 14 REG REF REF NC 5 EAOUT2 UVLO 12 11 7 10 8 9 Figure 29. Test Circuit 3: Isolated Amplifier Circuit Rev. A | Page 13 of 18 GND2 1µF VREG2 1µF 13 REFOUT Tx Rx VDD2 +IN –IN COMP GND2 11335-031 VDD1 1µF ADuM3190 Data Sheet APPLICATIONS INFORMATION THEORY OF OPERATION In the test circuits of the ADuM3190 (see Figure 27 through Figure 29), external supply voltages from 3 V to 20 V are provided to the VDD1 and VDD2 pins, and internal regulators provide 3.0 V to operate the internal circuits of each side of the ADuM3190. An internal precision 1.225 V reference provides the reference for the ±1% accuracy of the isolated error amplifier. UVLO circuits monitor the VDDx supplies to turn on the internal circuits when the 2.8 V rising threshold is met and to turn off the error amplifier outputs to a high impedance state when VDDx falls below 2.6 V. approximately 100 kHz, but the circuit is more stable with a phase shift of approximately −120°, which yields a stable 60° phase margin. This circuit is used for accuracy tests only, not for real-world applications, because it has a 680 Ω resistor across the isolation barrier to close the loop for the error amplifier; this resistor causes leakage current to flow across the isolation barrier. For this test circuit only, GND1 must be connected to GND2 to create a return for the leakage current created by the 680 Ω resistor connection. AMPLITUDE (dB) The op amp on the right side of the device has a noninverting +IN pin and an inverting −IN pin available for connecting a feedback voltage in an isolated dc-to-dc converter output, usually through a voltage divider. The COMP pin is the op amp output, which can be used to attach resistor and capacitor components in a compensation network. The COMP pin internally drives the Tx transmitter block, which converts the op amp output voltage into an encoded output that is used to drive the digital isolator transformer. 100 OP AMP AND LINEAR ISOLATOR OP AMP ALONE LINEAR ISOLATOR POLE AT 400kHz 100 1k 10k 100k 1M 10M FREQUENCY (Hz) LINEAR ISOLATOR PHASE (°) 100 1k 10k 100k 1M 10M FREQUENCY (Hz) –90 On the left side of the ADuM3190, the transformer output PWM signal is decoded by the Rx block, which converts the signal into a voltage that drives an amplifier block; the amplifier block produces the error amplifier output available at the EAOUT pin. The EAOUT pin can deliver ±3 mA and has a voltage level between 0.4 V and 2.4 V, which is typically used to drive the input of a PWM controller in a dc-to-dc circuit. 11335-006 –180 Figure 30. Bode Plot 1 AMPLITUDE (dB) OP AMP AND LINEAR ISOLATOR 100 LINEAR ISOLATOR POLE AT 400kHz For applications that need more output voltage to drive their controllers, Figure 28 illustrates the use of the EAOUT2 pin output, which delivers up to ±1 mA with an output voltage of 0.6 V to 4.8 V for an output that has a pull-up resistor to a 5 V supply. If the EAOUT2 pull-up resistor connects to a 10 V to 20 V supply, the output is specified to a minimum of 5.0 V to allow use with a PWM controller requiring a minimum input operation of 5 V. 1k 10k 100k 1M OP AMP ALONE FREQUENCY (Hz) 10M 1k 10k 100k 1M 10M INTEGRATOR CONFIGURATION 100 PHASE (°) 100 FREQUENCY (Hz) –90 ACCURACY CIRCUIT OPERATION See Figure 27 and Figure 28 for stability of the accuracy circuits. The op amp on the right side of the ADuM3190, from the −IN pin to the COMP pin, has a unity-gain bandwidth (UGBW) of 10 MHz. Figure 30, Bode Plot 1, shows a dashed line for the op amp alone and its 10 MHz pole. Figure 30 also shows the linear isolator alone (the blocks from the op amp output to the ADuM3190 output, labeled as the linear isolator), which introduces a pole at approximately 400 kHz. This total Bode plot of the op amp and linear isolator shows that the phase shift is approximately −180° from the −IN pin to the EAOUT pin before the crossover frequency. Because a −180° phase shift can make the system unstable, adding an integrator configuration, as shown in the test circuits in Figure 27 and Figure 28, consisting of a 2.2 nF capacitor and a 680 Ω resistor, helps to make the system stable. In Figure 31, Bode Plot 2 with an integrator configuration added, the system crosses over 0 dB at 11335-007 –180 Figure 31. Bode Plot 2 ISOLATED AMPLIFIER CIRCUIT OPERATION Figure 29 shows an isolated amplifier circuit. In this circuit, the input side amplifier is set as a unity-gain buffer so that the EAOUT output follows the +IN input. The EAOUT2 output follows the EAOUT output, but with a voltage gain of 2.6. This circuit has an open-drain output, which must be pulled up to a supply voltage from 3 V to 20 V using a resistor value set for an output current of up to 1 mA. The EAOUT2 output can be used to drive up to 1 mA to the input of a device that requires a minimum input operation of 5 V. The EAOUT2 circuit has an internal diode clamp to protect the internal circuits from voltages greater than 5 V. Rev. A | Page 14 of 18 Data Sheet ADuM3190 The gain, offset, and linearity of EAOUT and EAOUT2 are specified in Table 1 using this test circuit. When designing applications for voltage monitoring using an isolated amplifier, review these specifications, noting that the 1% accuracy specifications for the isolated error amplifier do not apply. In addition, the EAOUT circuit in Figure 29 is shown with an optional external RC low-pass filter with a corner frequency of 500 kHz, which can reduce the 3 MHz output noise from the internal voltage to the PWM converter. APPLICATION BLOCK DIAGRAM Figure 32 shows a typical application for the ADuM3190: an isolated error amplifier in primary side control. PWM CONTROLLER FB COMP LO LATCHING PWM VOUT DCR POWER STAGE CO CURRENT SENSE + ESR C1 COMPENSATION NETWORK COMP R2 OP AMP ADuM3190 1.225V –IN +IN REFOUT The 400 kHz bandwidth of the ADuM3190 error amplifier output offers faster loop response for better transient response than the typical shunt regulator and optocoupler solutions, which typically have bandwidths of only 25 kHz to 50 kHz maximum. 11335-008 EAOUT2 C2 Figure 32. Application Block Diagram The op amp of the ADuM3190 is used as the error amplifier for the feedback of the output voltage, VOUT, using a resistor divider to the −IN pin of the op amp. This configuration inverts the output signal at the COMP pin when compared to the +IN pin, which is connected to the internal 1.225 V reference. SETTING THE OUTPUT VOLTAGE The output voltage in the application circuit can be set with two resistors in a voltage divider, as shown in Figure 33. The output voltage is determined by the following equation where VREF = 1.225 V. For example, when the output voltage, VOUT, falls due to a load step, the divider voltage at the −IN pin falls below the +IN reference voltage, causing the COMP pin output signal to go high. The COMP output of the op amp is encoded and then decoded by the digital isolator transformer block to a signal that drives the output of the ADuM3190 high. The output of the ADuM3190 drives the COMP pin of the PWM controller, which is designed to reset the PWM latch output to low only when its COMP pin is low. A high at the COMP pin of the PWM controller causes the latching PWM comparator to produce a PWM duty cycle output. This PWM duty cycle output drives the power stage to increase the VOUT voltage until it returns to regulation. The power stage output is filtered by output capacitance and, in some applications, by an inductor. Various elements contribute to the gain and phase of the control loop and the resulting stability. The output filter components (LO and CO) create a double pole; the op amp has a pole at 10 MHz (see Figure 30), and the linear isolator has a pole at 400 kHz (see Figure 30 and Figure 31). The output capacitor and its ESR can add a zero at a frequency that is dependent on the component type and values. With the ADuM3190 providing the error amplifier, a compensation network is provided from the −IN pin to the COMP pin to compensate VOUT = VREF × (R1 + R2)/R2 (1) VOUT ISOLATED DC-TO-DC SUPPLY R1 –IN VIN = 0.35V TO 1.5V +IN ERROR AMP VREF 1.225V R2 REFOUT ADuM3190 11335-010 ERROR AMP The ADuM3190 has two different error amplifier outputs: EAOUT and EAOUT2. The EAOUT output, which can drive ±3 mA, has a guaranteed maximum high output voltage of at least 2.4 V, which may not be sufficient to drive the COMP pin of some PWM controllers. The EAOUT2 pin can drive ±1 mA and has an output range that guarantees 5.0 V for a VDD1 voltage range of 10 V to 20 V, which works well with the COMP pin of many PWM controllers. Figure 32 shows how to use the ADuM3190 to provide isolated feedback in the control loop of an isolated dc-to-dc converter. In this application block diagram, the loop is closed at approximately the 1.225 V reference voltage, providing ±1% accuracy over temperature. The ADuM3190 op amp has a high gain bandwidth of 10 MHz to allow the dc-to-dc converter to operate at high switching speeds, enabling smaller values for the output filter components (LO and CO). VIN OSC VREF the control loop for stability. The compensation network values depend on both the application and the components that are selected; information about the component network values is provided in the data sheet of the selected PWM controller. Figure 33. Setting the Output Voltage DOSA MODULE APPLICATION Figure 34 is a block diagram of a Distributed-power Open Standards Alliance (DOSA) circuit using the ADuM3190. The block diagram shows how to use the ADuM3190 1.225 V reference and the error amp in a DOSA standard power supply module circuit to produce output voltage settings using a combination of resistors. The ADuM3190 1.225 V reference is specified for ±1% over the −40°C to +125°C temperature range. See Table 10 to select the resistor values to set the output voltage of the module. Two different ranges of VOUT can be implemented, VOUT > 1.5 V or VOUT < 1.5 V, depending on the required module. Rev. A | Page 15 of 18 ADuM3190 Data Sheet VOUT OPTIONAL TRIM UP OR TRIM DOWN RESISTOR OR ±10% OF NOMINAL VALUE ACCORDING TO DOSA R3 VREF 1.225V R5 R4 100 RTRIM-DOWN 11335-011 R6 Figure 34. DOSA Module Table 10. Resistor Values for DOSA Module Module Nominal Output VOUT > 1.5 V VOUT < 1.5 V VOUT > 1.5 V VOUT < 1.5 V R3 1 kΩ 1 kΩ 5.11 kΩ 5.11 kΩ R4 1 kΩ 0Ω 5.11 kΩ 0Ω R5 0Ω 2.05 kΩ 0Ω 10.5 kΩ R6 Open 1.96 kΩ Open 10.0 kΩ DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY Positive and negative logic transitions at the isolator input cause narrow (~1 ns) pulses to be sent to the decoder via the transformer. The decoder is bistable and is, therefore, either set or reset by the pulses, indicating input logic transitions. In the absence of logic transitions of more than 1 μs at the input, a periodic set of refresh pulses indicative of the correct input state are sent to ensure dc correctness at the output. If the decoder receives no internal pulses for more than approximately 3 μs, the input side is assumed to be unpowered or nonfunctional, in which case the isolator output is forced to a default high impedance state by the watchdog timer circuit. In addition, the outputs are in a default high impedance state while the power is increasing before the UVLO threshold is crossed. The ADuM3190 is immune to external magnetic fields. The limitation on the ADuM3190 magnetic field immunity is set by the condition whereby induced voltage in the transformer receiving coil is sufficiently large to either falsely set or reset the decoder. The following analysis defines the conditions under which this can occur. The 3 V operating condition of the ADuM3190 is examined because it represents the most susceptible mode of operation. The pulses at the transformer output have an amplitude that is greater than 1.0 V. The decoder has a sensing threshold at approximately 0.5 V, therefore establishing a 0.5 V margin within which induced voltages are tolerated. The voltage induced across the receiving coil is given by 2 V = (−dβ/dt) ∑π rn , n = 1, 2, … , N 10 1 0.1 0.01 0.001 1k 10k 100k 1M 10M 100M MAGNETIC FIELD FREQUENCY (Hz) 11335-012 R2 ERROR AMP ADuM3190 RTRIM-UP Figure 35. Maximum Allowable External Magnetic Flux Density For example, at a magnetic field frequency of 1 MHz, the maximum allowable magnetic field of 0.02 kgauss induces a voltage of 0.25 V at the receiving coil. This is approximately 50% of the sensing threshold and does not cause a faulty output transition. Similarly, if such an event were to occur during a transmitted pulse (and had the worst-case polarity), the received pulse is reduced from >1.0 V to 0.75 V, still well above the 0.5 V sensing threshold of the decoder. The preceding magnetic flux density values correspond to specific current magnitudes at given distances away from the ADuM3190 transformers. Figure 36 shows these allowable current magnitudes as a function of frequency for selected distances. As shown in Figure 36, the ADuM3190 is immune and can be affected only by extremely large currents operating at a high frequency very close to the component. For the 1 MHz example, a 0.7 kA current must be placed 5 mm away from the ADuM3190 to affect the operation of the device. 1000 where: β is the magnetic flux density (gauss). rn is the radius of the nth turn in the receiving coil (cm). N is the number of turns in the receiving coil. DISTANCE = 1m 100 10 DISTANCE = 100mm 1 DISTANCE = 5mm 0.1 0.01 1k 10k 100k 1M 10M MAGNETIC FIELD FREQUENCY (Hz) Figure 36. Maximum Allowable Current for Various Current-to-ADuM3190 Spacings Rev. A | Page 16 of 18 100M 11335-013 VIN = 0.35V TO 1.5V MAXIMUM ALLOWABLE MAGNETIC FLUX DENSITY (kgauss) R1 Given the geometry of the receiving coil in the ADuM3190 and an imposed requirement that the induced voltage be, at most, 50% of the 0.5 V margin at the decoder, a maximum allowable magnetic field is calculated, as shown in Figure 35. MAXIMUM ALLOWABLE CURRENT (kA) DOSA MODULE Data Sheet ADuM3190 The values shown in Table 8 summarize the peak voltage for 50 years of service life for a bipolar ac operating condition. In many cases, the approved working voltage is higher than the 50-year service life voltage. Operation at these high working voltages can lead to shortened insulation life in some cases. The ADuM3190 insulation lifetime depends on the voltage waveform type imposed across the isolation barrier. The iCoupler insulation structure degrades at different rates depending on whether the waveform is bipolar ac, unipolar ac, or dc. Figure 37, Figure 38, and Figure 39 illustrate these different isolation voltage waveforms. A bipolar ac voltage environment is the worst case for the iCoupler products yet meets the 50-year operating lifetime recommended by Analog Devices for maximum working voltage. In the case of unipolar ac or dc voltage, the stress on the insulation is sig- Rev. A | Page 17 of 18 RATED PEAK VOLTAGE 11335-014 Analog Devices performs accelerated life testing using voltage levels higher than the rated continuous working voltage. Acceleration factors for several operating conditions are determined. These factors allow calculation of the time to failure at the actual working voltage. Note that the voltage presented in Figure 38 is shown as sinusoidal for illustration purposes only. It is meant to represent any voltage waveform varying between 0 V and some limiting value. The limiting value can be positive or negative, but the voltage cannot cross 0 V. 0V Figure 37. Bipolar AC Waveform RATED PEAK VOLTAGE 11335-015 All insulation structures eventually break down when subjected to voltage stress over a sufficiently long period. The rate of insulation degradation is dependent on the characteristics of the voltage waveform applied across the insulation. In addition to the testing performed by the regulatory agencies, Analog Devices carries out an extensive set of evaluations to determine the lifetime of the insulation structure within the ADuM3190. nificantly lower. This allows operation at higher working voltages while still achieving a 50-year service life. Treat any cross-insulation voltage waveform that does not conform to Figure 38 or Figure 39 as a bipolar ac waveform, and limit its peak voltage to the 50-year lifetime voltage value listed in Table 8. 0V Figure 38. Unipolar AC Waveform RATED PEAK VOLTAGE 11335-016 INSULATION LIFETIME 0V Figure 39. DC Waveform ADuM3190 Data Sheet PACKAGING AND ORDERING INFORMATION OUTLINE DIMENSIONS 0.197 (5.00) 0.193 (4.90) 0.189 (4.80) 16 9 0.158 (4.01) 0.154 (3.91) 0.150 (3.81) 1 8 0.010 (0.25) 0.006 (0.15) 0.069 (1.75) 0.053 (1.35) 0.065 (1.65) 0.049 (1.25) 0.010 (0.25) 0.004 (0.10) COPLANARITY 0.004 (0.10) 0.244 (6.20) 0.236 (5.99) 0.228 (5.79) 0.025 (0.64) BSC SEATING PLANE 0.012 (0.30) 0.008 (0.20) 8° 0° 0.050 (1.27) 0.016 (0.41) 0.020 (0.51) 0.010 (0.25) 0.041 (1.04) REF 09-12-2014-A COMPLIANT TO JEDEC STANDARDS MO-137-AB CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 40. 16-Lead Shrink Small Outline Package [QSOP] (RQ-16) Dimensions shown in inches and (millimeters) ORDERING GUIDE Model1, 2 ADuM3190ARQZ ADuM3190ARQZ-RL7 ADuM3190BRQZ ADuM3190BRQZ-RL7 ADuM3190SRQZ ADuM3190SRQZ-RL7 ADuM3190TRQZ ADuM3190TRQZ-RL7 ADuM3190WSRQZ ADuM3190WSRQZ-RL7 ADuM3190WTRQZ ADuM3190WTRQZ-RL7 EVAL-ADuM3190EBZ 1 2 Temperature Range −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C Bandwidth (Typical) 200 kHz 200 kHz 400 kHz 400 kHz 200 kHz 200 kHz 400 kHz 400 kHz 200 kHz 200 kHz 400 kHz 400 kHz Package Description 16-Lead QSOP 16-Lead QSOP 16-Lead QSOP 16-Lead QSOP 16-Lead QSOP 16-Lead QSOP 16-Lead QSOP 16-Lead QSOP 16-Lead QSOP 16-Lead QSOP 16-Lead QSOP 16-Lead QSOP Evaluation Board Package Option RQ-16 RQ-16 RQ-16 RQ-16 RQ-16 RQ-16 RQ-16 RQ-16 RQ-16 RQ-16 RQ-16 RQ-16 Z = RoHS Compliant Part. W = Qualified for Automotive Applications. AUTOMOTIVE PRODUCTS The ADuM3190W models are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. Note that these automotive models may have specifications that differ from the commercial models; therefore, designers should review the Specifications section of this data sheet carefully. Only the automotive grade products shown are available for use in automotive applications. Contact your local Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for these models. ©2013–2015 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D11335-0-7/15(A) www.analog.com/ADuM3190 Rev. A | Page 18 of 18