Providing a Constant Current for Powering LEDs Using the

APPLICATION NOTE | AN:018
Providing a Constant Current for Powering LEDs
Using the PRM® and VTM®
By Joe Aguilar Product Line Applications Engineer
Contents
Page
Introduction
1
Background: Adaptive
Loop Regulation
2
Current Control Circuit 4
Overview
4
VI Chip Selection
(PRM, VTM)
5
Current Sensing
Sub-Circuit
6
Differential and
Error Amplifier
Selection (U2)
6
Shunt (Current Sense) 6
Resistor (R1) Selection
Differential Amplifier 7
Gain (R2 Through R5)
Voltage Reference
(U1)
7
Voltage Limiting
Sub-Circuit
9
Compensation
10
Components (R6 ,C2)
Voltage Supply (VH) 12
Startup Sequencing of 13
the Current Regulation
Circuit
Current Regulation
Accuracy
15
Layout Considerations 16
Conclusion
16
Appendix A
Design Example
17
Introduction
Light Emitting Diodes (LEDs) require a constant current for proper operation. The VI Chip®
PRM® Regulator and VTM® Current Multiplier are designed to provide a regulated voltage
using the Adaptive Loop Method of regulation (for further information please see
www.vicorpower.com/documents/whitepapers/fpa101.pdf. In order to use the PRM and VTM to
power an LED, it is therefore necessary to modify the operation of the PRM to provide a regulated
current. This application note provides guidelines for implementing a constant current source using
the PRM and VTM.
Using the PRM and VTM to provide a constant current provides several advantages over
conventional approaches. The implementation of a VTM in a system provides point of load current
multiplication. The output current of a VTM is proportional to its input current by the following
equation:
I OUT =
I IN
K
Equation 1
Thus in a controlled current application, the input current to the VTM can be sensed and regulated
to control the output current. Sensing a lower current requires a smaller sensor which dissipates
lower power and improves overall efficiency. Also the VI Chips themselves provide high efficiency
and high power density, making the overall LED system small and cool and maximizing the output
in Lumens per watt of dissipation. The overall system architecture is illustrated in Figure 1.
A complete design example is covered in Appendix A, using the techniques outlined in this
application note.
Some LEDs require a pulsed current in order to operate properly. Pulsed-current operation will be
covered in a future application note, due to bandwidth limitations of the circuit configuration
proposed here. Also most known LED types can be driven with a single PRM + VTM pair. Parallel
operation of PRMs and VTMs to provide a regulated current is not addressed in this application
note.
Regulated
Current
IIN
PRM
IN+
VIN
VTM
OUT+
IN+
+
–
IOUT =
Current
Sense
IN-
Regulated
Current
IOUT
OUT-
IN-
LED
OUT+
IIN
K
OUT-
SC
Feedback
Current Amplifier
Figure 1
Regulated Current Source
Basic Architecture
Control Signal
+
Compensator
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Page 1
Background: Adaptive Loop Regulation
This application note requires a basic understanding of VI Chips, and Factorized Power
Architecture (FPA), including Adaptive Loop regulation. Please refer to the following link
(www.vicorpower.com/documents/whitepapers/fpa101.pdf) for more information.
Before starting, the user should have a defined set of system design requirements. These
requirements should include: output current set point, output voltage range, and current
regulation accuracy. In most cases the specific data sheet of the LED or LED array will define many
of the requirements for properly designing this circuit. It is important that the V-I characteristics of
the end device (LED) are well understood to ensure that the circuit can provide the desired current
within the voltage limitations of the PRM® and VTM®.
The PRM is pre-configured with an internal voltage loop that regulates the output voltage of the
PRM to a set value.
The internal workings of the PRM should be well understood, as the external constant current
circuit has been designed to work in conjunction with the internal voltage control loop, changing
the PRM voltage reference in order to regulate the VTM output current.
A simplified block diagram of the PRM internal voltage control loop is shown in Figure 2.
Figure 2
Functional diagram of PRM
Internal Error Amplifier
PRM_VOUT
C
R
R68
OS
PRM_Controller
–
0.961 x VSC
+
PRM Error Amplifier
1.24 V
SC
10 k
+
_
0.22 µF
SG
An internal reference is generated and connected to the SC port of the PRM through a 10 k
resistor and a 0.22 µF capacitor, which provides a soft-start. The SC voltage can be adjusted by
adding an external resistor, or by applying an external voltage. The applied voltage at the SC port
should not exceed 6 Vdc.
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The SC voltage is buffered and fed to the error amplifier through a resistive divider represented by
the gain block of 0.961. R68 forms the top half of the voltage-sensing resistive divider. This resistor
is fixed for each PRM®. Please refer to table 1 for R68 values for each PRM. The bottom half of
the divider is formed by adding a resistor from the OS pin to SG (ROS). Equation 2 defines the
PRM output as a function of VSC and ROS. From Equation 2, it is seen that for a given ROS resistor,
adjusting the SC voltage will determine the PRM output voltage. This is the method by which the
external current control circuit will control the output.
Equation 2
PRM _ VOUT =
0.961 × VSC × ( R68 + ROS )
ROS
Where:
VSC is the voltage at the SC pin of the PRM.
ROS is the resistance from OS to SG of the PRM.
R68 is the PRM internal resistor specified in Table 1.
Table 1
PRM Internal R68 Values
PRM
P048-048-24AL
VIN
36 – 75 V
P048-048-12AL
P048-048-12AL
POUT
240 W
120 W
38 – 55 V
P045-048-17AL
320 W
93.1 k
170 W
P024-048-12AL
18 – 36 V
120 W
P036-048-12AL
18 – 60 V
120 W
MP028F036M12AL
16 – 50 V
120 W
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Current Control Circuit
Overview
The recommended current control circuit is shown below in Figure 3.
Figure 3
Constant Current Circuit
NC
VH
PC
SC
TM
SG
SG
C4
PRM
IL
R13
OS
PR
VC
+IN
+OUT
VH
R7
+OUT
VEAO
PC
TM
VTM
R9
VC
L1
+IN
PRM_VOUT
-OUT
+IN
CIN
-IN
+OUT
+OUT
R8 SG
-OUT
-OUT
-IN
R1
-OUT
-IN
Shunt
VH
R3
R10
VREF
R2
R11
C3
SG
Voltage Reference
C1
SG
3+
C2
VSENSE
U _A
2_ 2
U1
R12
VH
SG
R6
6
VREF
R4
SG
R5
Differential Amplifier
5
_
U2_B
7
+
VEAO
Error Amplifier
As the VTM® is a current multiplier, the output current of the VTM can be regulated by its input
current. The advantage of this approach is that the current can be sensed prior to the VTM
current multiplication stage (at the higher voltage), reducing the I2R power dissipation in the
external shunt. In addition, the control circuitry remains on the primary (PRM®) side, eliminating
the need for isolating the feedback signal.
The circuit consists of a voltage reference, shunt resistor, differential amplifier, and error
amplifier. Low-side sensing is implemented at the output of the PRM using an op amp
configured as a differential amplifier. The voltage across the shunt resistor (R1) is sensed and
amplified with a gain determined by resistors R2 through R5. The reference voltage is generated
using a precision adjustable shunt reference, and is tied to the non-inverting terminal of the
error amplifier. This is the voltage to which the error amplifier will compare the differential
amplifier output (VSENSE). The output of the error amplifier (VEAO) is tied to SC through resistors
R7 and R8, allowing for the adjustment of the PRM output set point. The error amplifier will
adjust the PRM output voltage until VSENSE is equal to the reference voltage VREF.
The recommended circuit components are shown in Table 2.
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Table 2
Recommended Values
Ref Des
Value / Part Number
Manufacturer
R1
CSM25120R010BXX
Vishay
R2
R4
R3
R5
R6
R7
R8
R9*
R10
R11
R12
R13
C1
C2
C3
C4
U1
TLV431B
TI
U2
AD8667
Analog Devices
Description
Current Sense Resistor,
10 mΩ,1 W, 0.1%, 2512
1k
Resistor, 0.1% 1k
100 k
Resistor, 0.1%, 100 k
16.2 k
2.15 k
1.24 k
4.99 k*
User Defined
User Defined
User Defined
10 k
0.01 µF
0.1 µF
User Defined
0.01 µF
Resistor, 1%, 16.2 k
Resistor, 1%, 2.15 k
Resistor, 1%, 1.24 k
Resistor, 1%, 4.99 k*
Dependent on Reference Voltage
Dependent on Reference Voltage
Dependent on Reference Voltage
Resistor, 1%, 10 k
Capacitor, Ceramic, 0.01 µF
Capacitor, 0.1 µF
Dependant on Startup
Capacitor,Ceramic, 0.01 µF
3 terminal, Adjustable,
Precision Shunt Regulator
Low Noise, Precision,
16 V Dual Op amp
Link
CSM2512
TLV431B
*If using MP028F036M12AL use 4.12 k for R9
The following are general guidelines to select the appropriate components for a straightforward,
cost-effective solution with minimal component count. As there are many ways in which the
circuit may be implemented, the recommended configuration may not be ideal for every
application. This application note should contain enough detail for the end user to modify the
circuit to fit their end application.
Some aspects of the circuit, such as startup timing, are difficult to predict and therefore must be
tested and tuned to the individual application. It is up to the user to perform the necessary
system testing and troubleshooting to successfully qualify the implementation of this circuit in
their end application.
VI Chip Selection (PRM®, VTM®)
Select the PRM based on input voltage range and power level. Different load voltage
requirements are addressed by appropriate VTM selection. To select a VTM, the following
parameters must be known:
• Maximum output current.
• Minimum and maximum operating output voltage.
Refer to the web (www.vicorpower.com/dc-dc-converters-board-mount/vtm) to determine if there
is a VTM which will provide the desired current over the specified voltage range of the intended
load device. Then, refer to the specific product data sheet for information on operation and
performance.
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Current Sensing Sub-circuit
Figure 4
Current Sense Components
R1
-IN
Shunt
VH
R3
C1
SG
3+
R2
VSENSE
SG
U _A
2_2
1
SG
R4
R5
Differential Amplifier
Although there are other techniques, the recommended method of current sensing is low-side
sensing using a differential amplifier.
Differential and Error Amplifier Selection (U2)
The use of a dual op amp for the differential amplifier and error amplifier is recommended in
order to minimize component count. Since the overall bandwidth of the system will be limited,
the amplifier selection should optimize the current sensing accuracy. Critical parameters, which
contribute directly to accuracy, are the input offset voltage and input offset current. These
parameters should be kept as low as possible to minimize current sensing error. Amplifier current
draw will also need to be considered when selecting a voltage supply.
The recommended amplifier is Analog Devices AD8667.
The key parameters are summarized in Table 3. Refer to the manufacturer’s data sheet for
further information.
Table 3
AD8667 Parameters
Parameter
Offset Voltage Max
Offset Current Max
Bias Current Max
Supply Current per Amplifier
Max
Symbol
VOS
IOS
IB
Value
450
65
105
Units
µV
pA
pA
Conditions
-40<TAMB<125
-40<TAMB<125
-40<TAMB<125
ISY
325
µA
-40<TAMB<125
Shunt (Current Sense) Resistor (R1) Selection
As with the amplifier, the shunt resistor has a significant impact on the current sensing accuracy.
If the expected resistance of the shunt varies by 5%, so too will the expected shunt voltage,
resulting in an equivalent current sense error. It is, therefore, critical to select a shunt resistor
within the desired tolerance of the current source accuracy. The magnitude of the shunt voltage
should be large relative to the amplifier’s input offset voltage to avoid further inaccuracy. In
addition, the presence of the shunt contributes to additional power loss. Its value should be kept
low to minimize power dissipation. The recommended shunt is the Vishay CSM25120R010B.
This is a 10 mΩ, 0.1% tolerance, 1 W, 2512 metal foil, four-terminal resistor with Kelvin test
points for voltage sensing. At 5 A, this part will dissipate approximately 250 mW of power.
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Differential Amplifier Gain (R2 through R5)
For a given shunt value, the gain of the differential amplifier will determine the necessary
reference voltage to achieve a desired output current. Assuming R2 is equal to R4, and R3 is
equal to R5, the output of the differential amplifier is defined by Equation 3.
VSENSE = VSHUNT ⋅ (
Equation 3
R3
)
R2
Where:
VSENSE is the differential amplifier output.
VSHUNT is the voltage across the shunt (R1 ).
The recommended values equate to a gain of 100, resulting in a differential amplifier output of
1 V per Amp of PRM® current when using a 10 mΩ shunt.
Voltage Reference (U1)
The VTM® has the following input/output characteristics, illustrated in Figure 5:
1)
PIN = VIN ⋅ IIN
2)
POUT = VOUT ⋅ IOUT
3)
VOUT = VIN ⋅ K − IOUT ⋅ ROUT
4)
POUT = PIN ⋅ η
Figure 5
VTM Operation
IIN
+
VIN
–
IOUT
VTM
K
η
ROUT
+
VOUT
–
Based on the above relationships, Equation 4 can be solved for the necessary VTM input current
when given output current, output voltage, VTM efficiency, and VTM output resistance. This is
important since the PRM current control circuit will control the input current to the VTM.
Equation 4
VTM _ IIN = PRM _ IOUT =
VOUT ⋅ IOUT ⋅ K
η ⋅ (VOUT + IOUT ⋅ ROUT )
Where:
IOUT is the desired output current of the VTM.
VOUT is the nominal output voltage of the VTM.
h is the nominal efficiency of the VTM at the given output.
ROUT is the nominal output resistance of the VTM.
K is the transformation ratio of the VTM.
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Based on the current sensing component selection, the required reference voltage can be
determined by Equation 5.
VREF = PRM _ IOUT ⋅ R1 ⋅ (
Equation 5
R3
)
R2
Where:
VREF is the voltage reference.
PRM_IOUT is the necessary PRM current from Equation 4.
R1 is the shunt resistor.
R3, and R2 are the differential amplifier gain resistors.
For the values given in Table 2,
R1 ⋅ (
R3
) = 1 and therefore, VREF = PRM_IOUT
R2
There are multiple options available for generating the reference voltage.
One simple approach is to use an adjustable shunt regulator such as the TLV431B.
Figure 6
Reference Components
VH
R10
VREF
R11
C3
U1
R12
SG
Voltage Reference
When selecting R10 and C3, refer to the manufacturer’s recommendations to ensure stability.
Bear in mind that these components will also affect the startup timing, as described in a later
section. Resistors R11 and R12 are used to adjust the output. The tolerance of these resistors will
have a direct effect on accuracy; high precision resistors should be used. The current draw of the
device should be kept below 1 mA for the recommended configuration to stay within the 5 mA
limit of VH.
This approach assumes that the reference voltage will be adjusted to achieve the correct output
current based on a given shunt and differential amplifier gain. An alternative approach would be
to fix the reference and adjust the gain to obtain the desired output current.
In this case Equation 5 can be rearranged and the gain of the differential amplifier can be
calculated for a given reference voltage, PRM output current and shunt.
Equation 6
(
R3
VREF
)=
R2
PRM _ IOUT ⋅ R1
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Voltage Limiting Sub-circuit
Figure 7
Voltage Limiting Components
R7
SC
VEAO
R8
SG
SG
R9
OS
The resistors R7 and R8 are required to limit the maximum voltage that appears on SC when the
error amplifier is at its maximum. The resistor R9 is selected to limit the maximum PRM® output
voltage during this condition.
The internal SC capacitor (0.22 µF) will create a pole with the equivalent resistance formed by
the parallel combination of R7, R8, and the internal 10 kΩ resistor.
Equation 7
Equation 8
REQ =
1
1 + 1 + 1
R 7 R8 10 kΩ
FPOLE =
1
2 ⋅ π ⋅ REQ ⋅ (0.22 µF)
This pole will limit the bandwidth of the error amplifier, as described in the next section. FPOLE
can be increased by decreasing R7 and R8; however, this will also increase the amount of current
necessary to drive SC. When using VH as the supply, FPOLE should be limited to 1 kHz maximum.
In order to select the appropriate components, the following should be defined:
1) The maximum output voltage of the error amplifier when saturated: VEAO(MAX).
2) The maximum SC voltage when the error amplifier is saturated: VSC(MAX).
3) The maximum PRM output voltage: PRM_VOUT(MAX).
4) The SC pole frequency: FPOLE.
The recommended value for VSC(MAX) is 3 V. The absolute maximum voltage rating for the PRM
SC port is 6 V, and this value should be avoided with margin to prevent damage to internal
components. R7 and R8 will be selected based on VSC(MAX), VEAO(MAX) and FPOLE using Equations 9
and 10:
Equation 9
R7 =
10 kΩ ⋅VEAO (MAX )
10 kΩ ⋅VSC (MAX ) ⋅ 2π ⋅ FPOLE ⋅ 0.22 μF −1.24 V
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Equation 10
R8 =
10 kΩ ⋅ R 7 ⋅ VSC (MAX )
10 kΩ⋅ VEAO (MAX ) + 1.24 V⋅ R 7 − VSC (MAX ) ⋅ (10 kΩ + R 7)
Where:
VEAO(MAX) is the maximum error amplifier output voltage.
VSC(MAX) is the maximum SC voltage.
FPOLE is the SC pole frequency (Equation 7).
Once the maximum SC voltage has been defined, R9 can be selected to limit the maximum
PRM® output voltage as defined in Equation 11:
Equation 11
R9 = (
R 68 ⋅ VSC (MAX ) ⋅ 0.961
)
PRM _VOUT (MAX ) − VSC (MAX ) ⋅ 0.961
The recommended components are designed to provide a maximum PRM output voltage that
will not exceed its maximum rating. The parameters used for selecting these components are
shown in Table 4.
Table 4
Parameters
Parameter
VEAO(MAX)
VSC(MAX)
FPOLE
PRM_VOUT(MAX)
Value
8.6 V
3V
1 kHz
*56 V
*51 V maximum for MP028F036M12AL
Compensation Components (R6, C2)
Figure 8
Error Amplifier Components
C2
VSENSE
R6
6
VREF
5
–
U2_B
+
7
VEAO
Error Amplifier
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The compensation for this circuit consists of a single pole with the frequency response described
by Equation 12 and shown in Figure 9. Starting at the origin (f = 0 Hz), the gain will decrease at a
slope of -20 dB/decade when plotted vs. frequency on a log/linear scale. The crossover frequency
(FCROSS) of the error amplifier is determined by R6 and C2 as described in Equation 13.
Equation 12
Equation 13
G(dB) = 20 ⋅ log(
FCROSS =
Figure 9
Error Amplifier Frequency
Response
1
)
2π ⋅ R 6 ⋅ C 2 ⋅ f
1
2π ⋅ R6 ⋅ C 2
Error Amplifier Frequency Response
60
40
20
Gain (dB)
FCROSS=
1
2π •R6•C2
0
-20
-40
-60
1
10
100
1000
10000
100000
Frequency (Hz)
In order to insure stability, the error amplifier crossover frequency (FCROSS) should be limited to a
factor of 10 below the SC pole frequency.
Equation 14
FCROSS =
FPOLE
10
Rearranging the terms in Equation 13 allows for solving for the product of R6 and C2 to achieve
the desired crossover frequency. The recommended values will provide a crossover frequency of
approximately 100 Hz.
Equation 15
R 6 ⋅ C2 =
1
2π ⋅ FCROSS
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Voltage Supply (VH)
The recommended configuration is to power the op amp and reference using VH. VH is an
auxiliary 9 V supply generated internally by the PRM®. It is limited to 5 mA of current, and 0.1 µF
of capacitance. If the recommended configuration has been changed, the maximum expected
current draw should be determined to ensure that the 5 mA limit is not exceeded.
If necessary, one method for increasing the capability of VH is shown in Figure 10.
Figure 10
Increasing VH source capability
PRM_VOUT
VH
R14
Q1
VH
R7
VEAO
SC
VS
R8
The transistor Q1 is added as an emitter follower between the output and the supply rail (VS). R14
is sized to limit the maximum VH current draw. Since the majority of the power is now sourced
through the PRM output, the limitation in supply current is determined by the transistor thermal
limitations. The STMicro STN715 transistor allows for an 18 mA capability at an 85°C ambient
temperature, and a 55 V PRM output voltage.
External supplies can be used if available, provided that the supply is primary referenced.
Additional considerations for startup sequencing will need to be taken into account as described
in the next section.
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Startup Sequencing of the Current Regulation Circuit
A typical PRM® startup sequence is shown in Figure 11. From the application of input power,
there is a delay prior to the PRM beginning to ramp its output voltage. At this time, VH and VC
are generated. VC is a pulse of approximately 10 msec, which allows the VTM® to temporarily
operate below its minimum input of 26 V. With the VC pulse applied, the VTM output will track
its input from 0 V, resulting in a soft start. The SC voltage directly controls the rate of rise of the
PRM output. The same sequence would occur if enabling through the PC pin, the only difference
being the delay time.
Figure 11
PRM Startup from
Application of VIN
The startup timing for the constant current circuit is controlled not only by the rise time of VREF,
but also the magnitude of the reference voltage, and the error amplifier compensation components.
The compensation components, R6 and C2, limit the maximum rate of rise of the error amplifier
output, leading to two startup timing conditions. The first is illustrated in Figure 12, where the
rate of rise of the reference is below the maximum rate of the error amplifier. In this case, the
output of the error amplifier is able to track the reference; and the result is an output current rise
that closely matches that of the reference voltage.
Figure 12
Constant Current Startup Condition 1
The second condition is where the rate of rise of VREF exceeds the maximum rate of the error
amplifier. In this case the error amplifier output will change its rate of rise in order force a current
through C2 and R6 temporarily equalizing the voltages at pin 5 and pin 6. This is illustrated in
Figure 13. As the output current increases during the startup sequence, the necessary slope
decreases until output current feedback is able to satisfy the error amplifier.
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Figure 13
Constant Current Startup Condition 2
The startup timing for this condition is dependant on the magnitude of the reference voltage, and
the characteristics of the load. Higher reference voltages will have a faster rise time, while lower
reference voltages will have a slower rise time. To ensure a proper start-up, the VTM® input
voltage must reach 26 V within the 10 ms VC pulse duration. If the voltage is too low, the VTM
will be unable to sustain its internal VCC when the VC voltage drops, and will subsiquently shut
down. This puts a limitation on maximum rise time, and thus the minimum allowable reference
voltage for a given C2 and R6. Low reference voltage set points may result in a condition where
the output rise time is slower than the minimum 10msec to ensure a proper startup. In this case,
the user should adjust the gain of the current sense amplifier to ensure that the reference voltage
is high enough at the desired output current to ensure a proper start. Once running, the current
can be trimmed down to a lower level without issue. An alternative solution would be to start at
a higher output current and then trim down once the unit is up and running.
When powering the circuit from VH, the amplifier supply voltage and reference will not be generated
until VH is present. This is the instant at which the PRM® is able to respond to a control signal. If
the supply and reference were present prior to this instant, the circuit would not have a controlled
start. The error amplifier would rail in an unsuccessful attempt to bring the current up to the
appropriate value. This is an undesirable situation. Once the PRM is enabled, the control signal
would be at a maximum, forcing the PRM to its maximum voltage with no control over the rate
of rise.
The rise of the voltage reference must be synchronized to the VH signal to ensure that the error
amplifier voltage remains low until the PRM is ready to respond to a control signal. The circuit
shown in Figure 14 is one example of a modification of the circuit shown in Figure 6 which
enables operation with an external supply.
Figure 14
Reference Sequencing Circuit
VS
R 10
VH
VREF
R 11
Q2
Q3
C5
U1
R 12
C
*VS is an external supply
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Current Regulation Accuracy
The fact that the current control is done at the VTM® input adds additional complexity as
variations in the VTM parameters and load voltage will lead to errors in the current set point. The
contributing factors to the overall accuracy are the current sensing accuracy, reference accuracy,
and variation in the VTM efficiency, VTM ROUT, and VOUT.
The current sensing accuracy is mostly determined by the magnitude of the input offset voltage
of the AD8667 with respect to the shunt voltage. The offset error can be approximated by
Equation 16.
Equation 16
Offset _ %Error = (
VOFFSET
) ⋅ 100
VSHUNT
Where:
VOFFSET is the specified offset voltage of the op amp.
VSHUNT is the shunt voltage at the operating current.
Since the shunt voltage is a function of load the offset error will vary with load current and will be
worse at lighter loads. If the maximum current is consistently low, consider increasing the shunt
value for improved accuracy.
The other contributing factors to the accuracy are the expected variation in the load voltage,
VTM® Rout and VTM efficiency. When using the values for efficiency given in the data sheet, the
expected variation is ±1%. This percentage error caries over to the overall accuracy.
The effect of ROUT and VOUT variation is dependent on nominal operating conditions and can be
predicted by Equation 17 and Equation 18:
Equation 17
Voltage _ % Error =
Equation 18
ROUT _ % Error =
V%
⋅ 100
K ⋅ VOUT ⋅ (1 + V %)
(1 −
)
I IN ⋅ ROUT ⋅ η
R%
K ⋅ VOUT
(
− (1 + R %)
I IN ⋅ ROUT ⋅ η
⋅ 100
Where:
IIN is the set VTM input current
VOUT is the nominal output voltage of the load device
V% is the % variation of the load voltage
ROUT is the nominal output resistance of the VTM
R% is the percent variation in ROUT (from data sheet)
K is the VTM input to output ratio
h is the nominal efficiency (from data sheet)
AN:018
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Table 5 summarizes the contributing factors to the overall error.
Table 5
Current Source Error
Error Source
Shunt Tolerance
Differential Amplifier
Offset
Differential Amplifier
Gain
TLV431B Reference
TLV431 Divider
VTM Efficiency
VTM ROUT
Error (%)
±0.1
Offset _ %Error = (
ROUT _ % Error =
(
VOFFSET
) ⋅ 100
VSHUNT
Load Dependent
±0.2
0.1% Tolerance Resistors
±0.5
±0.2
±1
0.1% Tolerance Resistors
R%
⋅ 100
K ⋅ VOUT
− (1 + R %)
I ⋅R
⋅η
Equation 18
V%
⋅ 100
K ⋅ VOUT ⋅ (1 + V %)
)
I IN ⋅ ROUT ⋅ η
Equation 17
Voltage _ % Error =
VOUT
Comments
0.1% Tolerance Shunt
(1 −
If the overall accuracy is not acceptable, the current sensing stage can be moved to the output of
the VTM®. As the VTM is an isolated device, this will require the addition of an opto coupler to
transfer the feedback signal to the primary side. The implementation of this additional stage is
beyond the scope of this document. Please contact Vicor applications engineering for additional
information if required.
Layout Considerations
Application Note AN:005 details board layout using VI Chip components. Additional consideration
must be given to the external current control circuit components.
The shunt voltage is on the millivolt level and is highly sensitive to noise. As such, current sensing
circuitry should be located close to the shunt to avoid routing the sense signal over any distance.
A 4 terminal Kelvin contact shunt is recommended for best results, eliminating error caused by
solder resistance from the shunt to the current carrying connection on the PCB.
The control signal from the sense circuit to the PRM should be shielded. Avoid routing this signal
directly underneath the PRM® if possible. Components that tie directly to the PRM should be
located close to their respective pins. It is also critical that all components be referenced to SG,
and that SG not be tied to any other ground in the system, including –IN and –OUT of the PRM.
Ensure that there is no unintentional bypass path which effectively shorts the shunt resistor.
Conclusion
The high power density and high efficiency of VI Chips can be used to power LEDs and other
loads requiring regulated current operation by using the circuit and guidelines discussed in this
document. Appendix A covers a complete design example using the Constant Current LED Driver
Demonstration board.
For additional assistance, circuit, schematic, or board layout review please contact Vicor
Applications Engineering at:
Tel: 800-735-6200
Customer Service: [email protected]
Technical Support: [email protected]
AN:018
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Page 16
Appendix A - Design Example
An application requires that eight, 1 A Opto-Semiconductor LED strings be placed in parallel for
appropriate luminance intensity. The current control accuracy required is ±5%. The forward
voltage of the cells in question ranges from 20 V to 30 V and is nominally 25 V. The input voltage
is 48V ±10%. The maximum ambient temperature is 50°C.
1) Select the appropriate VTM® from the product listing:
V048F320T009 is chosen due to its operating voltage range of 17.3 V to 36.7 V, and
a maximum output current of 9 A. This voltage and current range fall within the specification
of the LED string.
2) Find the required PRM® output current:
The efficiency plot of the V048F320T009 is located on the data sheet (Figure 3, pg. 3) and used
to determine the VTM efficiency, which is approximately 96.3% at 8 A.
Figure A1
V048F320T009 Efficiency vs. Load
Graph
96.3%
The nominal value for ROUT is found to be 79 mΩ from the output specifications table on pg. 2 of
the data sheet.
Figure A2
V048F320T009 Output Specifications
Table
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Using these numbers, and the nominal output voltage of the LED string (25 V), the necessary
PRM® output current is calculated for a VTM output current of 8 A using Equation 4 from the
Application Note.
VTM _ IIN = PRM _ IOUT =
25 V ⋅ 8 A ⋅ 2 3
VOUT ⋅ IOUT K
=
= 5.4 A
η⋅(VOUT + IOUT ⋅ ROUT ) 0.963 . (25 V + 8 A . 0.079 Ω)
The P045F048T32AL is selected for its 6.67 A output current capability and 38 V - 55 V input
voltage range.
3) Find the necessary reference voltage:
The recommended values for the shunt resistor, and gain resistors are used. Equation 5 is used to
determine the necessary reference voltage for a 5.4 A PRM output current.
VREF = PRM _ IOUT ⋅ R1 ⋅ (
R3
100 kΩ
) = 5.4 A . 10 mΩ . (
) = 5.4 V
1 kΩ
R2
Using a TLV431B shunt regulator, R11, and R12 are selected to provide a 5.4 V output using 0.1%
tolerance resistors. R10 is selected to limit the current to 1 mA.
R10 =
VH – VREF 9 V– 5.4 V
=
= 36 kΩ
1 mA
1 mA
The closest standard 1% value is selected as 35.7 KΩ.
4) Determine the maximum PRM output voltage:
The maximum PRM output voltage is selected to ensure that the PRM and VTM® can provide the
maximum operating voltage of 30 V taking into account the maximum output resistance
(ROUT(MAX)) of the VTM. For additional margin, the maximum output voltage is increased by 1 V.
PRM _VOUT (MAX ) =
(VOUT (MAX ) + IOUT ⋅ ROUT (MAX ) ) 31 V + 8 A ⋅(98 mΩ)
=
= 47.7 V
2
K
3
5) Find R7, R8 and R9:
The recommended parameters are used for the maximum SC voltage (VSC(MAX) = 3 V) and SC pole
frequency (FPOLE = 1 kHz) defined in Table 4. The maximum error amplifier output voltage
(VEAO(MAX)) is determined from the AD8667 data sheet which specifies the output dropout voltage
as a function of temperature on page 8
(www.analog.com/UploadedFiles/Data_Sheets/AD8663_AD8667_AD8669.pdf). At 50°C, the
dropout voltage is 250 mV, resulting in a VEAO(MAX) of 8.75 V.
Using Equation 9, R7 is calculated:
R7 =
10 kΩ ⋅ 8.75 V
10 kΩ ⋅VEAO (MAX )
=
= 2.4 KΩ
10 kΩ ⋅VSC (MAX ) ⋅ 2π ⋅ FPOLE ⋅ 0.22 μF −1.24 V 10 kΩ ⋅ 3 V ⋅ 2 π ⋅ 1 kHz ⋅ 0.22 µF – 1.24 V
AN:018
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The closest standard 1% value is selected as 2.37 kΩ
Using Equation 10, R8 is selected:
R8 =
10 kΩ⋅ R 7 ⋅ VSC (MAX )
10 kΩ⋅ VEAO (MAX ) + 1.24 V⋅ R 7 − VSC (MAX ) ⋅ (10 kΩ + R 7)
=
10 kΩ . 2.37 kΩ . 3 V
10 kΩ . 8.75 V + 1.24 V . 2.37 kΩ − 3 V . (10 kΩ + 2.37 kΩ)
= 1.33 kΩ
The closest standard 1% value is selected as 1.33 kΩ.
Using Equation 11, R9 is selected based on VSC(MAX), PRM_VOUT(MAX), and the R68 value
from Table 1:
R9 = (
kΩ ⋅ 3 V ⋅ 0.961
R 68 ⋅ VSC (MAX ) ⋅ 0.961
) = ( 93.1
PRM _VOUT (MAX ) − VSC (MAX ) ⋅ 0.961
47.7 V – 3 V ⋅ 0.961
) = 5.99 kΩ
The closest standard 1% value is selected as 6.04 kΩ.
6) Determine the compensation components R6 and C2
The crossover frequency is selected as 100 Hz which is a factor of 10 below the SC pole frequency
of 1 kHz.
C2 is fixed at a standard value of 0.1 µF, and R6 is calculated using Equation 15:
R6 =
1
1
=
= 15.9 kΩ
C 2 ⋅ 2π ⋅ FCROSS
0.1 µF ⋅ 2π ⋅ 100 Hz
The closest standard 1% value is selected as 16 kΩ.
7) Determine the overall accuracy:
The sources of error are specified in Table 5. These factors are added up to determine the overall
% error.
The shunt error is 0.1%.
The offset error is calculated using Equation 16, assuming a maximum input offset voltage of
300 µV for the AD8667 at 50°C.
Offset _ %Error = (
VOFFSET
300 μV
) ⋅100 = (
) ⋅100 = .55%
5.4 A ⋅10 mΩ
VSHUNT
The error due to the gain resistors is .2%
The error due to the voltage reference and resistors is .7%
The error due to variation in efficiency is 1%
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In order to calculate the error due to output voltage variation, the percent variation in the load
voltage from the nominal is calculated based on the specifications.
V% =
VMAX − VNOM 30 V − 25 V
=
= 20% = 0.2
25 V
VNOM
The maximum percent error due to this voltage variation is predicted using Equation 17.
Voltage _ %Error =
V%
0.2
⋅ 100 = 0.4%
⋅100 =
2 ⋅ 25V ⋅ (1+ 0.2)
K ⋅ VOUT ⋅ (1+ V %)
3
(1−
)
)
(1 −
IIN ⋅ ROUT ⋅ η
5.4 A ⋅ 79 mΩ ⋅ .963
In order to calculate the error due to variation in ROUT, the percent variation in ROUT from the
nominal is calculated based on the data sheet specifications.
R% =
ROUT (MAX ) − ROUT (NOM ) 98 mΩ − 79 mΩ
=
= 24% = 0.24
ROUT (NOM )
79 mΩ
The maximum percent error due to this variation is predicted from Equation 17.
ROUT _ %Error =
R%
0.24
x100 = 0.61%
x100 =
2
K ⋅ VOUT
⋅
25
V
3
− (1+ .24)
(
− (1+ R%)
5.4 A ⋅ 79 mΩ ⋅ 0.963
IIN ⋅ ROUT ⋅ η
The total error is the sum of all the errors.
Total _ %Error = Shunt _ %Error + Offset _ %Error + Gain _ %Error + Reference _ %Error
+ Efficiency _ %Error + VOUT _ %Error + ROUT _ %Error
Total _ %Error = 0.1% + 0.55% + 0.2% + 0.7% + 1.0% + 0.4% + 0.6% = 3.6%
Designing an LED driver circuit can be a challenging task due to the design variabilities and
unknowns which may occur during the process. A Constant Current LED Driver Demonstration
Board is available to assist in the design process. The board contains the basic circuit outlined in
AN:018 along with the ability to adjust the output voltage and current settings and match the
PRM with any standard VTM®. For further information please consult the User’s Guide (UG:007
www.vicorpower.com/documents/user_guides/vichip/ug-ConstantCurrent.pdf).
AN:018
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Applications Engineering: 800 927.9474
Page 20
Figure A3
Constant Current LED Driver
Demonstration Board
Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is
assumed by Vicor for its use. Vicor components are not designed to be used in applications, such as
life support systems, wherein a failure or malfunction could result in injury or death. All sales are
subject to Vicor’s Terms and Conditions of Sale, which are available upon request.
Specifications are subject to change without notice.
10/2013
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Rev 1.3
Page 21