BCR1003A3

CYStech Electronics Corp.
Spec. No. : C700A3
Issued Date : 2013.09.25
Revised Date
Page No. : 1/6
PNPN Epitaxial Planar SCR
BCR1003A3
Descriptions
The BCR1003A3 is designed for high volume consumer applications such as temperature, light, and speed
control; process and remote control, and warning systems where reliability of operation is important.
Features
• Practical level triggering and holding characteristics
• On state current rating of 0.35ARMS
• Sensitive gate allows triggering by microcontrollers and other logic circuits
• Pb-free lead plating and halogen-free package
Symbol
Outline
TO-92
BCR1003A3
G：Gate
A：Anode
K：Cathode
GAK
Ordering Information
Device
BCR1003A3-0-TB-G
BCR1003A3-0-BK-G
Package
TO-92
(Pb-free lead plating and halogen-free package)
TO-92
(Pb-free lead plating and halogen-free package)
Shipping
2000 pcs / Tape & Box
1000 pcs/ bag, 10 bags/box,
10boxes/carton
Environment friendly grade : S for RoHS compliant products, G for RoHS compliant and
green compound products
Packing spec, TB :2000 pcs/tape & box; BK: 1000 pcs / bag, 10 bags/box, 10 boxes/carton
Product rank, zero for no rank products
Product name
BCR1003A3
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C700A3
Issued Date : 2013.09.25
Revised Date
Page No. : 2/6
Absolute Maximum Ratings (TJ=25°C)
Parameter
Symbol
Limits
Unit
Peak Repetitive Off-State Voltage @TJ=-40℃ to 125℃, RGK=1KΩ
On-State Current @TC=80℃
Average On-State Current @ TC=80℃
Peak Non-repetitive Surge Current, half cycle, sine wave, 60Hz
Circuit Fusing Consideration (t=8.3ms)
Reverse Peak Gate Voltage @TA=25℃, Pulse Width≤1μs
Forward Peak Gate Current @TA=25℃, Pulse Width≤1μs
Forward Average Gate Power @ TA=25℃, t=8.3ms
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Case
Junction Temperature
Storage Temperature
Lead Solder Temperature(<1/16” from case, 10secs max)
VDRM
IT(RMS)
IT(AV)
ITSM
I²t
VGRM
IGM
PG(AV)
RθJA
RθJC
Tj
Tstg
TL
140
350
220
4
0.2
8
500
100
200
75
-40~+125
-40~+150
260
V
mA
mA
A
A²s
V
mA
mW
°C/W
°C/W
°C
°C
°C
Note : Stress exceeding maximum ratings may damage the device. Maximum ratings are stress ratings only. Functional
operation above the recommended operating conditions is not implied. Extended exposure to stresses above the
recommended operating conditions may affect device reliability.
VDRM can be applied on a continuous basis. Ratings apply for zero or negative gate voltage; however , positive gate
voltage shall not be applied concurrent with negative potential on the anode. Blocking voltage shall not be tested with
a constant current source such that the voltage ratings of the device are exceeded.
Characteristics (Ta=25°C)
Symbol
IDRM
IDRM
*VTM
IGT
IH
IL
VGT
dV/dt
dI/dt
BCR1003A3
Min.
Typ.
Max.
Unit
Test Conditions
25
30
-
100
10
1.5
100
3
6
0.8
-
μA
μA
V
μA
mA
mA
V
V/μs
A/μs
VD=140V, RGK=1KΩ, TC=125℃
VD=140V, RGK=1KΩ, TC=25℃
ITM=200mA
VD=7V, RL=100Ω
VD=7V, RGK=1KΩ
VD=7V, IG=200μA
VD=7V, RL=100Ω
VD=35V, RGK=1KΩ
IG=10mA, dIG/dt=100mA/μs, PW=10μs
*Pulse Test: Pulse Width ≤300μs, Duty Cycle≤2%
CYStek Product Specification
Spec. No. : C700A3
Issued Date : 2013.09.25
Revised Date
Page No. : 3/6
CYStech Electronics Corp.
Typical Characteristics
Gate Trigger Current vs Junction Temperature
Gate Trigger Voltage vs Junction Temperature
1
Gate Trigger Voltage---VGT(V)
Gate Trigger Current---I GT(μA)
70
60
50
40
30
20
10
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0
-50
-25
0
25
50
75
100
-50
125
-25
JunctionTemperature---TJ(℃)
100
125
Latching Current vs Junction Temperature
Holding Current vs Junction Temperature
1000
Latching Current---I L(μA)
10
Holding Current---I H(mA)
0
25
50
75
Junction Temperature---TJ(°C)
1
100
10
0.1
-50
-25
0
25
50
75
100
125
-50
-25
0
25
50
75
100
125
Junction Temperature---TJ(°C)
Junction Temperature---TJ(°C)
On-state Characteristics
Instantaneous On-state Current---IT (mA)
1000
TJ=125°C
TJ=25°C
100
TJ=-40°C
10
0
0.4
0.8
1.2
1.6
2
Instantaneous On-state Voltage---VT(V)
BCR1003A3
CYStek Product Specification
Spec. No. : C700A3
Issued Date : 2013.09.25
Revised Date
Page No. : 4/6
CYStech Electronics Corp.
TO-92 Taping Outline
H2
H2A H2A
H2
D2
A
L
H3
H4 H
L1
H1
D1
F1F2
T2
T
T1
DIM
A
D
D1
D2
F1,F2
F1,F2
H
H1
H2
H2A
H3
H4
L
L1
P
P1
P2
T
T1
T2
W
W1
-
BCR1003A3
P1
P
Item
Component body height
Tape Feed Diameter
Lead Diameter
Component Body Diameter
Component Lead Pitch
F1-F2
Height Of Seating Plane
Feed Hole Location
Front To Rear Deflection
Deflection Left Or Right
Component Height
Feed Hole To Bottom Of Component
Lead Length After Component Removal
Lead Wire Enclosure
Feed Hole Pitch
Center Of Seating Plane Location
4 Feed Hole Pitch
Over All Tape Thickness
Total Taped Package Thickness
Carrier Tape Thickness
Tape Width
Adhesive Tape Width
20 pcs Pitch
W1
W
D
P2
Millimeters
Min.
4.33
3.80
0.36
4.33
2.40
15.50
8.50
2.50
12.50
5.95
50.30
0.36
17.50
5.00
253
Max.
4.83
4.20
0.53
4.83
2.90
±0.3
16.50
9.50
1
1
27
21
11
12.90
6.75
51.30
0.55
1.42
0.68
19.00
7.00
255
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C700A3
Issued Date : 2013.09.25
Revised Date
Page No. : 5/6
Recommended wave soldering condition
Product
Pb-free devices
Peak Temperature
260 +0/-5 °C
Soldering Time
5 +1/-1 seconds
Recommended temperature profile for IR reflow
Profile feature
Average ramp-up rate
(Tsmax to Tp)
Preheat
−Temperature Min(TS min)
−Temperature Max(TS max)
−Time(ts min to ts max)
Time maintained above:
−Temperature (TL)
− Time (tL)
Peak Temperature(TP)
Time within 5°C of actual peak
temperature(tp)
Ramp down rate
Time 25 °C to peak temperature
Sn-Pb eutectic Assembly
Pb-free Assembly
3°C/second max.
3°C/second max.
100°C
150°C
60-120 seconds
150°C
200°C
60-180 seconds
183°C
60-150 seconds
240 +0/-5 °C
217°C
60-150 seconds
260 +0/-5 °C
10-30 seconds
20-40 seconds
6°C/second max.
6 minutes max.
6°C/second max.
8 minutes max.
Note : All temperatures refer to topside of the package, measured on the package body surface.
BCR1003A3
CYStek Product Specification
Spec. No. : C700A3
Issued Date : 2013.09.25
Revised Date
Page No. : 6/6
CYStech Electronics Corp.
TO-92 Dimension
Marking:
α2
A
Product Name
R1003
B
1
2
Date Code: Year+Month
3
Year: 4→2004, 5→2005
α3
C
Month: 1→1, 2→2, ‧‧‧,
9→9, A→10, B→11, C→12
D
H
I
□□
G
α1
Style: Pin 1.Gate 2.Anode 3.Cathode
E
F
3-Lead TO-92 Plastic Package
CYStek Package Code: A3
*: Typical
Inches
Min.
Max.
0.1704 0.1902
0.1704 0.1902
0.5000
0.0142 0.0220
*0.0500
0.1323 0.1480
DIM
A
B
C
D
E
F
Millimeters
Min.
Max.
4.33
4.83
4.33
4.83
12.70
0.36
0.56
*1.27
3.36
3.76
DIM
G
H
I
α1
α2
α3
Inches
Min.
Max.
0.0142 0.0220
*0.1000
*0.0500
*5°
*2°
*2°
Millimeters
Min.
Max.
0.36
0.56
*2.54
*1.27
*5°
*2°
*2°
Notes: 1.Controlling dimension: millimeters.
2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material.
3.If there is any question with packing specification or packing method, please contact your local CYStek sales office.
Material:
• Lead: Pure tin plated.
• Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0.
Important Notice:
• All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.
• CYStek reserves the right to make changes to its products without notice.
• CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.
• CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.
BCR1003A3
CYStek Product Specification