TL432M3

CYStech Electronics Corp.
Spec. No. : C504M3
Issued Date : 2003.03.21
Revised Date : 2013.10.23
Page No. : 1/15
Adjustable shunt regulator
TL432A3/N3/M3/K3
Description
Features
TheTL432 is a three terminal adjustable shunt
regulator with thermal stability guaranteed over
temperature. The output voltage can be adjusted
to any value from 1.24V(VREF) to 18V with two
external resistors. The TL432 has a typical dynamic
output impedance of 0.2Ω. Active output circuitry
provides a very sharp turn on characteristic, making
the TL432 an excellent replacement for zener diodes.
The TL432 shunt regulator is available with two
voltage tolerances(0.5%, and 1% ), and four package
options(TO-92, SOT-23, SOT-89 and TO-92L).
This allows the designer the opportunity to select the
optimum combination of cost and performance for
their application.
◆Low voltage operation(down to 1.24V)
◆Fast turn on response
◆Low dynamic output impedance 0.2Ω typ.
◆Trimmed bandgap design : ±0.5%
◆Sink current capability : 100mA
◆Available in TO-92, SOT-23, SOT-89, and
TO-92L packages
Applications
◆Linear Regulators
◆Adjustable Supplies
◆Switching Power Supplies
◆Battery Operated Computers
◆Instrumentation
◆Computer Disk Drives
Typical Application Circuit(Note 1,2)
Notes:
TL432
TL432A3/N3/M3/K3
1) Set VOUT according to the following equation:
VOUT=VREF(1+R1/R2)+IREFR1
2) Choose the value for R as follows:
˙The maximum limit for R should be such that the
cathode current, Iz, is greater than the minimum
operating current(80μA) at VIN(MIN).
˙The minimum limit for R should be as such that Iz
does not exceed 100mA under all load conditions,
and the instantaneous turn-on value for Iz does not
exceed 150mA. Both of the following conditions
must be met:
Rmin≥VIN(max)/150mA(to limit instantaneous
turn-on Iz)
Rmin≥ VIN(max)-VOUT
(to limit Iz under
IOUT(min)+100mA normal operating
conditions)
CYStek Product Specification
Spec. No. : C504M3
Issued Date : 2003.03.21
Revised Date : 2013.10.23
Page No. : 2/15
CYStech Electronics Corp.
Absolute Maximum Ratings
Parameter
Cathode Voltage
Continuous Cathode Current
Reference Input Current
Power Dissipation at TA=25℃
SOT-23
SOT-89
TO-92
TO-92L
Thermal Resistance
SOT-23
SOT-89
TO-92
TO-92L
Operating Ambient Temperature Range
Operating Junction Temperature Range
Storage Temperature Range
Symbol
Vz
IZ
IREF
Maximum
18
100
3
Units
V
mA
mA
0.18
0.4
0.5
0.72
PD
W
556
250
200
139
-40 to +85
-40 to +125
-65 to +150
θJA
TA
TJ
Tstg
℃/W
℃
℃
℃
Electrical Characteristics
Unless otherwise specified, TA=25℃. Values in bold apply over full operating ambient temperature range.
Parameter
Reference Voltage
Symbol
Condition
VREF VZ=VREF,IZ=10mA(Note 1)
VREF Temperature
Deviation
Ratio of Change in
VREF to change in VZ
Reference Input
Current
IREF Temperature
Deviation
Off-state Cathode
Current
Dynamic Output
Impedance
Minimum Operating
Current
VDEV VZ=VREF,IZ=10mA,TA=-40~
105°C(Note 1)
ΔVREF IZ=10mA, ΔVZ=18V to VREF
ΔVZ
IREF R1=10kΩ,R2=∞,
IZ=10mA(Note2)
IREF(DEV) R1=10kΩ,R2=∞,
IZ=10mA(Note 2)
IZ(OFF) VREF=0V,VZ=18V(Note 3)
rz
IZ(MIN)
f <1kHz,VZ=VREF
IZ=1mA to 100mA(Note 1)
VZ=VREF(Note 1)
TL432 A-rank(±0.5%)
TL432 B-rank(±1%)
Min
1.234
Typ
1.240
Max
1.246
Min
1.228
-
10
20
-
10
20
mV
-
-1
-2.0
-
-1
-2.0
mV/V
-
0.25
0.5
-
0.25
0.5
μA
-
0.05
0.3
-
0.05
0.3
μA
-
0.04
0.5
-
0.04
0.5
μA
-
0.2
0.4
-
0.2
0.4
Ω
-
60
80
-
60
80
μA
Typ
Max
1.240 1.252
Unit
V
Notes:
(1) See Test Circuit 1.
(2) See Test Circuit 2.
(3) See Test Circuit 3.
TL432A3/N3/M3/K3
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C504M3
Issued Date : 2003.03.21
Revised Date : 2013.10.23
Page No. : 3/15
Test Circuits
TL432A3/N3/M3/K3
CYStek Product Specification
Spec. No. : C504M3
Issued Date : 2003.03.21
Revised Date : 2013.10.23
Page No. : 4/15
CYStech Electronics Corp.
Block Diagram
Symbol
Cathode
Cathode
REF
REF
VREF
Anode
Anode
Ordering Information
Device
TL432A3-A-TB-G
TL432A3-B-TB-G
TL432A3-A-BK-G
TL432A3-B-BK-G
TL432K3-A-TB-G
TL432K3-B-TB-G
TL432K3-A-BK-G
TL432K3-B-BK-G
Package
TO-92
(Pb-free lead plating and
halogen-free package)
TL432N3-A-T1-G
SOT-23
(Pb-free lead plating and
halogen-free package)
TL432N3-B-T1-G
TL432M3-A-T1-G
TL432M3-B-T1-G
TL432A3/N3/M3/K3
TO-92L
(Pb-free lead plating and
halogen-free package)
SOT-89
(Pb-free lead plating and
halogen-free package)
Rank
A
B
A
B
A
B
A
B
Tolerance
±0.5%
±1%
±0.5%
±1%
±0.5%
±1%
±0.5%
±1%
A
±0.5%
B
±1%
A
±0.5%
B
±1%
Shipping
2000 pcs / Tape & Box
1000 pcs/ bag, 10 bags/box,
10boxes/carton
2000 pcs / Tape & Box
500 pcs/ bag, 10 bags/box,
10boxes/carton
3000 pcs / Tape & Reel
1000 pcs / Tape & Reel
CYStek Product Specification
Spec. No. : C504M3
Issued Date : 2003.03.21
Revised Date : 2013.10.23
Page No. : 5/15
CYStech Electronics Corp.
Typical Characteristics
Cathode Current vs Cathode Voltage
Cathode Current vs Cathode Voltage
150
Vz=VREF
TA=25℃
200
Cathode Current---Iz(mA)
Cathode Current---IZ(μA)
300
100
0
-100
Vz=VREF
TA=25℃
100
50
0
-50
-100
-200
-150
-1.5
-300
-1
-0.5
0
0.5
1
-1
-0.5
1.5
0
0.5
1
1.5
Cathode Voltage---Vz(V)
Cathode Voltage---Vz(V)
Reference Input Current vs Junction Temperature
Reference Voltage vs Junction Temperature
150
Iz=10mA
1.246
Reference Input Current---IREF(nA)
Reference Voltage---VREF(V)
1.248
1.244
1.242
1.24
1.238
IZ=60μA
1.236
1.234
-50
0
50
100
125
100
-50
-25
0
25
50
75
100
125
150
Junction Temperature---TJ(℃)
Off-State Cathode Current
vs Junction Temperature
Ratio of Delta Reference Voltage to Delta Cathode
Voltage vs Junction Temperature
250
Off-State Cathode Current---Iz
(off)(nA)
ΔVREF/ΔVz---(-mV/V)
75
50
150
Junction Temperature---TJ(℃)
1.2
1.1
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
Iz=10mA
R1=10kΩ
R2=∞
Iz=10mA
ΔVz=16V to VREF
VREF=0V
Vz=16V
200
150
100
Vz=6V
50
0
-50
-25
0
25
50
75
100
Junction Temperature---TJ(℃)
TL432A3/N3/M3/K3
125
150
-50
-25
0
25
50
75
100
125
150
Junction Temperature---TJ(℃)
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C504M3
Issued Date : 2003.03.21
Revised Date : 2013.10.23
Page No. : 6/15
Typical Characteristics (Cont.)
Reference Impedance vs Frequency
Reference Impedance vs Junction Temperature
100
0.5
0.4
0.35
Reference Impedance---rz(Ω)
Reference Impedance---rz(Ω)
TA=25℃
Iz=0.1 to 100mA
Vz=VREF
f<1kHz
0.45
0.3
0.25
0.2
0.15
0.1
0.05
-25
0
25
50
75
100
1
0.1
1000
0
-50
10
125 150
10000
1000000
Frequency---f(Hz)
Junction Temperature---TJ(℃)
Small-Signal Phase Shift vs Frequency
Small-Signal Gain vs Frequency
-180
Small-Signal Phase Shift---(Deg)
70
60
Small-Signal Gain---AV(dB)
100000
50
40
30
20
10
0
-225
-270
-315
-10
-360
-20
100
1000
10000
100000
100
1000000
Stability Boundary Condition For Shunt Regulation
vs Cathode Current and Load Capacitance
100000
1000000
Power Derating Curves
0.8
3.5
TO-92L
TA=25℃
Stable
Power Dissipation---PD(W)
3
Cathode Current---Iz(mA)
10000
Frequency---f(Hz)
Frequency---f(Hz)
2.5
1000
Stable
2
1.5
Vz=VREF
1
0.5
Vz=2V
TL432A3/N3/M3/K3
TO-92
SOT-89
0.4
SOT-23
0.2
0
0
0.001
0.6
0.01
0.1
1
Load Capacitance---CL(μF)
10
0
25
50
75
100
125
Junction Temperature---Tj(℃)
150
CYStek Product Specification
Spec. No. : C504M3
Issued Date : 2003.03.21
Revised Date : 2013.10.23
Page No. : 7/15
CYStech Electronics Corp.
Test Circuit-Small-Signal Gain and Phase
OUT
Test Circuit-Stability
R
Iz
15k
PL432
TL432
+
10μF
Iz
232
R1
CL
TL432
PL432
8.25k
R2
GND
Applications Information - Stability
Selection of load capacitance when using TL432 as a shunt regulator
When the TL432 is used as a shunt regulator, two options for selection of CL(see diagram on page 6)
are recommended for optimal stability:
1) No load capacitance across the device, decouple at the load.
2) Large capacitance across the device, optimal decoupling at the load.
The reason for this is that TL432 exhibits instability with capacitances in the range of 10nF to 1μF
(approx.) at light cathode currents(up to 3mA typical). The device is less stable the lower the cathode
voltage has been set for. Therefore while the device will be perfectly stable operating at a cathode
current of (say) 10mA with a 0.1μF capacitor across it, it will oscillate transiently during start-up as the
cathode current passes through the instability region. Selecting a very low (or preferably, no) capacitance, or alternatively a high capacitance(such as 10μF) will avoid this issue altogether. Since the user
will probably wish to have local decoupling at the load anyway, the most cost effective method is to use
no capacitance at all directly across the device. PCB trace/via resistance and inductance prevent the
local load decoupling from causing the oscillation during the transient start-up phase.
Note : if the TL432 is located right at the load, so the load decoupling capacitor is directly across it, then
this capacitor will have to be ≤1nF or ≥10μF.
TL432A3/N3/M3/K3
CYStek Product Specification
Spec. No. : C504M3
Issued Date : 2003.03.21
Revised Date : 2013.10.23
Page No. : 8/15
CYStech Electronics Corp.
TO-92 Taping Outline
H2
H2A H2A
H2
D2
A
H3
H4 H
L
L1
H1
W1
W
D1
F1F2
T2
T
T1
DIM
A
D
D1
D2
F1,F2
F1,F2
H
H1
H2
H2A
H3
H4
L
L1
P
P1
P2
T
T1
T2
W
W1
-
P1
P
P2
Item
Component body height
Tape Feed Diameter
Lead Diameter
Component Body Diameter
Component Lead Pitch
F1-F2
Height Of Seating Plane
Feed Hole Location
Front To Rear Deflection
Deflection Left Or Right
Component Height
Feed Hole To Bottom Of Component
Lead Length After Component Removal
Lead Wire Enclosure
Feed Hole Pitch
Center Of Seating Plane Location
4 Feed Hole Pitch
Over All Tape Thickness
Total Taped Package Thickness
Carrier Tape Thickness
Tape Width
Adhesive Tape Width
20 pcs Pitch
TL432A3/N3/M3/K3
D
Millimeters
Min.
4.33
3.80
0.36
4.33
2.40
15.50
8.50
2.50
12.50
5.95
50.30
0.36
17.50
5.00
253
Max.
4.83
4.20
0.53
4.83
2.90
±0.3
16.50
9.50
1
1
27
21
11
12.90
6.75
51.30
0.55
1.42
0.68
19.00
7.00
255
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C504M3
Issued Date : 2003.03.21
Revised Date : 2013.10.23
Page No. : 9/15
SOT-23 Reel Dimension
SOT-23 Carrier Tape Dimension
TL432A3/N3/M3/K3
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C504M3
Issued Date : 2003.03.21
Revised Date : 2013.10.23
Page No. : 10/15
SOT-89 Reel Dimension
SOT-89 Carrier Tape Dimension
TL432A3/N3/M3/K3
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C504M3
Issued Date : 2003.03.21
Revised Date : 2013.10.23
Page No. : 11/15
TO-92L Taping Outline
DIM
A1
A
T
d
d1
P
P0
P2
F1, F2
△h
W
W0
W1
W2
H
H0
L1
D0
t1
t2
P1
△P
Item
Millimeters
Component body width
Component body height
Component body thickness
Lead wire diameter
Lead wire diameter 1
Pitch of component
Feed hole pitch
Hole center to component center
Lead to lead distance
Component alignment, F-R
Tape width
Hole down tape width
Hole position
Hole down tape position
Height of component from tape center
Lead wire clinch height
Lead wire (tape portion)
Feed hole diameter
Taped lead thickness
Carrier tape thickness
Position of hole
Min.
4.70
7.80
3.70
0.40
0.62
12.40
12.50
6.05
2.20
-1.00
17.50
5.50
8.50
19.00
15.50
2.50
3.80
0.35
0.15
3.55
Max.
5.10
8.20
4.10
0.50
0.78
13.00
12.90
6.65
2.80
1.00
19.00
6.50
9.50
1.00
21.00
16.50
4.20
0.45
0.25
4.15
Component alignment
-1.00
1.00
TL432A3/N3/M3/K3
CYStek Product Specification
Spec. No. : C504M3
Issued Date : 2003.03.21
Revised Date : 2013.10.23
Page No. : 12/15
CYStech Electronics Corp.
TO-92 Dimension
Marking:
α2
A
B
1
2
3
Date Code
TL
432
□□
α3
C
D
H
I
G
α1
Style: Pin 1.Reference 2.Anode 3.Cathode
E
F
3-Lead TO-92 Plastic Package
CYStek Package Code: A3
*: Typical
Inches
Min.
Max.
0.1704 0.1902
0.1704 0.1902
0.5000
0.0142 0.0220
*0.0500
0.1323 0.1480
DIM
A
B
C
D
E
F
Millimeters
Min.
Max.
4.33
4.83
4.33
4.83
12.70
0.36
0.56
*1.27
3.36
3.76
DIM
G
H
I
α1
α2
α3
Inches
Min.
Max.
0.0142 0.0220
*0.1000
*0.0500
*5°
*2°
*2°
Millimeters
Min.
Max.
0.36
0.56
*2.54
*1.27
*5°
*2°
*2°
Notes: 1.Controlling dimension: millimeters.
2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material.
3.If there is any question with packing specification or packing method, please contact your local CYStek sales office.
Material:
• Lead: Pure tin plated.
• Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0.
TL432A3/N3/M3/K3
CYStek Product Specification
Spec. No. : C504M3
Issued Date : 2003.03.21
Revised Date : 2013.10.23
Page No. : 13/15
CYStech Electronics Corp.
SOT-23 Dimension
Marking:
432
3-Lead SOT-23 Plastic
Surface Mounted Package
CYStek Package Code: N3
Style:
Pin
1.Reference
3.Anode
2.Cathode
*: Typical
Inches
Min.
Max.
0.1102 0.1204
0.0472 0.0669
0.0335 0.0512
0.0118 0.0197
0.0669 0.0910
0.0000 0.0040
DIM
A
B
C
D
G
H
Millimeters
Min.
Max.
2.80
3.04
1.20
1.70
0.89
1.30
0.30
0.50
1.70
2.30
0.00
0.10
DIM
J
K
L
S
V
L1
Inches
Min.
Max.
0.0032 0.0079
0.0118 0.0266
0.0335 0.0453
0.0830 0.1161
0.0098 0.0256
0.0118 0.0197
Millimeters
Min.
Max.
0.08
0.20
0.30
0.67
0.85
1.15
2.10
2.95
0.25
0.65
0.30
0.50
Notes: 1.Controlling dimension: millimeters.
2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material.
3.If there is any question with packing specification or packing method, please contact your local CYCtek sales office.
Material:
• Lead: Pure tin plated.
• Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0.
TL432A3/N3/M3/K3
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C504M3
Issued Date : 2003.03.21
Revised Date : 2013.10.23
Page No. : 14/15
SOT-89 Dimension
2
1
month code: 1~9,
A,B,C
Marking:
A
3
Product
Name
H
C
Year code:
0→2010,
1→2011,
2→2012,
…etc.
D
B
E
Style: Pin 1. Reference 2. Anode
I
F
3. Cathode
G
3-Lead SOT-89 Plastic
Surface Mounted Package
CYStek Package Code: M3
*: Typical
Inches
Min.
Max.
0.1732 0.1811
0.1594 0.1673
0.0591 0.0663
0.0945 0.1024
0.01417 0.0201
DIM
A
B
C
D
E
Millimeters
Min.
Max.
4.40
4.60
4.05
4.25
1.50
1.70
2.40
2.60
0.36
0.51
DIM
F
G
H
I
Inches
Min.
Max.
0.0583 0.0598
0.1165 0.1197
0.0551 0.0630
0.0138 0.0161
Millimeters
Min.
Max.
1.48
1.527
2.96
3.04
1.40
1.60
0.35
0.41
Notes: 1.Controlling dimension: millimeters.
2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material.
3.If there is any question with packing specification or packing method, please contact your local CYStek sales office.
Material:
• Lead: Pure tin plated.
• Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0.
TL432A3/N3/M3/K3
CYStek Product Specification
Spec. No. : C504M3
Issued Date : 2003.03.21
Revised Date : 2013.10.23
Page No. : 15/15
CYStech Electronics Corp.
TO-92L Dimension
Marking:
Product Name
TL
432
□□
Date Code: Year+Month
Year: 7→2007, 8→2008
Month: 1→1, 2→2, ‧‧‧,
9→9, A→10, B→11, C→12
Style: Pin 1. Reference 2. Anode
3. Cathode
3-Lead TO-92L Plastic Package
CYStek Package Code: K3
Inches
DIM
Min.
0.146
0.050
0.014
0.024
0.014
0.185
0.157
Max.
0.161
0.062
0.022
0.031
0.018
0.201
-
Millimeters
Min.
Max.
3.700
4.100
1.280
1.580
0.350
0.550
0.600
0.800
0.350
0.450
4.700
5.100
4.000
-
A
A1
b
b1
c
D
D1
Notes: 1.Controlling dimension: millimeters.
DIM
E
e
e1
L
ϕ
h
Inches
Min.
0.307
Max.
0.323
*0.05
0.096
0.543
0.000
0.104
0.559
0.063
0.012
*: Typical
Millimeters
Min.
Max.
7.800
8.200
*1.270
2.440
2.640
13.800
14.200
1.600
0.000
0.300
2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material.
3.If there is any question with packing specification or packing method, please contact your local CYStek sales office.
Material:
• Lead: Pure tin plated.
• Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0.
Important Notice:
• All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.
• CYStek reserves the right to make changes to its products without notice.
• CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.
• CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.
TL432A3/N3/M3/K3
CYStek Product Specification