MTNN8453KQ8

CYStech Electronics Corp.
Spec. No. : C560Q8
Issued Date : 2012.04.30
Revised Date :
Page No. : 1/12
Asymmetric Dual N-Channel Enhancement Mode MOSFET
MTNN8453KQ8
FET1
30V
6.8A
15mΩ
23mΩ
BVDSS
ID
RDSON(TYP.)@VGS=10V
RDSON(TYP.)@VGS=4.5V
FET 2
30V
8.9A
15mΩ
23mΩ
Description
The MTNN8453KQ8 uses advanced trench technology to provide excellent RDS(on) and low gate charge.
The two MOSFETs make a compact and efficient switch and synchronous rectifier combination for use
in DC-DC converters. A Schottky diode in parallel with the synchronous MOSFET to boost efficiency
further.
The SOP-8 package is universally preferred for all commercial-industrial surface mount applications.
Features
• Simple drive requirement
• Low on-resistance
• Fast switching speed
• Pb-free lead plating and halogen-free package
Equivalent Circuit
MTNN8453KQ8
Outline
SOP-8
G：Gate
S：Source
D：Drain
MTNN8453KQ8
CYStek Product Specification
Spec. No. : C560Q8
Issued Date : 2012.04.30
Revised Date :
Page No. : 2/12
CYStech Electronics Corp.
Absolute Maximum Ratings (TC=25°C, unless otherwise noted)
Parameter
Symbol
Drain-Source Breakdown Voltage
Gate-Source Voltage
Continuous Drain Current
TA=25 °C, VGS=10V
(Note 2)
TA=70 °C, VGS=10V
Limits
BVDSS
FET 1
30
FET 2
30
VGS
±20
±20
6.8
8.9
5.4
7.1
30
30
ID
Pulsed Drain Current (Note 1)
IDM
Power Dissipation
PD
1.2 (Note 2)
2 (Note 2)
0.7 (Note 3)
1.1 (Note 3)
Unit
V
A
W
Tj; Tstg
-55~+150
°C
Symbol
Rth,j-c
Value
40
Unit
°C/W
°C/W
°C/W
Operating Junction and Storage Temperature Range
Thermal Data
Parameter
Thermal Resistance, Junction-to-case, max
Thermal Resistance, Junction-to-ambient, max
Rth,j-a
104
178
(Note 2)
(Note 3)
62.5 (Note 2)
114 (Note 3)
Note : 1.Pulse width limited by maximum junction temperature.
2.Surface mounted on 1 in² copper pad of FR-4 board, pulse width≤10s.
3.Surface mounted on minimum copper pad, pulse width≤10s.
FET 1 Electrical Characteristics (Tj=25°C, unless otherwise specified)
Symbol
Min.
Typ.
Max.
Unit
30
1.0
-
1.7
15
23
7.6
2.5
±100
1
10
20
28
-
V
V
nA
-
727
79
70
3.7
3.2
10
3.6
9.3
2.6
3.2
2.2
-
Test Conditions
Static
BVDSS
VGS(th)
IGSS
IDSS
*RDS(ON)
*GFS
Dynamic
Ciss
Coss
Crss
*td(ON)
*tr
*td(OFF)
*tf
*Qg
*Qgs
*Qgd
Rg
MTNN8453KQ8
S
VGS=0, ID=250μA
VDS=VGS, ID=250μA
VGS=±20V, VDS=0
VDS=30V, VGS=0
VDS=24V, VGS=0, Tj=125°C
VGS=10V, ID=6A
VGS=4.5V, ID=4A
VDS=5V, ID=5A
pF
VDS=15V, VGS=0, f=1MHz
ns
VDS=15V, ID=1A, VGS=10V, RG=3Ω
nC
VDS=15V, ID=6A, VGS=10V
Ω
VGS=15mV, VDS=0V, f=1MHz
μA
mΩ
CYStek Product Specification
CYStech Electronics Corp.
Body Diode
*IS
*ISM
*VSD
*trr
*Qrr
-
0.73
15
9
3
12
1
-
Spec. No. : C560Q8
Issued Date : 2012.04.30
Revised Date :
Page No. : 3/12
A
V
ns
nC
VGS=0V, IS=1A
IS=6A, VGS=0V, dI/dt=100A/μs
*Pulse Test : Pulse Width ≤300μs, Duty Cycle≤2%
FET 2 Electrical Characteristics (Tj=25°C, unless otherwise specified)
Symbol
Min.
Typ.
Max.
30
1.0
-
1.7
15
23
7.7
2.5
±100
50
25
20
28
-
-
727
105
70
3.7
3.2
10
3.6
9.6
2.9
3.1
2.2
-
-
0.5
16
10
3
12
0.6
-
Unit
Test Conditions
Static
BVDSS
VGS(th)
IGSS
IDSS
*RDS(ON)
*GFS
S
VGS=0, ID=250μA
VDS=VGS, ID=250μA
VGS=±20V, VDS=0
VDS=24V, VGS=0
VDS=24V, VGS=0, Tj=125°C
VGS=10V, ID=8A
VGS=4.5V, ID=6A
VDS=5V, ID=5A
pF
VDS=15V, VGS=0, f=1MHz
ns
VDS=15V, ID=1A, VGS=10V, RG=3Ω
nC
VDS=15V, ID=8A, VGS=10V
Ω
VGS=15mV, VDS=0V, f=1MHz
V
nA
μA
mA
mΩ
Dynamic
Ciss
Coss
Crss
*td(ON)
*tr
*td(OFF)
*tf
*Qg
*Qgs
*Qgd
Rg
Body Diode
*IS
*ISM
*VSD
*trr
*Qrr
A
V
ns
nC
VGS=0V, IS=1A
IS=8A, VGS=0V, dI/dt=100A/μs
*Pulse Test : Pulse Width ≤300μs, Duty Cycle≤2%
Ordering Information
Device
MTNN8453KQ8
MTNN8453KQ8
Package
Shipping
SOP-8
2500 pcs / Tape & Reel
(Pb-free lead plating & halogen-free package)
Marking
8453
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C560Q8
Issued Date : 2012.04.30
Revised Date :
Page No. : 4/12
Typical Characteristics : FET 1
Static Drain-Source On-State resistance vs Drain Current
Typical Output Characteristics
1000
10V, 9V, 8V, 7V, 6V, 5V
25
ID, Drain Current (A)
R DS(on), Static Drain-Source On-State
Resistance(mΩ)
30
20
4V
15
10
VGS=2V
VGS=3V
5
VGS=2.5V
100
VGS=4.5V
10
VGS=10V
1
0
0
1
2
3
0.01
5
4
0.1
VDS, Drain-Source Voltage(V)
1
10
ID, Drain Current(A)
100
Static Drain-Source On-State Resistance vs Gate-Source
Voltage
Reverse Drain Current vs Source-Drain Voltage
1.2
200
R DS(on), Static Drain-Source OnState Resistance(mΩ)
VSD, Source-Drain Voltage(V)
VGS=3V
VGS=0V
1
Tj=25°C
0.8
Tj=150°C
0.6
0.4
180
ID=6A
160
140
120
100
80
60
40
20
0.2
0
0
4
8
12
16
IDR , Reverse Drain Current(A)
20
0
Drain-Source On-State Resistance vs Junction Tempearture
4
6
8
VGS, Gate-Source Voltage(V)
10
Capacitance vs Drain-to-Source Voltage
1.8
10000
VGS=10V, ID=6A
1.6
1.4
Capacitance---(pF)
R DS(on), Normalized Static DrainSource On-State Resistance
2
1.2
1
0.8
Ciss
1000
C oss
100
0.6
Crss
0.4
0.2
10
-60
MTNN8453KQ8
-20
20
60
100
140
Tj, Junction Temperature(°C)
180
0.1
1
10
VDS, Drain-Source Voltage(V)
100
CYStek Product Specification
Spec. No. : C560Q8
Issued Date : 2012.04.30
Revised Date :
Page No. : 5/12
CYStech Electronics Corp.
Typical Characteristics(Cont.) : FET 1
Forward Transfer Admittance vs Drain Current
Gate Charge Characteristics
10
VDS=12V
VGS, Gate-Source Voltage(V)
GFS, Forward Transfer Admittance(S)
100
10
1
VDS=5V
Pulsed
Ta=25°C
0.1
0.01
0.001
VDS=15V
8
VDS=24V
6
4
2
ID=6A
0
0.01
0.1
1
ID, Drain Current(A)
10
0
100
100μs
10
ID, Maximum Drain Current(A)
ID, Drain Current(A)
12
14
8
RDSON
Limite
1ms
10ms
100ms
1
1s
TA=25°C, Tj=150°C
VGS=10V, θJA=104°C/W
Single Pulse
0.1
4
6
8
10
Qg, Total Gate Charge(nC)
Maximum Drain Current vs Case Temperature
Maximum Safe Operating Area
100
2
DC
7
6
5
4
3
2
TA=25°C
VGS=10V
RθJA=104°C/W
1
0
0.01
0.1
1
10
VDS, Drain-Source Voltage(V)
100
25
50
75
100
125
150
Tj, Junction Temperature(°C)
175
Transient Thermal Response Curves
r(t), Normalized Transient Thermal Resistance
1
D=0.5
0.2
0.1
1.RθJA(t)=r(t)*RθJA
2.Duty Factor, D=t1/t2
3.TJM -TA=PDM*RθJA(t)
4.RθJA=104°C/W
0.1
0.05
0.02
0.01
0.01
Single Pulse
0.001
1.E-04
MTNN8453KQ8
1.E-03
1.E-02
1.E-01
1.E+00
t1, Square Wave Pulse Duration(s)
1.E+01
1.E+02
1.E+03
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C560Q8
Issued Date : 2012.04.30
Revised Date :
Page No. : 6/12
Typical Characteristics : FET 2
Static Drain-Source On-State resistance vs Drain Current
Typical Output Characteristics
1000
10V, 9V, 8V, 7V, 6V, 5V
25
ID, Drain Current (A)
RDS(on) , Static Drain-Source On-State
Resistance(mΩ)
30
4V
20
15
10
VGS=2V
VGS=3V
5
VGS=2.5V
1
2
3
4
VGS=4.5V
100
0
0
10
VGS=10V
1
0.01
5
0.1
VDS, Drain-Source Voltage(V)
1
ID, Drain Current(A)
10
100
Static Drain-Source On-State Resistance vs Gate-Source
Voltage
Reverse Drain Current vs Source-Drain Voltage
1.2
R DS(on), Static Drain-Source OnState Resistance(mΩ)
200
VGS=0V
VSD, Source-Drain Voltage(V)
VGS=3V
1
Tj=25°C
0.8
Tj=150°C
0.6
0.4
180
ID=8A
160
140
120
100
80
60
40
20
0
0.2
0
4
8
12
IDR , Reverse Drain Current(A)
16
20
0
Drain-Source On-State Resistance vs Junction Tempearture
4
6
8
VGS, Gate-Source Voltage(V)
10
Capacitance vs Drain-to-Source Voltage
1.8
10000
VGS=10V, ID=8A
1.6
1.4
Capacitance---(pF)
R DS(on), Normalized Static DrainSource On-State Resistance
2
1.2
1
0.8
Ciss
1000
C oss
100
Crss
0.6
0.4
10
-60
MTNN8453KQ8
-20
20
60
100
140
Tj, Junction Temperature(°C)
180
0.1
1
10
VDS , Drain-Source Voltage(V)
100
CYStek Product Specification
Spec. No. : C560Q8
Issued Date : 2012.04.30
Revised Date :
Page No. : 7/12
CYStech Electronics Corp.
Typical Characteristics(Cont.) : FET 2
Forward Transfer Admittance vs Drain Current
Gate Charge Characteristics
10
VDS=12V
VGS, Gate-Source Voltage(V)
GFS, Forward Transfer Admittance(S)
100
10
1
VDS=5V
Pulsed
Ta=25°C
0.1
0.01
0.001
8
VDS=15V
VDS=24V
6
4
2
ID=8A
0
0.01
0.1
1
ID, Drain Current(A)
10
0
100
8
10
12
14
Maximum Drain Current vs Case Temperature
100μs
ID, Maximum Drain Current(A)
ID, Drain Current(A)
6
12
RDSON
Limite
1ms
10
10ms
100ms
1
1s
0.1
4
Qg, Total Gate Charge(nC)
Maximum Safe Operating Area
100
2
DC
TA=25°C, Tj=150°C
VGS=10V, θJA=62.5°C/W
Single Pulse
10
8
6
4
TA=25°C
VGS=10V
RθJA=62.5°C/W
2
0
0.01
0.1
1
10
VDS , Drain-Source Voltage(V)
100
25
50
75
100
125
150
Tj, Junction Temperature(°C)
175
Transient Thermal Response Curves
r(t), Normalized Transient Thermal Resistance
1
D=0.5
0.2
0.1
1.RθJA(t)=r(t)*RθJA
2.Duty Factor, D=t1/t2
3.TJM -TA=PDM*RθJA(t)
4.RθJA=62.5°C/W
0.1
0.05
0.02
0.01
0.01
Single Pulse
0.001
1.E-04
MTNN8453KQ8
1.E-03
1.E-02
1.E-01
1.E+00
t1, Square Wave Pulse Duration(s)
1.E+01
1.E+02
1.E+03
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C560Q8
Issued Date : 2012.04.30
Revised Date :
Page No. : 8/12
Reel Dimension
Carrier Tape Dimension
MTNN8453KQ8
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C560Q8
Issued Date : 2012.04.30
Revised Date :
Page No. : 9/12
Recommended wave soldering condition
Product
Pb-free devices
Peak Temperature
260 +0/-5 °C
Soldering Time
5 +1/-1 seconds
Recommended temperature profile for IR reflow
Profile feature
Average ramp-up rate
(Tsmax to Tp)
Preheat
−Temperature Min(TS min)
−Temperature Max(TS max)
−Time(ts min to ts max)
Time maintained above:
−Temperature (TL)
− Time (tL)
Peak Temperature(TP)
Time within 5°C of actual peak
temperature(tp)
Ramp down rate
Time 25 °C to peak temperature
Sn-Pb eutectic Assembly
Pb-free Assembly
3°C/second max.
3°C/second max.
100°C
150°C
60-120 seconds
150°C
200°C
60-180 seconds
183°C
60-150 seconds
240 +0/-5 °C
217°C
60-150 seconds
260 +0/-5 °C
10-30 seconds
20-40 seconds
6°C/second max.
6 minutes max.
6°C/second max.
8 minutes max.
Note : All temperatures refer to topside of the package, measured on the package body surface.
MTNN8453KQ8
CYStek Product Specification
Spec. No. : C560Q8
Issued Date : 2012.04.30
Revised Date :
Page No. : 10/12
CYStech Electronics Corp.
SOP-8 Dimension
Right side View
G
Top View
A
Marking:
I
C
B
H
Device Name
Date Code
J
E
D
8453
K
Front View
Part A
Part A
M
L
N
8-Lead SOP-8 Plastic Package
CYStek Package Code: Q8
O
F
*: Typical
Inches
Min.
Max.
0.1909
0.2007
0.1515
0.1555
0.2283
0.2441
0.0480
0.0519
0.0145
0.0185
0.1472
0.1527
0.0570
0.0649
0.1889
0.2007
DIM
A
B
C
D
E
F
G
H
Millimeters
Min.
Max.
4.85
5.10
3.85
3.95
5.80
6.20
1.22
1.32
0.37
0.47
3.74
3.88
1.45
1.65
4.80
5.10
DIM
I
J
K
L
M
N
O
Inches
Min.
Max.
0.0019
0.0078
0.0118
0.0275
0.0074
0.0098
0.0145
0.0204
0.0118
0.0197
0.0031
0.0051
0.0000
0.0059
Millimeters
Min.
Max.
0.05
0.20
0.30
0.70
0.19
0.25
0.37
0.52
0.30
0.50
0.08
0.13
0.00
0.15
Notes: 1.Controlling dimension: millimeters.
2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material.
3.If there is any question with packing specification or packing method, please contact your local CYStek sales office.
Material:
• Lead: Pure tin plated.
• Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0.
Important Notice:
• All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.
• CYStek reserves the right to make changes to its products without notice.
• CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.
• CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.
MTNN8453KQ8
CYStek Product Specification