Broadcast Satellite Tuner MMIC

Application Note
ADC20013
Broadcast Satellite Tuner MMIC
Rev 1
INTRODUCTION
The ADC20013 downconverter is intended for use in
the indoor receiver portion of the DBS (Direct
Broadcast Satellite) System. ANADIGICS' 0.5 µm.
depletion-mode GaAs process is used to fabricate this
device. The chip downconverts inputs in the 950-2050
MHz band to a fixed IF at 480 MHz. The device
typically dissipates 300 mW from a standard 16 pin
SOIC surface mount package. The ADC20013 ushers
in a new era in low cost MMIC applications for
consumer electronics.
MIXER
LNA
IF
RF
OSC
LO
VCO
Figure 1: BS Tuner IC Block Diagram
FUNCTIONAL DESCRIPTION
A functional block diagram of the downconverter is
shown in Figure 1. The chip is comprised of three basic
elements: a single-stage LNA, a mixer, and a VCO.
In addition, there is an IF filter which provides some
degree of RF & LO rejection. Gain is typically
distributed within the device as follows:
LNA
Mixer
Filter
13
-2
-1
dB
dB
dB
Total
10
dB
09/2002
ADC20013
0.470 µH
270pF
39nH
IF
1.0pF
100pF
33nH
VDD
OSC
100pF
0.1µf
ADC
20013
4.7pF
4.7pF
100pF
2.4 KΩ
RF
8nH
1SV186
1SV186
L
13K Ω
VT
Figure 2: External Circuit Configuration
USING THE IC
The external circuit configuration is shown in Figure
2. It consists of bypass capacitors, a high pass filter,
resonator circuit and output matching circuit. All
capacitors must be of good RF quality, and bypass
capacitors should be placed as close to the supply
pins of the device as possible.
The position of the 100 pF bypass capacitor at pin 3
can be varied to optimize the gain performance at
950 MHz. Since the exact position of the capacitor
will vary depending on the circuit layout, some initial
tuning will be required.
Moving the capacitor closer to or further from pin 3
changes the series inductance between the capacitor
and the device, which could affect the LO frequency
response. When the optimal position for the capacitor
is being determined, the LO frequency response
should be carefully evaluated.
2
The high pass filter should be placed as close to the
RF input pin of the IC as possible. This 3 pole high
pass filter serves two functions. First, it prevents IF
noise from reaching the RF input of the device.
Secondly, it provides a capacitive impedance at the
IF frequency, which is essential for good noise
performance.
The resonator may consist of either one or two
varactors, depending on the application. A single
varactor resonator provides ample tuning range for
applications in the 950-1750 MHz RF band (Figure
3A).
However, for the broadband 950-2050 MHz
applications, a dual varactor resonator is required
(Figure 3B).
Application Note - Rev 1
09/2002
ADC20013
13K
VT
Pin 11
1SV186
100pF
2.4K
3.3 pF
ELECTRICAL CHARACTERISTICS
VT
Pin 11
1SV186
1SV186
2.4K
L
A
L
B
Figure 3: Resonator Implementation
The location of the varactor(s) relative to the local
oscillator port (pin 11) of the MMIC is important for
proper tuning range and frequency. Moving the
varactor farther away from the LO port of the device
increases the inductance which lowers the LO
frequency and causes the tuning range to increase.
Similarly, the opposite effect occurs when the varactor
is moved closer to the LO port. It is therefore
recommended that this position be optimized for the
application at hand.
Note that the appropriate series inductance, L, must
be determined and is typically in the range of 2-3 nH.
The Toshiba 1SV186 is recommended for use with
this downconverter.
As with all RF circuits, good RF grounding is important
to the proper operation of the device. Via holes to a
backside ground plane should be positioned directly
beneath ground pins 1,4,5,7-10, 12,13 and 16.
OUTPUT MATCHING CIRCUIT
The IF output circuit shown in Figure 2 serves three
purposes. First, it gives approximately 4 dB
improvement in conversion gain by matching the output
of the device at 480 MHz. Other IF frequencies can be
matched by using the Smith Chart data shown on the
data sheet. Secondly, the circuit makes the device less
sensitive to load pulling. The device may oscillate
without this circuit, depending on the load presented
at the output. The third benefit provided is additional
RF and LO rejection at the IF port.
Ideally, the frequency response of the circuit should
peak at 480 MHz and decrease monotonically at all
other frequencies (See Figure 4A). Peaks in the
response at other frequencies between 480 MHz and
3 GHz can cause nulls in the LO frequency response.
(See Figure 4B). Proper component selection is
necessary to preclude the occurrence of this problem.
Quality RF components that have high self resonant
frequencies and low parasitics should be chosen.
Surface mount inductors made by Coilcraft (Cray,
Illinois) have such properties. The part number for the
33 nH inductor is 0805CS-330-XMBC, and 0805CS390-XMBC for the 39 nH inductor. Air wound coils can
also be used.
Application Note - Rev 1
09/2002
3
ADC20013
Through Gain [dB]
RF GAIN RESPONSE
Ideal Inductors
Frequency [GHz]
Figure 4A
RF GAIN RESPONSE
Indutors with Poor Parasitics
Through Gain [dB]
Undesired Resonance
Frequency [GHz]
Figure 4B
BIASING PRECAUTIONS
The device is based on a 0.5µm MESFET process,
and as a result, generally accepted electrostatic
discharge (ESD) and over voltage precautions are
essential in the handling and biasing of the chip.
It is recommended that the runs to the bias pins
include 0.01 µF bypass capacitors to ground, placed
as close to the device package pins as possible.
Additionally, a 7V zener diode on the positive supplies
can provide added protection.
Additional precautions recommended during testing
are as follows:
4
Voltage overshoots above + 8 Volts and - 8 Volts
should be avoided. This includes any large transient
'kicks' that can very easily be induced by removing
and reattaching leads with power on. If the device
must be powered by long leads from bench power
supplies, be sure the power supplies are zeroed before
turning them ON/OFF.
Device failures could be induced by simply shorting a
supply pin to ground (sometimes done accidentally
when 'turning' or manipulating parts with tweezers).
Although the short to ground in itself does no harm to
the device, the large voltage spike that is induced when
Application Note - Rev 1
09/2002
ADC20013
the short is removed certainly does. The source of
this large voltage, estimated to be as high as 10000
Volts, is the stored energy in the power supply leads.
There is sufficient inductance and often sufficient short
circuit power supply current, for Ldi/dt to exceed
10Kv - enough to damage any microwave FET's gate.
We have noticed that failures are very infrequent if
coax or twisted wire pairs for power lines are used in
experimental set-ups.
Standard ESD prevention techniques should be
followed. A wrist strap is certainly an adequate
protection against static build up, particularly in dry
weather. Antistatic mats on work benches are
recommended. In work areas, besides wrist straps and
antistatic mats, well grounded soldering irons should
be used; in fact, any tool that can come in contact with
semiconductor device leads should have a discharge
path to ground.
TRACKING BANDPASS FILTER
While a tracking lowpass filter has less insertion loss
and uses fewer components, a tracking bandpass filter
is ideal for wider bandwidth applications. A properly
designed bandpass filter will give good LO and image
rejection, while reducing both harmonic distortion and
second order intermodulation distortion. Such a filter
is shown in Figure 5B. Using this filter eliminates the
need for the highpass filter normally used with the
device. It is important, however, to use a dc block
between the output of the filter and the input of the
downconverter. A nominal value for the dc block is
680 pF.
The circuit, which uses four Toshiba 1SV245 varactors
with a coupled line section, has a typical tuning range
of 950 MHz to 2050 MHz for a voltage range of 1 to
20 volts. The insertion loss varies from 6dB at the
low end of the RF band to 2.5 dB at the high end. LO
rejection is between 25 and 30 dB, while image
rejection is better then 30 dB.
INTEGRATING THE IC
A typical tuner front end is shown in Figure 5A. A
tracking lowpass filter is used to complete the RF
section. The tracking lowpass filter is recommended
because it provides lower loss than a tracking
bandpass filter, eliminates image noise, and reduces
LO leakage levels at the RF input (tuner). The tracking
filter shown in Figure 5A typically has less than 3 db
of insertion loss while providing better than 15 db of
LO rejection.
A printed circuit board layout for the bandpass filter is
shown in Figure 5C. Although the length of the coupled
section (L in Fig 5B) is nominally 0.350 inch, some
tuning will be required to optimize the response. The
filter is fabricated on 0.032 inch thick FR4 material,
with a relative dielectric constant of 4.8. Other
substrates can be used if the microstrip lines and
spacings are scaled accordingly.
tracking
network
0.1m F
4.7pF
7.8nH 10pF 10.7nH
4.7pF
to IF
block
10K Ω
ADC
20013
10pF 7.5nH
8 nH
1SV186
Preselect
Lowpass
Filter
highpass
filter
480 MHz
Figure 5A: BS Tuner RF Front End
Application Note - Rev 1
09/2002
5
ADC20013
1SV245
1pF
1pF
.3pF
1
2
10K
Vt
Vt
W = .015" L = .350"
W = .015" L = .350"
10K
.02"
Ltune
1SV245
1SV245
Dimensions Shown in Inches
Figure 5B: Tracking Filter
0.550
0.480
0.430
0.360
0.335
0.274
0.030
0.080
0.255
0.210
0.010
0.115
0.075
0.025
0.160
0.175
DETAIL A
0.245
0.115
6X 0.030
0.125
0.570
0.625
0.645
0.284
0.235
0.090
0.010 TYP.
0.055 0.075
0.060
0.060
Dimensions Shown in Inches
0.068
0.010
DETAIL A
0.01
Figure 5C
6
Application Note - Rev 1
09/2002
ADC20013
RECOMMENDED LAYOUT
Be sure to follow the recommended procedure under
“Biasing Precautions” when testing the IC. Failure to
do so may result in damage to the device.
Recommended layouts showing component
placement for the ADC20013 using a single varactor
diode and dual varactor diode tuning circuit are shown
in Figures 6A and 6B, respectively. The layout includes
the recommended highpass filter and the output
matching circuit.
It is important to use only linear power supplies with
low ripple content when making oscillator phase noise
measurements. Switch mode power supplies may
create sidebands or modulation of the oscillator.
TEST AND MEASUREMENT
Figure 7A & B shows ANADIGICS’ typical test setups
for gain, noise figure, LO phase noise, LO to RF
leakage, LO output power (prescalar), and IMD3 .
1.00
VDD
C3
L4
L3
L1
C4
C1
RF IN
0.100
C5
C2
IF OUT
0.100
L2
C8
8
7
6
5
4
3
2
10
11
12
13
14
15
1
1.00
9
16
C6
C7
0.100
R 1
V t
OSC
VR1
0.200
ADC20014S3C EXTERNAL CIRCUIT LAYOUT
NOTES:
PARTS LIST
SYMBOL
1. SCALE 5:1
DESCRIPTION
PART NO.
2. COMPONENTS NOT TO SCALE
C1,C2
4.7 pF CHIP CAPACITOR
VJ0805A4R7DXA
3. SUBSTRATE MATERIAL: FR4 Er 4.8
TAN δ = 0.020 AT 1 MHz
C3
0.1 µF CHIP CAPACITOR
200B104KCA50X
4. SUBSTRATE THICKNESS: 0.062
C4,C6
100 pF CHIP CAPACITOR
VJ0805A101JXA
C5
270 pF CHIP CAPACITOR
VJ0805A271JXA
C7
3.3 pF CHIP CAPACITOR
VJ0805A3R3DXA
C8
1 pF CHIP CAPACITOR
V30805AIR0DXA
VR1
VARACTOR
1SV186
R1
2.4 K Ω CHIP RESISTOR
ER5-8GEY-J242
L1
8nH PRINTED INDUCTOR
NA
L2
39 nH INDUCTOR
0805CS-390-XMBC
L3
33 nH INDUCTOR
0805CS-330-XMBC
L4
0.470 µH INDUCTOR
380NB-R47M
5. DIMENSIONS IN INCHES
Figure 6A
Application Note - Rev 1
09/2002
7
ADC20013
1.00
VDD
L4
L4
C3
L1
0.100
C4
C1
RF IN
C5
C2
IF OUT
0.100
L3
C8
8
7
6
5
4
3
2
10
11
12
13
14
15
1
1.00
9
16
VR1
C7
C6
VR2
0.100
R1
VAR
OSC
R2
0.200
ADC20014S3C EXTERNAL CIRCUIT LAYOUT
NOTES:
PARTS LIST
SYMBOL
1. SCALE 5:1
DESCRIPTION
PART NO.
4.7 pF CHIP CAPACITOR
VJ0805A4R7DXA
3. SUBSTRATE MATERIAL: FR4 Er 4.8
TAN δ = 0.020 AT 1 MHz
C3
0.1 µF CHIP CAPACITOR
200B104KCA50X
4. SUBSTRATE THICKNESS: 0.062
C4,C6
C7
100 pF CHIP CAPACITOR
VJ0805A101JXA
C5
270 pF CHIP CAPACITOR
VJ0805A271JXA
C8
1 pF CHIP CAPACITOR
V30805AIR0DXA
VR1,VR2 VARACTOR
1SV186
R1
13 K Ω CHIP RESISTOR
ER5-8GEY-J133
R2
2.4 K Ω CHIP RESISTOR
ER5-8GEY-J242
L1
8nH PRINTED INDUCTOR
NA
L2
~ 0.3 µH INDUCTOR
2 TURNS, 28 GAUGE WIRE
FAIR-RITE BEAD
2643001501
00000
L3
39 nH INDUCTOR
0805CS-390-XMBC
L4
33 nH INDUCTOR
0805CS-330-XMBC
Figure 6B
8
2. COMPONENTS NOT TO SCALE
C1,C2
Application Note - Rev 1
09/2002
5. DIMENSIONS IN INCHES
ADC20013
HP 8970B
Noise Figure
Meter
HP 346C
NOISE
SOURCE
DC POWER
SUPPLY
+ 5 Vdc
900 - 1700 MHz BPF
3dB ATTEN.
ADC20013
TEST FIXTURE
IF
3dB ATTEN.
465 - 495 MHz BPF
1650 - 2100 MHz BPF
VTUNE
OSC
**NOTE 1**
XL MICROWAVE
LOCKING FREQUENCY
COUNTER
MOD# 3201-3
DIRECTIONAL
COUPLER
3 GHz LPF
HP 8563E
SPECTRUM ANALYZER
NOTE 1: ONLY ONE FILTER IS USED DEPENDING ON RF FREQUENCY
Figure 7A
SYNTHESIZER
Bandpass Filter
- 10 dB
- 10 dB
LO-RF
SYNTHESIZER
10 dB
1 - 2 GHz
Directional Coupler
1 - 2 GHz
ADC
Test Fixture
RF
IF
VT
OSC
SP3T
RF Switch
Spectrum
Analyzer
Directional Coupler
VTUNE
Figure 7B
Application Note - Rev 1
09/2002
9
ADC20013
USING AN EXTERNAL OSCILLATOR
Method 1
While the ADC offers low oscillator phase noise and
broadband tuning capabilities, some applications may
require the use of an external oscillator.
This is intended for use with oscillators which have
+10 dBm to +15 dBm output power, although the
device will operate at lower drive levels with some trade
off in performance. Table 1 shows the variation in gain,
current, and IMD2 as a function of various oscillator
drive levels. Implementation of this method requires
disabling the onboard local oscillator of the IC and
injecting the external oscillator signal into pin 15 of
the IC. To disable the on chip local oscillator, simply
remove the RF choke which is normally across pins 3
and 15 in the external circuitry. Figure 8 shows a typical
layout for this application.
There are two methods of using an external oscillator
with this device. The first method is recommended
since it allows for lower current operation with no
sacrifice in performance. In this application the external
oscillator used should have at least +10 dBm output
power. The second method is for use in applications
where the external oscillator output power is 0 dBm
or less.
Table 1
EXTERNAL OSCILLATOR
DRIVE LEVEL (dBm)
GAIN
(dB)
IDD
(mA)
6
4.8
62.4
7
6.0
61.9
8
7.1
61.2
9
8.1
60.4
10
8.9
59.5
11
9.6
58.4
12
10.4
57.4
13
11.0
56.3
14
11.5
55.4
15
11.9
54.7
IMD2
(dBc)
- 24
- 26.9
- 31.3
- 34
-35.5
(Measured @ 950 MHz, IF=480 MHz, Pin = - 20 dBm/Tone, Tc = 25˚C)
10
Application Note - Rev 1
09/2002
ADC20013
1.00
VDD
L3
C3
L1
0.100
C4
C1
RF IN
C5
C2
IF OUT
0.100
L2
C6
8
7
6
5
4
3
2
1
10
11
12
13
14
15
16
1.00
9
C7
0.100
PRESCALAR
OUTPUT
OSCILLATOR
INPUT
0.200
ADC Forced LO Circuit Layout - Method 1
NOTES:
PARTS LIST
SYMBOL
DESCRIPTION
PART NO.
1. SCALE 5:1
2. COMPONENTS NOT TO SCALE
C1,C2
4.7 pF CHIP CAPACITOR
VJ0805A4R7DXA
C3
0.1 µF CHIP CAPACITOR
200B104KCA50X
C4,C7
100 pF CHIP CAPACITOR
VJ0805A101JXA
C5
270 pF CHIP CAPACITOR
VJ0805A271JXA
C6
I.0 pF CHIP CAPACITOR
V30805AIRODXA
L1
8 nH PRINTED INDUCTOR
NA
L2
39 nH INDUCTOR
0805CS-390-XMBC
L3
33 nH INDUCTOR
0805CS-330-XMBC
3. SUBSTRATE MATERIAL: FR4 Er 4.8
TAN δ = 0.020 @ 1MHz
4. SUBSTRATE THICKNESS: 0.062
5. DIMENSIONS IN INCHES
Figure 8
Application Note - Rev 1
09/2002
11
ADC20013
Method 2
USING THE DEVICE AS A VCO
This method should be used with oscillators which
have output power levels of 0 dBm or less. Table 2
shows the effect of lower oscillator drive levels on gain
and IMD2. Implementation of this method is simple in
that it only requires removing the varactor from the
external resonator circuit, adding a 1pF capacitor (C9)
between pin 11 & ground, and applying the external
oscillator signal to the port (pin 11 of the IC) which
would otherwise be used for the local oscillator tuning
voltage. A typical layout is shown in Figure 10.
The ADC offers low phase noise and a broad tuning
range while requiring very few external components.
As a VCO, power dissipated is typically less than
65mW from its standard 16 pin SOIC surface mount
package. The device requires an external resonator,
which should be implemented as shown in Figure 3A
or 3B, depending on the application.
Figure 9 shows a plot of tuning voltage versus
frequency for the dual varactor configuration.
Table 2
EXTERNAL OSCILLATOR
DRIVE LEVEL (dBm)
GAIN
(dB)
IMD2
(dBc)
0
11.6
- 26.6
-2
11.4
- 27.0
-4
10.7
- 28.3
-6
9.8
- 29.4
-8
8.5
- 29.3
- 10
7.1
- 28.7
(Measured @ 950 MHz, IF = 480 MHz, Pin = - 20 dBm/Tone, Tc = 25˚C)
0.8
16
0.7
14
0.6
12
0.5
10
0.4
8
0.3
6
0.2
4
0.1
2
0
1400
1600
1800
2000
2200
2400
OSCILLATOR FREQUENCY (MHz)
VARACTOR VOLTAGE
Figure 9
12
Application Note - Rev 1
09/2002
STD
0
2600
STANDARD D EVIATION
VARACTOR VOLTAG E (Vdc)
OSCILLATOR FREQUENCY vs VARACTOR VOLTAGE
18
ADC20013
1.00
VDD
C3
L4
L3
L1
0.100
C4
C1
RF IN
C5
C2
IF OUT
0.100
L2
C8
8
7
6
5
4
3
2
10
11
12
13
14
15
1
1.00
9
16
C6
C7
C9
0.100
Oscillator
Input
Prescalar
Output
0.200
ADC Forced LO Circuit Layout - Method 2
NOTES:
PARTS LIST
SYMBOL
1. SCALE 5:1
DESCRI PTION
PART NO.
2. COMPONENTS NOT TO SCALE
C1,C2
4. 7 pF CHIP CAPACI TOR
VJ0805A4R7DXA
C3
3. SUBSTRATE MATERIAL: FR4 Er 4.8
TAN δ = 0. 020 AT 1 MHz
0. 1 µF CHIP CAPACITOR
200B104KCA50X
4. SUBSTRATE THICKNESS: 0.062
C4,C7
C6
100 pF CHIP CAPACITOR
VJ0805A101JXA
5. DI MENSIONS IN INCHES
C5
270 pF CHIP CAPACITOR
VJ0805A271JXA
C8,C9
1 pF CHIP CAPACITOR
V30805AIR0DXA
L1
8nH PRINTED INDUCTOR
NA
L2
39 nH INDUCTOR
0805CS-390-XMBC
L3
33 nH INDUCTOR
0805CS-330-XMBC
L4
0. 470=µH INDUCTOR
380NB-R47M
Figure 10
Application Note - Rev 1
09/2002
13
ADC20013
Good RF grounding is important, and via holes to a
backside ground plane should be positioned directly
beneath pins 1-10,12,13,& 16.
Power (+5Vdc) is supplied to pin 15 of the IC via an
RF choke. Oscillator output (pin 14) power is generally
in the range of -7 to - 4 dBm, but can be increased
approximately 5 dB by removing the 100pF bypass
capacitor on pin 15. For narrow band VCO
applications, the output power level may be increased
further by adding an L-C matching circuit to Pin 14.
The ADC20013 phase noise is typically -70 dBc/Hz
@ 10 KHz offset and -100 dBc/Hz @ 100KHz offset.
A plot of LO power versus frequency (with pin 15 by
passed) is shown in Figure 11.
ADC SERIES
OSCILLATOR POWER vs FREQUENCY
OSCILLATOR POWER (dBm)
0
-1
-2
-3
-4
-5
-6
-7
-8
-9
-10
1400
1600
1800
2000
2200
OSCILLATOR FREQUENCY (MHz)
Figure 11
14
Application Note - Rev 1
09/2002
2400
2600
ADC20013
NOTES
Application Note - Rev 1
09/2002
15
ADC20013
ANADIGICS, Inc.
141 Mount Bethel Road
Warren, New Jersey 07059, U.S.A.
Tel: +1 (908) 668-5000
Fax: +1 (908) 668-5132
URL: http://www.anadigics.com
E-mail: [email protected]
IMPORTANT NOTICE
ANADIGICS, Inc. reserves the right to make changes to its products or to discontinue any product at any time without notice.
The product specifications contained in Advanced Product Information sheets and Preliminary Data Sheets are subject to
change prior to a product’s formal introduction. Information in Data Sheets have been carefully checked and are assumed to
be reliable; however, ANADIGICS assumes no responsibilities for inaccuracies. ANADIGICS strongly urges customers to
verify that the information they are using is current before placing orders.
WARNING
ANADIGICS products are not intended for use in life support appliances, devices or systems. Use of an ANADIGICS product
in any such application without written consent is prohibited.
16
APPLICATION NOTE - Rev 1
09/2002