Eon Silicon Solution Inc. Migration Note EON Flash EN25P64 to EN25Q64 This Application Note may be revised by subsequent versions or modifications due to changes in technical specifications. 1 ©2005 Eon Silicon Solution Inc. www.eonssi.com Rev. A, Issue Date: 2010/02/25 Eon Silicon Solution Inc. 1. INTRODUCTION The application note introduces how to implement a system design from EON EN25P64 Flash to Eon EN25Q64 Flash. 2. GENERAL FUNCTION COMPARISON TABLE: 2.1 The following table is major features of these two devices. Features Voltage range Pin to Pin Compatible (standard SPI mode) SPI frequency EN25Q64 2.7 ~ 3.6 16-pin SOP 300mil Except pin 1 = NC 104MHz (standard mode) 80MHz @ dual & quad mode Secured Silicon Sector region Sector Architecture SPI mode EQIO mode (Full Quad mode) Reset-Enable / Reset Dual Output Fast Read Dual I/O Fast Read Quad I/O Fast Read Page program Sector Erase 4K byte Block (Sector) Erase 64K byte BP table EN25P64 2.7 ~ 3.6 16-pin SOP 300mil Except pin 1 = HOLD# 100MHz (standard mode) 512 Byte 512 Byte Uniform 2048 sectors of 4K byte 128 blocks of 64K byte Mode 0 / Mode 3 Uniform 128 sectors of 64K byte Mode 0 / Mode 3 Yes No Yes Yes Yes Yes Yes Yes No No No No Yes No Yes Yes Enhanced protect (Note) Conventional Minimum endurance cycle 100K 100K Package 8-pin SOP 200mil 8 contact VDFN (5x6mm) 8 contact VDFN (6x8mm) 8-pin PDIP 16-pin SOP 300mil 24 balls BGA (6x8mm) 16-pin SOP 300mil Note: Please refer to page 5 This Application Note may be revised by subsequent versions or modifications due to changes in technical specifications. 2 ©2005 Eon Silicon Solution Inc. www.eonssi.com Rev. A, Issue Date: 2010/02/25 Eon Silicon Solution Inc. 3. HARDWARE CONSIDERATIONS 3.1 ICC comparison EN25Q64 EN25P64 Max 20 @ 100MHz mA Page Program (PP) ICC4 Max 25 @ 104MHz 20 @ 80MHz 28 15 mA Sector Erase (SE) ICC6 25 15 mA Standby ICC1 20 20 μA Current Read ICC3 Unit 3.2 The following table is pin comparison (16-pin SOP 300mil) Pin number Pin 1 Pin 2 Pin 3 Pin 4 Pin 5 Pin 6 Pin 7 Pin 8 Pin 9 Pin 10 Pin 11 Pin 12 Pin 13 Pin 14 Pin 15 Pin 16 EN25Q64 NC (DQ3) VCC NC NC NC NC CS# DO (DQ1) WP# (DQ2) VSS NC NC NC NC DI (DQ0) CLK EN25P64 HOLD# VCC NC NC NC NC CS# DO WP# VSS NC NC NC NC DI CLK Note: If customers don’t use Hold# pin function on EN25P64, which can be replaced by EN25Q64 in standard SPI mode. EN25P64 only support general standard SPI mode. EN25Q64 can support general standard / dual / quad SPI mode. (Need specific SPI controller) This Application Note may be revised by subsequent versions or modifications due to changes in technical specifications. 3 ©2005 Eon Silicon Solution Inc. www.eonssi.com Rev. A, Issue Date: 2010/02/25 Eon Silicon Solution Inc. 4. SOFTWARE CONSIDERATIONS Except of memory type, (only difference on 9Fh command) there is no difference in Manufacture ID, Device ID 4.1 Manufacturer, Memory Type & Device Identification (M7~M0: manufacture ID, D15~ID0: memory type, ID7~ID0: memory density) For EN25Q64 For EN25P64 This Application Note may be revised by subsequent versions or modifications due to changes in technical specifications. 4 ©2005 Eon Silicon Solution Inc. www.eonssi.com Rev. A, Issue Date: 2010/02/25 Eon Silicon Solution Inc. 4.2 Instruction Set Comparison 4.2.1 Different Block Protection Area EN25Q64： EN25P64： This Application Note may be revised by subsequent versions or modifications due to changes in technical specifications. 5 ©2005 Eon Silicon Solution Inc. www.eonssi.com Rev. A, Issue Date: 2010/02/25 Eon Silicon Solution Inc. 4.2.2 Different RDSR bit definition EN25Q64： EN25P64： This Application Note may be revised by subsequent versions or modifications due to changes in technical specifications. 6 ©2005 Eon Silicon Solution Inc. www.eonssi.com Rev. A, Issue Date: 2010/02/25 Eon Silicon Solution Inc. 4.2.3 Secured OTP Addresses EN25Q64： EN25P64： 4.3 For EQIO (38h), RSTQIO (FFh), RSTEN (66h), RST (99h), Dual output fast read 3Bh), Dual I/O fast read (BBh) and Quad I/O fast read (EBh) commands are only available on EN25Q64 This Application Note may be revised by subsequent versions or modifications due to changes in technical specifications. 7 ©2005 Eon Silicon Solution Inc. www.eonssi.com Rev. A, Issue Date: 2010/02/25 Eon Silicon Solution Inc. 5. PERFORMANCE DIFFERENCES 5.1 ERASE AND PROGRAM PERFORMANCE The erasing and programming performance comparison. Parameter EN25Q64 EN25P64 Unit Typ Max Typ Max Page Programming Time 1.3 5 1.5 5 ms Sector Erase Time (4KB) 0.09 0.3 N/A N/A Sec 0.5 2 0.8 2 Sec 30＊ 50 50＊ 80 Sec Block / Sector Erase Time (64KB) Chip Erase Time ＊NOTE: ERASE FROM “1” Æ “1”. 5.2 KEY AC PARAMETER PERFORMANCE Parameter EN25Q64 EN25P64 tCH (serial clock high time) Min@ 4ns Min@ 4ns tCL (serial clock low time) Min@ 4ns Min@ 4ns tCLCH(serial clock rise time) Min@ 0.1V / ns Min@ 0.1V / ns tCLCL(serial clock fall time) Min@ 0.1V / ns Min@ 0.1V / ns Min@ 5ns Min@ 5ns tCHSH(CS# active setup / hold time) Min, read @15ns tSHSL(CS# high time) Program/Erase @50ns Min@ 50ns tDSU(Data in setup time) Min@2ns Min@2ns tDH(Data in hold time) Min@5ns Min@5ns This Application Note may be revised by subsequent versions or modifications due to changes in technical specifications. 8 ©2005 Eon Silicon Solution Inc. www.eonssi.com Rev. A, Issue Date: 2010/02/25 Eon Silicon Solution Inc. Revisions List Revision No Description Date A 2010/02/25 Initial Release This Application Note may be revised by subsequent versions or modifications due to changes in technical specifications. 9 ©2005 Eon Silicon Solution Inc. www.eonssi.com Rev. A, Issue Date: 2010/02/25