STV8131 5 V and 8 V voltage regulator Features ■ Output currents up to 1 A ■ Fixed precision output 1 voltage 5 V ± 2% ■ Fixed precision output 2 voltage 8 V ± 2% ■ Output 1 with disable by TTL input ■ Output 2 with disable by TTL input ■ Short circuit protection at both outputs ■ Thermal protection ■ Low drop output voltage Table 1. Device summary Order code STV8131 The STV8131 is a monolithic dual positive voltage regulator designed to provide fixed precision output voltages of 5 V and 8 V at currents up to 1A. c u d Tray Description e t le ) s t( Packaging o r P o s b O - Each output can be disabled separately by a TTL input. Short circuit and thermal protections are included. Figure 1. ) s ( ct Pin connections u d o r P e t e l o s b O February 2009 Rev 2 1/8 www.st.com 1 Block diagram 1 STV8131 Block diagram Figure 2. Disable Block diagram 3 Input 1 Input 2 1 2 Reference Output 1 7 Output 1 Protection Disable 5 Disable Disable Output 2 6 Output 2 STV8131 4 2 c u d e t le Circuit description ) s t( o r P o s b O - The STV8131 is a dual voltage regulator with separate disable for each output. The two regulation parts are supplied from one voltage reference circuit trimmed by zener zap during EWS test. ) s ( ct Since the supply voltage of this last is connected at Pin 1 (VIN1), the regulator 2 will not work if Pin 1 is not supplied. u d o The outputs stage have been realized in a Darlington configuration with a drop typical 1.2V. For each output a disable circuit switches-off this output if a voltage lower than 0.8V is applied at corresponding Pin (Pin 3 for output 2, Pin 5 for output 1). r P e t e l o s b O 2/8 STV8131 3 Absolute maximum ratings Absolute maximum ratings Table 2. Absolute maximum ratings Symbol 4 Parameter Value Unit VIN DC input voltage Pin 1 20 V VDIS Disable Input voltage Pin 3-5 20 V IO1, 2 Output currents Internally limited Pt Power dissipation Internally limited TSTG Storage temperature - 65 to + 150 °C TJ Junction temperature 0 to + 150 °C Thermal data Table 3. c u d Thermal data Symbol Parameter RTH(j-c) Thermal resistance junction-case TJ Recommended junction temperature e t le Max so ) s ( ct Max o r P ) s t( Value 3 Unit °C/W °C b O - u d o r P e t e l o s b O 3/8 Electrical characteristics 5 STV8131 Electrical characteristics VIN1 = 7 V, VIN2 = 10 V, TJ = 25 °C unless otherwise specified. Table 4. Electrical characteristics Symbol Parameter Test conditions Min Typical Max Unit VO1 Output voltage IO1 = 10 mA 4.9 5 5.1 V VO2 Output voltage IO2 = 10 mA 7.84 8 8.16 V VO1 VO2 Output voltage 5 mA < IO12 < 750 mA 7 V < VIN1 < 14V 10 V < VIN2 < 14V 4.8 7.7 5.2 8.3 V V VIO1, 2 Dropout voltage IO1 2 = 750 mA IO1 2 = 1 A 1.4 2 V V VO1, 2LI Line regulation 7 V < VIN1 < 14 V 10 V < VIN2 < 14 V IO1 2 = 200 mA 50 80 VO1, 2LO Load regulation 5 mA < IO1 < 0.6 A 5 mA < IO2 < 0.6 A IQ Quiescent current IO1 = 10 mA Output 2 disabled ΔV 0 ⋅ 10 6 K 0 = -------------------------ΔT ⋅ V 0 Output voltage thermal drift KO1, 2 Short circuit output current VDISH Disable voltage high (corresponding out active) VDISL Disable voltage low (corresponding out disabled) IDIS Disable bias current Tjsd Junction temperature for thermal shut down t e l o o r P e c u d 4/8 o r P (t s) 0 V < VDIS < 7 V 2 mV mV mA ppm/oC 100 VIN1 = 7 V, VIN2 = 10 V VIN2 = 16 V(1) 1. Safe permanent short-circuit is only guaranteed for input voltages up to 16 V. s b O e t le o s b O - Tj = 0 to + 125 °C IO1, 2SC c u d 100 160 ) s t( mV mV 1.6 1 2 A A V -30 145 0.8 V 2 µA oC STV8131 Package mechanical data Figure 3. 6 Typical application Package mechanical data Figure 4. c u d 9-pin package e t le ) s ( ct ) s t( o r P o s b O - u d o r P e t e l o s b O 5/8 Package mechanical data Table 5. STV8131 JEDEC standard package dimensions Millimeters Inches Dimensions Minimum Typical Minimum 0.189 C 1.37 0.054 D 2.4 2.8 0.094 0.110 D1 1.2 1.35 0.047 0.053 E 0.35 0.55 0.014 0.022 F 0.6 0.8 0.024 0.031 0.9 0.035 G 2.41 2.54 2.67 0.095 0.100 0.105 G1 4.91 5.08 5.21 0.193 0.200 0.205 G2 7.49 7.62 7.80 0.295 0.300 0.307 H3 10.05 16.97 L1 14.92 L2 21.54 L3 22.62 L5 2.6 L6 15.10 L7 6.0 Dia. u d o 3.65 r P e t le od 0.409 0.587 0.848 so b O 15.80 ) s ( ct 0.396 0.668 3.0 2.8 ) s t( 0.409 10.40 L M1 uc 10.4 M 6.6 0.891 0.102 0.118 0.594 0.622 0.236 0.260 0.110 5.08 0.200 3.85 0.144 r P Environmentally-friendly packages e t e ol s b O Maximum 4.8 H2 6.1 Typical A F1 6/8 Maximum 0.152 In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. STV8131 7 Revision history Revision history Table 6. Document revision history Date Revision Changes September 2003 1 Initial release 23-Feb-2009 2 Preliminary banner removed, template updated and Section 6.1 added c u d e t le ) s ( ct ) s t( o r P o s b O - u d o r P e t e l o s b O 7/8 STV8131 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. c u d ) s t( Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. 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