AN4218 Application note Hardware design guideline power supply and voltage measurement Introduction This document provides useful hints and suggestions about the implementation of the STMicroelectronics 32-bit microcontroller devices in an automotive system. The main focus has been set on the power supply concept and the connection to signals from different power domains. Due to the harsh conditions in the automotive environment several precautions have to be taken into account to ensure the robustness of the system. This is especially important when defining its power supply concept. This document shows test cases defined by car makers, which are intended to reproduce the system behavior in the real automotive environment, it also shows good practices to cope with them as well as bad practices and their influence on the system robustness. September 2013 DocID024014 Rev 2 1/26 www.st.com Contents AN4218 Contents 1 2 System overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.2 Car-battery power supply (VBAT) transients . . . . . . . . . . . . . . . . . . . . . . . 6 Example battery supply test pulses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.2.2 Power-up-reset requirements of the SPC microcontrollers . . . . . . . . . . . 8 Good practices of system power supply . . . . . . . . . . . . . . . . . . . . . . . 10 2.1 3 1.2.1 Microcontroller power supply reactions on VBAT transients . . . . . . . . . . 10 2.1.1 L99PM62GXP block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.1.2 Measurement setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.1.3 Measurement results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Application circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.1 Reference circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.2 Implementation suggestions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.2.1 Measurement of an permanently enabled power-supply (VMEASURE) 16 3.2.2 Bad practices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.2.3 Physical layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Appendix A Reference documents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 2/26 DocID024014 Rev 2 AN4218 List of tables List of tables Table 1. Table 2. Table 3. Parameters sharp test pulse E11 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 VDD ramp specification (SPC560P34x, SPC560P40x – example only). . . . . . . . . . . . . . . . 9 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 DocID024014 Rev 2 3/26 List of figures AN4218 List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. 4/26 Microcontroller with power supply, drivers and physical layer . . . . . . . . . . . . . . . . . . . . . . . 5 Brown out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Non strictly rising ramp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Slow ramp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Residual voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Test pulse E11 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 VDD ramp-up/ ramp-down (SPC560Bxx, SPC560Cxx, – example only) . . . . . . . . . . . . . . . 9 L99PM62GXP block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Measurement setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Engine cranking pulse . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Measurement over the entire pulse . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Zoom into the low voltage drop region . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 VS voltage ramp up (0.5 V/min) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 VBAT voltage ramp down (0.5 V/min) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Reference circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Voltage divider . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 ISO transients . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Negative ISO-pulse simulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Protection and low-pass-filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Amplitude and phase over frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Backward current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Bad example circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 CAN-transceiver without reverse protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 DocID024014 Rev 2 AN4218 System overview 1 System overview 1.1 Overview Figure 1 shows a system, consisting of a microcontroller, a system basis chip, a physical layer transceiver and load drivers. The System-Basis-Chip (SBC) generates the power-supply for the other devices in the system and communicates via serial-parallel interface (SPI) with the microcontroller (SPCµC). The physical layer transceiver (e.g. standalone CAN-transceiver) is supplied by the SBC and transfers data from and to the microcontroller via logic-level signals. Through the CANbus it is connected to other CAN-transceivers in the car, which have their own independent power supply. Dedicated drivers for high-power loads (light-bulbs, LEDs, door locks, mirror folds, H-bridge drivers etc.) are also connected to the microcontroller power supply and communicate with it by SPI. Several peripherals of the microcontroller are used to monitor voltages like the battery voltage, either by a logic-level input/output or an analog-to-digital convertor (ADC). The inductances LS1 to LS4 are the parasitic wire inductances of the supply lines. Capacitances are added to either protect the supply against distortions or to stabilize the voltage generated the by voltage controller inside the SBC. Protection resistors are added at the monitor inputs of the microcontroller. Figure 1. Microcontroller with power supply, drivers and physical layer /6 9%$7 9,1 /6 9'' 9%$7 9287 RSWLRQDO 6%&&RPSDQLRQ &9%$7 9'' &9%$7 5[' &9'' 9%$7 &$1+ 3K\VLFDO/D\HU /6 &$16WDQGDORQH 7[' &$1/ 9%$7 0HDVXUHPHQW ,QSXW 63, 53527 ,2 0HDVXUHPHQW ,QSXW 9'' ,QWHUQDO /9 5HJXODWRU 325 &LUFXLWU\ 9%$7 &$1 &RQWUROOHU 9'' 63, 9%$7 WRORDG /RDG'ULYHU 63, +6'$663 WRORDG &'(& 53527 $'& /HJHQG *1' 63&0LFUR 9%$7 /V &9%$7&9%$7 &9'' &'(& &/3) %DWWHU\9ROWDJH./.O 3&%VWUD\LQGXFWDQFHVWUDFHV %DWWHU\6XSSO\&DSDFLWRUV &6XSSO\&DSDFLWRU &'HFRXSOLQJ&DSDFLWRUV &DSDFLWRU/RZ3DVV)LOWHU 59 59 53527 9ROWDJH'LYLGHU5HVLVWRU 9ROWDJH'LYLGHU5HVLVWRU 3URWHFWLRQ5HVLVWRU ("1($'5 DocID024014 Rev 2 5/26 System overview 1.2 AN4218 Car-battery power supply (VBAT) transients In the following chapters tests are shown used in the automotive industry to check if a system consisting of a microcontroller and its power supply are able to withstand the harsh automotive application environment. These tests simulate transients on the battery power supply. They may happen due to switch-on or switch-off the energy consumers along the battery supply line with its huge inductance. Since these loads may consume large currents the magnetic energy stored in the supply cable is huge and its change results in high induced voltages. As example requirements from the International-Standard-Organization (ISO) and some European car manufacturers are described. The influences of these tests have been measured on a system according to Figure 1, in which a voltage regulator, either standalone or as part of a System-Basis-Chip (SBC), generates out of the battery voltage (VBAT) the supply voltage for the microcontroller (VDD). The power-up reset cell of a microcontroller ensures that the microcontroller is put into a well-defined state, when the supply voltage is switched on. The following conditions on the microcontroller power supply should be avoided: Figure 2. Brown out Figure 3. Non strictly rising ramp 9'' 9'' 9 9 ("1($'5 ("1($'5 Figure 4. Slow ramp Figure 5. Residual voltage 9'' 9'' 9 9 ("1($'5 6/26 DocID024014 Rev 2 ("1($'5 AN4218 1.2.1 System overview Example battery supply test pulses Example test pulses can be found in test specification defined either by the ISO or various car makers (see Appendix A: Reference documents). Engine cranking low voltage on battery-supply This test is included in all reference documents. It tests the behavior of the system with a sharp voltage drop and ringing, which can be seen during the engine cranking. As an example the Volkswagen test specification VW80000: 2009-10, defines the test pulse E11: Figure 6. Test pulse E11 ("1($'5 Table 1. Parameters sharp test pulse E11 Parameter Test pulse (sharp) UB 11.0 V UT 3.2 V US 5.0 V UA 6.0 V UR 2V tf ≤ 1 ms t4 19 ms t5 ≤ 1 ms t6 329 ms t7 50 ms DocID024014 Rev 2 7/26 System overview AN4218 Table 1. Parameters sharp test pulse E11 (continued) Parameter Test pulse (sharp) t8 10 s tr 100 ms f 2 Hz Ri 0.01 Ω Pause between test cycles 2s Number of test cycles 10 As shown in Table 1 the ‘sharp’ pulse E11 on VBAT (UB) drops down to 3.2 V (UT). Car-battery supply voltage slow ramp-up This test can be found in all reference documents and is intended to test the device behavior with a very slow battery voltage ramp (0.5 V/min). A proper power-up-reset has to be guaranteed. Car-battery supply voltage slow ramp-down This test can be found in all reference documents and is intended to test the device behavior with a very slow battery voltage ramp (0.5 V/min). A proper device shut-down has to be guaranteed. Reverse car-battery supply voltage This tests the system behavior when the power supply is reversed. 1.2.2 Power-up-reset requirements of the SPC microcontrollers VDD ramp-up/ ramp-down (microcontroller supply) Figure 7 and Table 2 show as example basic requirements for the microcontroller power supply (VDD) ramp-up/ ramp-down (for actual values please refer to the associated device datasheet). The values below are derived from the SPC560B40x/50x, SPC560C40x/50x datasheet and SPC560P34x, SPC560P40x datasheet (see Appendix A: Reference documents). These microcontroller supply requirements have to be fulfilled by the voltage regulator supplying the microcontroller. 8/26 DocID024014 Rev 2 AN4218 System overview Figure 7. VDD ramp-up/ ramp-down (SPC560Bxx, SPC560Cxx, – example only) 9''B+9 9''B+90$; G 9'' GW 9325+0$; 32:(583 )81&7,21$/5$1*( 32:(5'2:1 ("1($'5 Table 2. VDD ramp specification (SPC560P34x, SPC560P40x – example only) Symbol TVDD Parameter Slope characteristics on all VDD during power up with respect to ground (VSS) DocID024014 Rev 2 Minimum Maximum 3 V/s 0.5 V/µs 9/26 Good practices of system power supply AN4218 2 Good practices of system power supply 2.1 Microcontroller power supply reactions on VBAT transients This section shows the measurements done on a system-basis-chip L99PM62GXP, which provides the power supply (VDD) to the microcontroller. In addition to the microcontroller power supply this device provides also an NRESET output, which should be used to drive the microcontroller NRESET input for achieving maximum reliability of the microcontroller power-up state. The measurements have been taken from the STMicroelectronics In-Application-ValidationReport of the L99PM62GXP. This document is available on request. 2.1.1 L99PM62GXP block diagram Figure 8 shows a typical ST system-basis chip, which contains voltage regulators to generate the supply for the microcontroller (output V1). Additionally it provides physical layer interfaces (LIN, CAN), a serial-parallel interface and various high-side and low-side drivers. 10/26 DocID024014 Rev 2 AN4218 Good practices of system power supply Figure 8. L99PM62GXP block diagram 9V /RZ6LGH P$ 2XWSXW&ODPS 7HPS3UHZDUQLQJ 6KXWGRZQ /RZ6LGH P$ 2XWSXW&ODPS 8QGHUYROWDJH 2YHUYROWDJH 6KXWGRZQ 95(* 9P$ 9 9 95(* 9P$ +LJK6LGH 15HVHW P$ FKDQQHO 3:0*HQHUDWRU /2*,& +LJK6LGH P$ +LJK6LGH 7LPHU P$ +LJK6LGH 7LPHU P$ +LJK6LGH &61 &/. ', '2 :LQGRZ :DWFKGRJ 63, )DLO 6DIH 5(/ 5(/ 23 23 23BRXW 23 23 23BRXW 287B+6 287 287 287)62 P$ 287 :DNH8S,Q :8 :DNH8S,Q :8 :DNH8S,Q :8 &$16XSSO\ /,1 /,138 /,1 6$(- 5['B/1,17 +6&$1 ,62 7['B& 5['B& 7['B/ /,1FHUWLILHG $*1' &$1B+ 63/,7 &$1B/ 3*1' ("1($'5 DocID024014 Rev 2 11/26 Good practices of system power supply 2.1.2 AN4218 Measurement setup Figure 9. Measurement setup 3RZHU VXSSO\ $ 9ERDUG 9EDW 9 9V &RPSDQLRQ %RDUG 86% 67 2VFLOORVFRSH 3RZHU VXSSO\ :DYHIRUP JHQHUDWRU 9 /30*;3 'DXJKWHUERDUG 2XW 2XW 2XW 2XW 2XWB+6 5(/ 5(/ 9 /RDGV ("1($'5 2.1.3 Measurement results These measurements show the microcontroller power supply (VDD – V1) and the NRESET output of the L99PM62GXP, if it is subject to the above defined test pulses. Engine cranking low voltage The parameter specification can be found in Table 1. Figure 10. Engine cranking pulse ("1($'5 12/26 DocID024014 Rev 2 AN4218 Good practices of system power supply Figure 11. Measurement over the entire pulse ("1($'5 1. Line 1 (RST): NRESET output Line 2 (V1): microcontroller power supply VDD Line 3 (VBAT): system power supply (VBAT) Line 4 (OUT_HS): high-side driver output Line D4 (CSN): SPI-logic signal chip-select-not Line D5 (OUT_LS): low-side driver output Line D7 (FSO): fail-safe state (internal signal) Figure 12. Zoom into the low voltage drop region ("1($'5 1. Line 1 (RST): NRESET output Line 2 (V1): microcontroller power supply VDD Line 3 (VBAT): system power supply (VBAT) Line 4 (OUT_HS): high-side driver output Line D4 (CSN): SPI-logic signal chip-select-not Line D5 (OUT_LS): low-side driver output Line D7 (FSO): fail-safe state (internal signal) DocID024014 Rev 2 13/26 Good practices of system power supply AN4218 During the VBAT drop to 3.2 V, V1 (VDD) goes to 0 V and switches on after VBAT has reached L99PM62GXP reset threshold. In this case the NRESET output is pulled low and goes to high 2 ms after V1 has reached the NRESET high threshold. Conclusion The steep drop of V1 to 0 V in addition with the fast rising slope of V1 after VBAT has recovered ensures a correct power-up reset of the microcontroller. The NRESET output goes low to put the microcontroller into reset condition; it goes to high after V1 has reached the microcontrollers operating region. The correct power-down / power-up sequence ensures that the microcontroller is always in a defined state. This is additionally supported by the NRESET signal. Supply voltage slow ramp-up Figure 13. VS voltage ramp up (0.5 V/min) ("1($'5 1. Line 1 (RESET): NRESET output Line 2 (V1): microcontroller power supply VDD Line 4 (VBAT): system power supply (VBAT) As long as VBAT is below the L99PM62GXP reset threshold, V1 remains at 0 V. After VBAT has reached the reset threshold of 3.1 V, V1 is switched on with a fast slope. As soon as the NRESET threshold is reached NRESET goes to high. Conclusion The fast slope of V1 above the power-up-reset threshold of the microcontroller ensures a correct power-up-reset of the microcontroller, depending only on the capacitors at the V1 node and not on the battery voltage slope. 14/26 DocID024014 Rev 2 AN4218 Good practices of system power supply The NRESET goes high after V1 has reached the operating region of the microcontroller. The correct power-up sequence ensures that the microcontroller is always in a defined state. This is additionally supported by the NRESET signal. Supply voltage slow ramp-down Figure 14. VBAT voltage ramp down (0.5 V/min) ("1($'5 1. Line 1 (RST): NRESET output Line 2 (V1): microcontroller power supply VDD Line 3 (VBAT): system power supply (VBAT) Line 4 (OUT_HS): high-side driver output Line D6 (OUT_LS): low-side driver output Lines Dx (DI, CLK, CSN): SPI interface signals As soon as VBAT reaches the NRESET threshold, NRESET goes low and remains there until VBAT is 0 V. V1 goes to 0 V with a fast slope, when VBAT is at the power-on-reset threshold of the L99PM62GXP. Conclusion The NRESET goes low after V1 has left the operating region of the microcontroller. Therefore the microcontroller is always in a defined state. The fast falling slope of V1 above the power-up-reset threshold to 0 V of the microcontroller ensures a correct state of the microcontroller during V1 and VBAT switch-off. DocID024014 Rev 2 15/26 Application circuits AN4218 3 Application circuits 3.1 Reference circuit A system containing the microcontroller, the power supply generation, physical layer, load drivers and a measurement unit for permanent enabled battery supply (e.g. KL30) is shown in Figure 15. Figure 15. Reference circuit /6 9%$7 9,1 /6 9'' 9%$7 9287 RSWLRQDO 6%&&RPSDQLRQ &9%$7 9'' &9%$7 &9'' WR0LFUR /6 15(6(7 9%$7 &$1+ 3K\VLFDO/D\HU &$16WDQGDORQH &$1/ WR0LFUR 9%$7 9'' WR0LFUR 90HDVXUH 9'' 9%$7 WRORDG /RDG'ULYHU +6'$663 ,2 ,2 WRORDG 59 53527 59 (6' $'& $'& WR,2VWUXFWXUH LQSXWRXWSXW EXIIHUV DOWHUQDWH IXQFWLRQV 9''&ODPS &'(& &/3) (6' /HJHQG *1' 63&0LFUR 9%$7 /V &9%$7&9%$7 &9'' &'(& &/3) %DWWHU\9ROWDJH./.O 3&%VWUD\LQGXFWDQFHVWUDFHV %DWWHU\6XSSO\&DSDFLWRUV &6XSSO\&DSDFLWRU &'HFRXSOLQJ&DSDFLWRUV &DSDFLWRU/RZ3DVV)LOWHU 59 59 53527 9ROWDJH'LYLGHU5HVLVWRU 9ROWDJH'LYLGHU5HVLVWRU 3URWHFWLRQ5HVLVWRU ("1($'5 3.2 Implementation suggestions Besides the above mentioned requirements for the microcontroller power supply generation special care has to be taken on the following system parts. 3.2.1 Measurement of an permanently enabled power-supply (VMEASURE) Since VMEASURE is permanently supplied, while the supply for the microcontroller system (VBAT) can be turned off, it must be made sure, that the power-up functionality of the microcontroller is not influenced. Additional the microcontroller pins have to be protected against ISO-pulses, which may damage the microcontroller. These ISO-transients are defined in ISO 7637-2:2011(E). Note: The calculations and values used are examples only. For the actual values please refer to the latest datasheet of the used device. Calculation of RV1/2 for ADC The voltage divider has to be dimensioned such that no overvoltage condition at the analogto-digital-convertor (ADC) input can occur. Especially it must be ensured, that the voltage at the ADC is never higher than at the VDD, which supplies the ADC pin. 16/26 DocID024014 Rev 2 AN4218 Application circuits For further information please consult the actual datasheet of the used microcontroller. Figure 16. Voltage divider 9''B+9 90HDVXUH ,2 59 (6' 9$'& 59 $'& 9''&ODPS WR,2VWUXFWXUHLQSXWRXWSXW EXIIHUVDOWHUQDWHIXQFWLRQV (6' 63&0LFUR *1' ("1($'5 Example 1: Maximum VADC = 5.0V Maximum VMEASURE = 40V R V2 5.0V --------------------------------- = -----------40V ( R V1 + R V2 ) Insertion of a series protection resistor (RPROT) The series resistor RPROT prevents current injection spikes into the microcontroller and its ESD-diodes if an ISO-transient occurs. These ISO-transients are defined in ISO 7637-2:2011(E). The values used in the following calculations are examples only. Please consult the actual datasheet of the used device for the latest requirements. DocID024014 Rev 2 17/26 Application circuits AN4218 Figure 17. ISO transients ,627UDQVLHQW 9''+9 9''B+9 3RVLWLYH,62 7UDQVLHQW 90HDVXUH ,2 59 (6' 53527 9$'& $'& 59 9''&ODPS WR,2VWUXFWXUHLQSXWRXWSXW EXIIHUVDOWHUQDWHIXQFWLRQV (6' 1HJDWLYH,62 7UDQVLHQW 63&0LFUR *1' ("1($'5 Example 2: ISO-pulse 3b generates a maximum voltage of 100 V and uses an interior resistor of 50 Ω (RI) at pin VMEASURE. Neglecting RI this leads to: 5V 100V ⋅ ----------- = 12.5V 40V at the ADC-pin. This voltage is clamped to VDD + 0.7 V (typical ESD-diode drop). With VDD = 5 V this clamp voltage is 5.7 V. The maximum injected current at any pin derived from the absolute maximum ratings is 10 mA, so the series protection resistor (RPROT) has to be at least 12.5V – 5.7V R PROT = ---------------------------------- = 680Ω 10mA to clamp the positive pulse. For the negative ISO-Pulse the calculation is similar: the ISO-Pulse 3a generates a negative voltage of -150 V over 50 Ω (RI). Neglecting RI the resulting voltage before RPROT is 5V – 150V ⋅ ----------- = – 18.75V 40V 18/26 DocID024014 Rev 2 AN4218 Application circuits This is clamped to -0.7 V by the internal ESD-diode to ground, so RPROT has to be at least – 18.75V – ( – 0.7V ) R PROT = -------------------------------------------------- = 1.805kΩ – 10mA As can be seen from above calculations, the negative ISO pulse requires a series protection resistor of at least 2 kΩ to limit the injected current to the absolute maximum ratings. If the injected current has to be limited to ±5mA the required series protection resistor has to be at least 4 kΩ. A larger resistor is recommended to cover the worst-case conditions. This calculation applies for low-impedance voltage dividers at VMEASURE. A simplified calculation can be used for higher resistive RV1: • For the positive ISO-pulse: 100V – 5.7V R V1 = --------------------------------- = 9.42kΩ 10mA • For the negative pulse: – 150V – ( – 0.7V ) R V1 = --------------------------------------------- = 14.93kΩ – 10mA So for RV1 > 15 kΩ (30 kΩ for 5mA injection current), the series protection resistor can be omitted, but it protects the microcontroller input in case of a damaged RV1. Figure 18 shows a simulation of a negative 150 V ISO pulse. ‘V(meas)’ is the voltage at the VMEASURE pin, ‘V(adc)’ at VADC and ‘Ix(xuc:IO)’ the current that flows out of the microcontroller pin. The resistor divider uses RV1= 15 kΩ and RV2= 2.2 kΩ. Figure 18. Negative ISO-pulse simulation 9PHDV 9 9 9 9 9 9 9DGF P9 P9 P9 P9 P9 P9 ,[[XF,2 P$ P$ P$ P$ P$ P$ PV PV PV PV PV PV PV PV PV PV PV *$3*&)7 As can be seen in Figure 18 the current out of the microcontroller with a negative ISO-pulse of 150 V does not increase above 10 mA. Please refer to the latest datasheet of the used device for further information. Especially a possible impact on the accuracy of the analog-to-digital-convertor has to be taken into account. DocID024014 Rev 2 19/26 Application circuits AN4218 Low pass filter The low-pass filter, which consists of RPROT and CLPF, has to be dimensioned such that the bandwidth of the ADC is not exceeded, since otherwise aliasing-artifacts may be observed. Figure 19. Protection and low-pass-filter 9''+9 9''B+9 90HDVXUH ,2 59 (6' 9$'& 53527 $'& &/3) 59 9''&ODPS WR,2VWUXFWXUHLQSXWRXWSXW EXIIHUVDOWHUQDWHIXQFWLRQV (6' 63&0LFUR *1' *$3*&)7 Figure 20 shows a simulation of the frequency (amplitude damping and phase) at VADC with RV1 = 15 kΩ, RV2 = 2.2 kΩ, RPROT = 680 Ω and CLPF = 1 nF. The input voltage is 15 V with an AC-Amplitude of 1 V (the voltage divider-by-8 causes an initial 18dB reduction). Figure 20. Amplitude and phase over frequency 9DG F G % G % G % G % G % G % G % G % G % G % G % G % G % .+] .+] .+] 0+] 0+] *$3*&)7 Divider disconnection switch A switch at VMEASURE avoids backward supplying from a powered VMEASURE source to the unpowered microcontroller through the ESD diode of the input pin. 20/26 DocID024014 Rev 2 AN4218 Application circuits Figure 21. Backward current 9''+9 9''B+9 %DFNZDUG&XUUHQW ZKLOH9''+9 9 DQG90($685(DSSOLHG 90HDVXUH 6ZLWFK ,2 59 53527 59 (6' 9$'& $'& &/3) 9''&ODPS WR,2VWUXFWXUHLQSXWRXWSXW EXIIHUVDOWHUQDWHIXQFWLRQV (6' 63&0LFUR *1' *$3*&)7 With a current flowing through the ESD-diode, the voltage at pin VADC would be one VBE (0.7 Vtyp) higher than VDD-HV, thus violating the absolute maximum rating of 0.3 Vmax. 3.2.2 Bad practices An example of a badly designed VMEASURE measurement interface is shown in the Figure 22. The circuit does not contain a protection resistor RPROT and no low-pass-filter. DocID024014 Rev 2 21/26 Application circuits AN4218 Figure 22. Bad example circuit /6 9%$7 9,1 /6 9'' 9%$7 9287 ,,1- RSWLRQDO ,,1- 6%&&RPSDQLRQ &9%$7 9'' &9%$7 &9'' WR0LFUR /6 15(6(7 9%$7 3K\VLFDO/D\HU &$1+ &$16WDQGDORQH &$1/ WR0LFUR 9%$7 9'' WR0LFUR 90HDVXUH ./ 9'' 9%$7 WRORDG /RDG'ULYHU +6'$663 ,2 WRORDG 59 ,0($685( ,,1- (6' $'& $'& 59 9$'& WR,2VWUXFWXUH LQSXWRXWSXW EXIIHUV DOWHUQDWH IXQFWLRQV 9''&ODPS &'(& (6' /HJHQG *1' 63&0LFUR 9%$7 /V &9%$7&9%$7 &9'' &'(& %DWWHU\9ROWDJH./.O 3&%VWUD\LQGXFWDQFHVWUDFHV %DWWHU\6XSSO\&DSDFLWRUV &6XSSO\&DSDFLWRU &'HFRXSOLQJ&DSDFLWRUV 59 59 9ROWDJH'LYLGHU5HVLVWRU 9ROWDJH'LYLGHU5HVLVWRU *$3*&)7 Calculation of RV1/2 for ADC The calculation for the voltage divider is done in the same way as for the example with RPROT. In addition to this, also the ADC-protection regarding ISO-transients has to be taken into account. Effects of the bad VMEASURE implementation Sensitivity to ISO transients Any ISO pulse voltage (e.g. +100 V, - 150 V) applied to pin VMEASURE is applied to the device pin and its ESD protection diode directly via RV1. If RV1 is not high resistive enough (see example above), the microcontroller might be damaged. Sensitivity to Electro-Magnetic-Injection (EMI) All EMI-distortions at the pin VMEASURE are coupled into the microcontroller pin via the voltage divider and may distort the microcontroller. A capacitor at the microcontroller pin improves this by adding a low resistive path to ground for high frequencies. Residual voltage at VDD in power down condition A residual voltage at VDD might happen if the current flowing from VMEASURE to VDD via the microcontroller ESD protection diode is not actively sunk to ground. Since the VDD-net supplies other components in the system (e.g. physical layer, high load drivers etc.) they will get affected as well. Absolute maximum ratings of the ESD-protection diode In power down condition the absolute maximum voltage rating (e.g. 0.3 V) as well as the absolute maximum current rating (e.g. 75 µA) may constantly be violated. The voltage and currents given above are examples only, for the actual values please refer to the associated datasheet. 22/26 DocID024014 Rev 2 AN4218 Application circuits System reliability The ESD-diodes inside of the microcontroller are designed for short discharge pulses only, not to sustain a constant current over time. Therefore the maximum continuous voltage drop over them is specified in the absolute maximum ratings to be not higher than 0.3 V. In this case only a very limited current is flowing through them. A continuous current may lead to a degrading effect on these diodes over time. 3.2.3 Physical layer Physical layer interfaces such as CAN-transceiver and LIN-transceivers may not have a reverse protection from the physical layer to its power supply, which may be connected to the microcontroller-supply (VDD-HV). Since the physical layer is driven by other members on the bus this may lead to residual voltages while the microcontroller is not supplied. CAN-transceiver without reverse protection show the backward current through an unprotected CAN-biasing net to the unpowered microcontroller-supply (VDD). In a carnetwork the CAN-bus is expected to be always supplied even while the microcontroller is not. Figure 23. CAN-transceiver without reverse protection 9%$7 9,1 /6 9''+9 9287 &9'' 6%&&RPSDQLRQ &,1 &95(* 15(6(7 WR0LFUR 9'' 9''+9 9'' 9''B+9 (6' %DFNZDUG&XUUHQW ZKLOHWKH&$1%XV &$1+&$1/LV VXSSOLHG &$1+ ,2 WR,2VWUXFWXUHLQSXWRXWSXW EXIIHUVDOWHUQDWHIXQFWLRQV &$1/ (6' 9''&ODPS 3K\VLFDO/D\HU &$16WDQG$ORQH 63&0LFUR *1' *$3*&)7 DocID024014 Rev 2 23/26 Reference documents Appendix A 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. AN4218 Reference documents 32-bit Power Architecture® based MCU for automotive powertrain applications (SPC560P34x, SPC560P40x — Doc ID 18078) 32-bit MCU family built on the embedded Power Architecture® (SPC564A74B4, SPC564A74L7, SPC564A80B4, SPC564A80L7 — Doc ID 15399) 32-bit MCU family built on the Power Architecture® for automotive body electronics applications (SPC560D30x, SPC560D40x — Doc ID 16315) 32-bit MCU family built on the Power Architecture® for automotive body electronics applications (SPC560B40x, SPC560B50x, SPC560C40x, SPC560C50x — Doc ID 14619) 32-bit MCU family built on the Power Architecture® for automotive body electronics applications (SPC560B54x, SPC560B60x, SPC560B64x — Doc ID 15131) 32-bit MCU family built on the Power Architecture® for automotive body electronics applications (SPC564Bxx, SPC56ECxx — Doc ID 17478) 32-bit Power Architecture® microcontroller for automotive SIL3/ASILD chassis and safety applications (SPC56EL60x, SPC56EL54x, SPC564L60x, SPC564L54x — Doc ID 15457) 32-bit Power Architecture® microcontroller for automotive SIL3/ASILD chassis and safety applications (SPC56EL70L3, SPC56EL70L5, SPC564L70L3, SPC564L70L5 — Doc ID 023953) 32-bit Power Architecture® based MCU with 320 KB Flash memory and 20 KB RAM for automotive chassis and safety applications (SPC560P34L1, SPC560P34L3, SPC560P40L1, SPC560P40L3 — Doc ID 16100) 32-bit Power Architecture® based MCU with 576 KB Flash memory and 40 KB SRAM for automotive chassis and safety applications(SPC560P44L3, SPC560P44L5, SPC560P50L3, SPC560P50L5 — Doc ID 14723) 32-bit Power Architecture® based MCU with 1088 KB Flash memory and 80 KB RAM for automotive chassis and safety applications (SPC56AP60x, SPC56AP54x, SPC560P60x, SPC560P54x — Doc ID 18340) 32-bit Power Architecture® based MCU for automotive powertrain applications (SPC563M64L5, SPC563M64L7 — Doc ID 14642) Power management IC with LIN and high speed CAN (L99PM62GXP, Doc ID 15136) 14. ISO 7637-2:2011(E) 15. ISO16750-2:2006 16. BMW GS95024-2-1 17. Renault 36-00-808 / 2010 18. VW 80000: 2009-10 24/26 DocID024014 Rev 2 AN4218 Revision history Revision history Table 3. Document revision history Date Revision Changes 04-Mar-2013 1 Initial release. 17-Sep-2013 2 Updated Disclaimer. DocID024014 Rev 2 25/26 AN4218 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. 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