RENESAS M61250BFP

M61250BFP
NTSC 1 chip TV signal processor
REJ03F0088-0100Z
Rev.1.0
Sep.23.2003
Description
The M61250BFP is a single-chip semiconductor integrated circuit that contains the signal processing for NTSC color
television.
All of the signal processing circuits for video intermediate frequencies, vocal intermediate frequencies, video, color,
and polarization, as well as I2C bus control, are built in, and television sets ranging from popular-class to medium-grade
sets are supported. Moreover, the M37150 8-bit microcomputer for the television and the interconnection pin are
opposite each other, so that less space is required for mounting.
Features
•
•
•
•
•
•
•
•
•
•
•
•
No VCO coil for VIF required
Internal unregulated vocal demodulator
PLL-SPLIT SIF system for FM radio
Fsc output
ACL or ABCL can be selected
Internal horizontal oscillation probe
Internal perpendicular sawtooth wave generator
Internal self-diagnosis function
Internal black peak hold, AFC2, killer filter
H & V pulse output for OSD
Internal reset circuit and clock output for microcomputer use
Internal 5 V and 8 V regulators
Applications
• NTSC color television receivers
Recommended Operating Conditions
• Power supply voltage range:
4.75 V to 5.25 (Pins 3, 4, 39, 40)
7.6 V to 8.4 V (Pins 12, 44)
8.3 V to 9.1 V (Pin 42)
• Recommended power supply voltage:
5.0 V (Pins 3, 4, 39, 40)
8.0 V (Pins 12, 44)
8.7 V (Pin 42)
Rev.1.0, Sep.23.2003, page 1 of 49
M61250BFP
Pin Configuration (Top View)
V RAMP CAP
AFT OUT
VIF Vcc
SIF Vcc
RAMP OUT
V RAMP F/B
AFC FILTER
DEF GND
LOGIC GND
FBP IN
H OUT
DEF Vcc
NC
R OUT
G OUT
B OUT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Rev.1.0, Sep.23.2003, page 2 of 49
M61250BFP
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
LIMITER IN
8.7V REG OUT
NC
NC
Hi Vcc
AUDIO ATT FILTER
VREG Vcc
TV/Y IN
VIDEO/CHROMA Vcc
DRIVE Vcc
EXT/C IN
CHROMA APC FILTER
VIDEO/CHROMA GND
DRIVE GND
X-TAL 3.58
ACL/ABCL
M61250BFP
Pin Explanations
Pin No.
Name
1
V RAMP CAP
Pin peripheral circuit
2
AFT OUT
0.3 to 4.7
3
4
5
VIF VCC
SIF VCC
RAMP OUT
5.0 V
6
V RAMP FEED
BACK
Rev.1.0, Sep.23.2003, page 3 of 49
DC voltage (V)
4.6
M61250BFP
Pin Explanations (cont)
Pin No.
Name
7
AFC FILTER
8
9
10
DEF GND
LOGIC GND
FBP IN
11
H OUT
12
DEF VCC
13
NC
14
15
16
R OUT
G OUT
B OUT
Pin peripheral circuit
Rev.1.0, Sep.23.2003, page 4 of 49
DC voltage (V)
3.5 V
VTH: 2.0 V
(FBP Vth L = OFF)
VTH: 1.0 V
(FBP Vth L = ON)
VOL: 0.0 V
VOH: 5.4 V
M61250BFP
Pin Explanations (cont)
Pin No.
Name
Pin peripheral circuit
17
H VCO
FEEDBACK
18
INTELLIGENT
MONITOR
19
INV FBP OUT
VOL: 0.0 V
VOH: 5.0 V
20
V PULSE OUT
VOL: 0.0 V
VOH: 5.0 V
Rev.1.0, Sep.23.2003, page 5 of 49
DC voltage (V)
3.0 V
M61250BFP
Pin Explanations (cont)
Pin No.
Name
Pin peripheral circuit
21
22
23
B IN
G IN
R IN
(1) Digital OSD
VIL: 0.0 V
VIH: 3.0 V
(2) Analog OSD
0.7 Vp-p
24
FAST BLK
0.0-0.5 V: INT RGB
1.5-3.0 V: H TONE
4.0-5.0 V: EXT RGB
25
CLK CONTROL
VTH: 3.0 V
26
SDA
VIL: 0.75 V
VIH: 4.25 V
Rev.1.0, Sep.23.2003, page 6 of 49
DC voltage (V)
M61250BFP
Pin Explanations (cont)
Pin No.
Name
Pin peripheral circuit
27
SCL
VIL: 0.75 V
VIH: 4.25 V
28
POWER ON
CONTROL
VTH: 3.0 V
29
fsc OUT 1
3.0 V
30
MCU RESET
H: 5.0 V
L: 0.0 V
Rev.1.0, Sep.23.2003, page 7 of 49
DC voltage (V)
M61250BFP
Pin Explanations (cont)
Pin No.
Name
Pin peripheral circuit
31
Y SW OUT
1.7 V
32
MCU 5.7 VREG
OUT
5.7 V
33
ACL/ABCL
34
X-TAL 3.58
3.3 V
35
36
DRIVE GND
Video/Chroma
GND
0.0 V
Rev.1.0, Sep.23.2003, page 8 of 49
DC voltage (V)
M61250BFP
Pin Explanations (cont)
Pin No.
Name
Pin peripheral circuit
37
CHROMA APC
FILTER
3.2 V
38
EXT/C IN
1.7 V
39
40
DRIVE VCC
Video/Chroma
VCC
5.0 V
41
TV/Y IN
1.7 V
42
VREG VCC
8.7 V
43
AUDIO ATT
FILTER
2.75 V to 3.25 V
44
Hi VCC
8V
45
46
NC
Rev.1.0, Sep.23.2003, page 9 of 49
DC voltage (V)
M61250BFP
Pin Explanations (cont)
Pin No.
Name
Pin peripheral circuit
47
8.7 VREG OUT
8.7 V
48
LIMITER IN
2.5 V
49
5.7 VREG OUT
5.7 V
50
INTER
CARRIER OUT
2.3 V
Rev.1.0, Sep.23.2003, page 10 of 49
DC voltage (V)
M61250BFP
Pin Explanations (cont)
Pin No.
Name
Pin peripheral circuit
51
AUDIO OUT
2.3 V
52
AUDIO BYPASS
2.3 V
53
EXT AUDIO IN
3.0 V
54
FM DIRECT
OUT
3.0 V
Rev.1.0, Sep.23.2003, page 11 of 49
DC voltage (V)
M61250BFP
Pin Explanations (cont)
Pin No.
Name
Pin peripheral circuit
55
VIF VCO
FEEDBACK
56
57
58
SIF GND
VIF GND
VIDEO OUT
2.7 V
59
RF AGC OUT
0.3 to 4.7 V
60
VIF APC
FILTER
3.0 V
Rev.1.0, Sep.23.2003, page 12 of 49
DC voltage (V)
3.0 V
M61250BFP
Pin Explanations (cont)
Pin No.
Name
61
VIF AGC
FILTER 2
VIF AGC
FILTER 1
2.3 V
VIF IN (1)
VIF IN (2)
1.6 V
62
63
64
Pin peripheral circuit
Rev.1.0, Sep.23.2003, page 13 of 49
DC voltage (V)
Rev.1.0, Sep.23.2003, page 14 of 49
IF IN
VIF
IN
Y-SW OUT
ACL/ABCL
AFT
OUT
SAW
RF AGC
OUT
31
LPF
41
TRAP
SW
DL
TIME
DL
FINE
VIDEO
MUTE
MUTE
AFT OUT
VIDEO
CHROMA
TRAP
DELAY
VIDEO
TONE
CLAMP
61
IF AGC
62
AFT
DEFEAT
TV IN/ Y IN
1Vp-p
x2
F.TRAP
Y SW
LPF
VIF
AMP
BLACK STRETCH
GAMMA
BLACK
STRETCH GAMMA
RF AGC
SHARPNESS
33
2
64
63
59
DELAY ADJ
HPF
ADJ
DET
APC
DET
55
VCO
ADJ
35
36
VIDEO/CHROMA
GND
CLOCK
CONTROL
25
58
LOCK
DET
US/JPN
TAKE OFF
REF
FILTER
60
EXT IN /C IN
1Vp-p
38
CHROMA
BPF
ACC
VIDEO
DET
VCO
VIF VCOADJ
42
37
CHROMA
APC
DET
ACC
DET
KILLER
DET
32
5V
39
34
fsc
OUT
29
VCXO
45
NC
8.7V
TINT ANGLE
DEMODULATOR
RGB
MATRIX
CONTRAST
CLK CONT
3.58MHz
40
47
11V
P-ON-ON
RESET
30
RESET
to MCU
MCU V DD
5V
(WHITE)
BLUE BACK
CONTRAST
COLOR
5.7Vreg
8.7V
VIDEO/CHROMA
Vcc
KILLERB
1 Vp-p
VIDEO
OUT
49
46
NC
17
19
INV
FBP
INV
OUT
HVCO ADJ
VCO
ADJ
28
SYNC
SEP
BRIGHT
BRIGHT
POWER ON
CONTROL
SYNC
SLICE
5.7V
from MCU
Vcc 5V
Vcc 8V
FBP
IN
10
HPF
50
7
AFC 1
EQ
ELIMINATE
AMP
DRIVE
DRIVE
B
R
LIMITER
48
3
FM
DET
8V
44
56
AF
AMP
MUTE
52
FM
54
BLK
HV
V.SHIFT
8
H VCO
9
DEF
GND
H COINB
H
COINCI.
AFC 2
H STOP
COUNT DOWN
HORIZONTAL
V COINB
COUNT DOWN
BUS
I/F
ATT
ATT
11
Intelligent
Monitoring
43
H. OUTPUT
H-PHASE
NC
Intelligent Monitoring
V.SIZE
V.RAMP
SERVICE SW
AUDIO SW
53
EXT AUDIO IN
DIRECT OUT
VERTICAL
R G B
CUT OFF
CLAMP
VIF GND
57
Hi Vcc
AFC GAIN
BGP
GEN
V SYNC
TRIG
B EXT
INPUT
G EXT
INPUT
R EXT
INPUT
VIF Vcc
4
INTER
LIMITER
CARRIER IN
OUT
5V
12
13
18
1
20
6
5
16
15
14
21
22
V.OUT
DEF
Vcc
V.PULSE
OUT
8V
VERTICAL
B
G
R
B IN
G IN
R IN
OUT PUT
FAST BLK
23
SCL
24
SDA
AUDIO
OUT
27
26
51
DY
M61250BFP
Block Diagram
M61250BFP
Absolute Maximum Ratings
(Ta = 25°C)
Item
Symbol
Rating
Unit
Power supply voltage
VCC
6.0, 10.0
V
Internal power dissipation
Thermal derating
Ambient operating temperature
Storage temperature
Pd
Kt
Topr
Tstg
2026
16.2
−20 to +65
−40 to +150
mW
mW/°C
°C
°C
Internal Power dissipation Pd (W)
Thermal Derating (Maximum Ratings)
2.5
2.0
1.5 1.38
1.0
0.5
65
0
25
50
75
100 125
Ambient temperature (°C)
Rev.1.0, Sep.23.2003, page 15 of 49
150
M61250BFP
I2C Bus Table
1. SLAVE ADDRESS= BAH(WRITE), BBH(READ)
A6
1
A5
0
A4
1
A3
1
A2
1
A1
0
A0
1
R/W
1/0
D1
D0
INITIAL
0
0
40H
0
20H
0
0
Take Off
0
0
0
00H
V0
V0
20H
V0
V0
Y DL Time Adj
0
0
40H
V0
V0
40H
V0
V0
40H
1
0
0
04H
V0
V0
V0
80H
0
0
0
40H
0
0
0
40H
0
0
0
80H
0
0
0
80H
0
0
H VCO Adj
0
0
80H
0
24H
0
0
20H
0
00H
0
00H
03H
00H
2. WRITE TABLE(input bytes )
SUB ADDRESS
HEX
BIN
00H
00000000
01H
00000001
02H
00000010
03H
00000011
04H
00000100
DATA
D7
(inhibited)
0
(inhibited)
0
Video Mute
0
Audio Mute
0
ABCL Gain
0
D6
D5
D4
1
VIFFreq5875
0
Audio EXT
0
0
0
1
C. Clip level
0
0
TRAP Off
0
0
0
V1
V0
V1
VIF Video Out Gain
0
V0
0
V0
Y/C
V0
V1
V0
V0
V1
VOUT STOP
0
V0
FSC FREE
0
V0
HTONE SW
0
V0
V0
V0
1
0
0
1
0
0
0
AFT Defeat
0
EXTRGB C. Clip
05H
00000101
V0
06H
00000110
07H
00000111
08H
00001000
1
VIF Defeat
0
Blue Back
V0
HV BLK OFF
0
09H
00001001
0AH
00001010
V1
0BH
00001011
0CH
00001100
(inhibited)
0
(inhibited)
0
0DH
00001101
1
0
0
0
0EH
00001110
1
0
0
0
0FH
00001111
1
White Back
0
0
V-free
0
0
10H
00010000
0
D3
D2
RF Delay Adj
0
0
VIF VCO ADJ
0
0
Video T Sharp
ABCL
0
0
Audio ATT
0
0
Video Tone
V0
V0
Contrast Control
V0
V0
EXT
Y DL Fine Adj
V0
0
Tint Control
V0
V0
Color Control
V0
V0
0
Brightness Control
V0
Drive(R)
0
Drive(B)
0
Cut Off(R)
0
Cut Off(G)
0
Cut Off(B)
0
0
0
00010001
0
0
1
0
Monitoring
12H
00010010
13H
00010011
14H
00010100
15H
00010101
16H
00010110
80H
1
V-Size
(inhibited)
11H
00H
(inhibited)
(inhibited)
1
Black Stre. Off
0
0
H-free
V.1Window
0
0
Black Strech Discharge
0
0
AFC1 Gain
AFC2 Gain
0
0
Aoto slice down
VSYNCDET
1
0
0
0
YSW LPF
H Start
0
0
Black Strech Charge
0
0
OSD level
Analog OSD
0
0
FBP Vth L
0
1
0
0
Gamma Control
0
0
Service SW
0
0
TRAP Fine Adj
0
V Shift
0
S.Slice Down2
S.Slice Down1
0
0
US/JPN SW
0
AFC2 H Phase
0
0
1
Killer level
0
0
0
90H
V0
V0
V0
40H
0
0
0
00H
0
0
0
00H
0
0
0
0
00H
0
VBLKSHIFT ON
0
0
0
VBLK SHIFT
0
00H
0
0
04H
0
0
(inhibited)
1
(reserved)
17H
00010111
0
V1
V0
V0
V0
Test1
18H
19H
1AH
00011000
00011001
00011010
0
BGPFBP OFF
0
Test3
0
(inhibited)
0
Test2
0
0
0
0
(inhibited)
0
0
0
(inhibited)
0
0
0
(inhibited)
1BH
1CH
00011011
00011100
0
TEST4
0
0
VFREE INT
0
0
0
(inhibited)
0
0
1
NOTE: V0 / V1 ==> V- LATCH BIT
3. READ TABLE (output bytes)
SUB ADDRESS
00H
00000000
D7
KILLERB
D6
(not asigned)
Rev.1.0, Sep.23.2003, page 16 of 49
D5
VCOINB
D4
STDETB
D3
AFT0
D2
AFT1
D1
HCOINB
D0
(not asigned)
M61250BFP
Bus Functions
WRITE
FUNCTION
BIT
SUB
ADD
DATA
DISCRIPTION
INITIAL
VIF
RF delay adj
7
00H
D0-D6
RF AGC delay point adjustment
40H
SIF
VIF VCO adj
6
10H
D0-D5
VIF VCC free-running frequency adjustment
(adjust by setting VIF Defeat = 1 to center the AFT output)
20H
VIF freq. 58.75
1
01H
D6
IF 45.75/58.75 switching; 0: 45.75, 1: 58.75 MHz
0
VIF Video out
gain
3
06H
D5-D7
Pin 58 IVF video-detection-wave output level adjustment
80H
VIDEO
CHROMA
AFT defeat
1
04H
D6
AFT output on/off (defeat) switching; 0: AFT on (non defeat), 1: Defeat
0
VIF defeat
1
07H
D7
VIF AGC gain normal/minimum switching; 0: AGC function,
1: Defeat (minimum gain)
0
NOTE
Audio ATT
7
03H
D0-D6
Pin 51 audio output level adjustment
00H
Audio EXT
1
02H
D6
Audio internal signal and external signal input switching;
0: internal, 1: external
0
Audio mute
1
03H
D7
Pin 53 audio direct output on/off (mute) switching;
0: audio on (non-muted), 1: mute
0
Video tone
6
04H
D0-D5
Sharpness level control
20H
V Latch
Contrast control
7
05H
D0-D6
Contrast level control
40H
V Latch
EXTRGB
contrast clip
1
05H
D7
EXT RGB contrast lower-limit clipping on/off; 0: clipping on, 1: clipping off
0
V Latch
C. clip level
1
02H
D5
EXT RGB contrast lower-limit clipping level switching;
0: low (20H), 1: high (40H)
0
Y DL time adj
2
06H
D0-D1
Y signal delay adjustment
X0H
Y DL fine adj
1
06H
D2
Y signal delay fine adjustment
0
EXT
1
06H
D3
Video input pins 41/38 switching; 0: pin 41, 1: pin 38
0
V Latch
Y/C
1
06H
D4
Pins 38/41 composite input/YC input switching; 0: composite, 1: Y/C mode
0
V Latch
Y SW LPF
1
13H
D5
Pin 31 (Y SW OUT) output f-characteristic switching;
0: flat, 1: LPF (fc=700 kHz)
0
Video tone
sharp
1
02H
D3
Video tone level two level (sharp/soft) switching; 0: standard (soft), 1: sharp
0
Video mute
1
02H
D7
Y signal output on/off (mute) switching; 0: mute off, 1: mute
0
TRAP off
1
02H
D4
Y signal chroma trap on/off switching; 0: trap on, 1: trap off
0
TRAP fine adj
2
12H
D0-D1
Chroma trap frequency fine adjust
X0H
Black stretch off
1
02H
D1
Black stretch circuit on/off switching;
0: black stretch on, 1: black stretch off
0
Black stretch
charge
2
14H
D4-D5
Black stretch charge time constant adjustment
0XH
Black stretch
discharge
2
14H
D6-D7
Black stretch discharge time constant adjustment
0XH
Gamma control
2
12H
D2-D3
Gamma level adjustment
X0H
Tint control
7
07H
D0-D6
Hue control
40H
V Latch
Color control
7
08H
D0-D6
Color level control
40H
V Latch
Take off
1
02H
D0
Chroma BPF take-off function on/off switching; 0: BPF; 1: take off
0
US/JPN SW
1
15H
D1-D3
US mode/JPN mode switching; 100: US mode, 011: JPN mode
0
Killer level
1
15H
D0
Colorkiller sensitivity switching (active shallow direction);
0: 41 dB,1: 34 dB
0
Fsc
1
09H
D5
X’tal oscillation circuit forced free-running mode; 0: off, 1: free-running
0
Rev.1.0, Sep.23.2003, page 17 of 49
M61250BFP
Bus Functions (cont)
WRITE (cont)
RGB
DEF
FUNCTION
BIT
SUB
ADD
DATA
DISCRIPTION
INITIAL
NOTE
Brightness
control
8
0AH
D0-D7
Bright level control
80H
V Latch
40H
Driver (R)
7
0BH
D0-D6
R output level control
Driver (B)
7
0CH
D0-D6
B output level control
40H
Cut off (R)
8
0DH
D0-D7
R output DC level control
80H
Cut off (B)
8
0EH
D0-D7
G output DC level control
80H
Cut off (B)
8
0FH
D0-D7
B output DC level control
80H
Blue back
1
08H
D7
Blue back screen on/off switching; 0: off, 1: blue back
0
White back
1
10H
D7
White raster on/off switching; 0: off, 1: white back
0
ABCL
1
02H
D2
ABCL on/off switching; 0: off, 1: ABCL on
0
ABCL gain
1
04H
D7
ABCL sensitivity low/high switching; 0: low, 1: hi
0
OSD level
1
15H
D5
OSD level (70%/90%) switching; 0: 70%, 1: 90%
0
HTONE SW
1
09H
D4
Halftone on/off switching; 0: off, 1: halftone
0
Analog OSD
1
15H
D4
OSD input digital/analog switching; 0: digital, 1: analog
0
AFC2 H phase
5
16H
D0-D4
Screen horizontal position adjustment
90H
Ramp stop
1
09H
D6
Pin 5 VOUT (ramp/pulse) forced stop mode (when stopped, pin 5 at DC
GND level); 0: VOUT, 1: STOP
0
Service SW
1
13H
D3
Vertical output on/off switching; 0: vertical output on, 1: vertical output off
0
H start
1
13H
D4
Horizontal output out/stop switching; 0: stop, 1: H out
0
AFC 1 gain
1
15H
D7
Horizontal AFC gain a high/low switching; 0: low, 1: hi
0
AFC 2 gain
1
15H
D6
Horizontal AFC2 gain high/low switching; 0: high, 1: low
0
H VCO adj
3
10H
D0-D2
H VCO free-running frequency adjustment
24H
V shift
3
13H
D0-D2
Vertical ramp start timing adjustment
X0H
V-size
6
11H
D0-D5
Vertical ramp amplitude adjustment
20H
H-free
1
13H
D7
Horizontal output forced free-running mode on/off switching;
0: off, 1: horizontal free-running
0
V-free
1
10H
D6
Vertical output forced free-running mode on/off switching;
0: off, 1: vertical free-running
0
S slice down 1
1
14H
D2
Sync detection slice level (50%/30%) switching; 0: 50%, 1: 30%
0
S slice down 2
1
14H
D3
Sync detection slice level (50%/40%) switching; 0: 50%, 1: 40%
0
Audio slice
down
1
16H
D6
Sync detection slice level (50%/40%) switching during image period;
0: slice level fixed, 1: slice level reduced
0
FBP Vth L
1
16H
D5
Pin 10 (FBP in) slice level switching during image period;
0: Vth = 2V (HBLK width: narrow), 1: Vth = 1 V (HBLK width: wide)
0
HV BLK OFF
1
09H
D7
Horizontal/vertical blanking on/off switching; 0: blanking on, 1: blanking off
0
V SYNK DET
1
16H
D7
Vertical minimum sync detection width switching;
0: sync detect width =18 µs, 1: sync detect width =14 µs
90H
1 window
1
13H
D6
Vertical sync detection switching (1 window/2 window s);
0: 2 windows, 1: 1 window
0
BGPFBP OFF
1
19H
D7
Internal BGP on/off switching when no FBP input; 0: BGP on, 1: BGP off
0
VREF INT
1
1CH
D6
Interface/non-interface switching at vertical free-running
04H
VBLK SHIFT
ON
1
1CH
D3
0: Normal (VBLK shifts by VSHIFT),
1: Vertical blanking width can be setted by un-interlocking VSHIFT
04H
VBLK SHIFT
3
1CH
D0-D2
D0-D2: VBLK SHIFT (Initial value: 100=4)
04H
Monitoring
4
12H
D4-D7
Pin 18 intelligent monitoring mode switching
0XH
Test1
1
18H
D6-D7
NO use for Customer (Test bit)
0
Test2
1
19H
D6
NO use for Customer (Test bit)
0
Test3
1
1AH
D6-D7
NO use for Customer (Test bit)
0
Test4
1
1CH
D6
NO use for Customer (Test bit)
04H
Rev.1.0, Sep.23.2003, page 18 of 49
M61250BFP
READ
FUNCTION
BIT
SUB
ADD
DATA
DISCRIPTION
KILLERB
1
00H
D7
Colorkiller information output; "1" when killer off
AFT0
1
00H
D3
AFT information output (See note 1)
AFT1
1
00H
D2
AFT information output (See note 1)
HCOINB
1
00H
D1
Horizontal sync detection; "1" when asynchronous
FM STDETB
1
00H
D6
FM radio mode detection; "1" when not detected
VCOINB
1
00H
D5
Vertical sync detection; "1" when asynchronous
STDETB
1
00H
D4
TF mode detection; "1" when not detected
Note: 1. <READ BYTE: AFT OUTPUT>
Rev.1.0, Sep.23.2003, page 19 of 49
M61250BFP
Test Circuits
FAST BLK
IN EXT R IN EXT G IN EXT B IN
SDA
SCL
A
P32
P31
P30
P24
P29
P20
P19
P18
P17
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
N.K.D
Part
number
M351T01
4.7µ
P33
33
16
P16
34
15
P15
2.2K
120p
2.2K
3.579545MHz
35
14
36
13
37
12
38
11
P11
39
10
P10
40
9
P14
2.2K
0.015µ
P37
8.2K
75
1µ
1µ
M61250BFP
41
1µ
1µ
75
A
47µ
+
0.01µ
+
47µ
A
+
0.01µ
P47
0.01µ
A
47µ
10K
8
SW7
6.8K
42
7
P7
43
6
P6
P5
0.01µ
20K
44
5
45
4
46
3
47
2
P2
48
1
P1
1µ
0.01µ
47µ
0.1µ
1µ
49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64
P49
SIF IN
P50
P51
P52
P53
P54
P55
P58
P59
P60
P61
P62
0.01µ
50
50
VR 20K
8
7
9
10
6
5
4
3
2
1
15
16
M74LS221P
11
12
13
14
4700p
Rev.1.0, Sep.23.2003, page 20 of 49
M61250BFP
Input Signals
1. 10.1 VIF/SIF Block
SG No.
Signal description (50 Ω termination)
SG1
SG2
SG3
SG4
fo = 45.75 MHz, 90 dBµ, fm = 20 kHz, AM 77.8%
fo = 58.75 MHz, 90 dBµ, fm = 20 kHz, AM 77.8%
fo = 45.75 MHz, 90 dBµ, CW
SG5
SG6
SG7
SG8
SG9
SG10
SG11
SG12
SG13
SG14
SG15
SG16
SG17
SG18
SG19
SG20
SG21
f1 = 45.75 MHz, 90 dBµ, CW
f2 = 45.75 ± 4.5MHz, 70 dBµ, CW
fo = 45.75 MHz, amplitude width variable, fm = 20 kHz, AM 77.8%
fo = 45.75 MHz, amplitude width variable, fm = 20 kHz, AM 16%
fo = 45.75 MHz, 80 dBµ, fm = 20 kHz, CW
fo = 45.75 MHz, 110 dBµ, fm = 20 kHz, CW
fo = 40.75 to 50.75 MHz (frequency variable), 90 dBµ, CW
fo = 45.75 MHz, 90 dBµ, CW
fo = 45.75 MHz, 90 dBµ, CW
fo = 53.75 to 63.75 MHz (frequency variable), 90 dBµ, CW
f1 = 45.75 MHz, 90 dBµ, RED raster signal, AM = 87.5% video modulation,
f2 = 4.5 ± 4.5MHz, CW, P/S = 20 dB
fo = 45.75 MHz, standard 10-step wave, sync rate: 28.6%, AM = 87.5% video modulation,
sync chip level: 90 dBµ
fo = 45.75 MHz, 93 dBµ, CW
fo = 45.75 MHz, 73 dBµ, CW
fo = 4.5 MHz, 100 dBµ, fm = 400 Hz, FM ±25 kHz dev.
fo = 4.5 MHz, 100 dBµ, fm = 400 kHz, AM 30%
fo = 4.5 MHz, 100 dBµ, CW
fo = 400 Hz, 500 mVrms, CW
fo = 0.5 to 8.5 MHz, 100 dBµ, fm = 400 kHz, FM ±25 kHz dev.
Rev.1.0, Sep.23.2003, page 21 of 49
M61250BFP
2. Video/Chroma/RGB/DEF Block
SG No.
Signal description (75Ω termination)
NTSC format APL 100% typical
video signal. Vertical signal is
interlaced at 60 Hz.
4.7µs
0.714V
1V p-p
SG. A
0.286V
1.5µs 5.8µs
SG. B
In the SG.A signal, the Lumi. signal
frequency and amplitude can be
changed. However, typical amplitude
is 0.714 Vp-p.
In the figure on the right, the Lumi.
signal is represented by f.
f
4.7µs
1.5µs 5.8µs
NTSC typical monochrome video
signal. Vertical signal is interlaced
at 60 Hz.
4.7µs
0.286V
SG. C
0.572V
0.286V
5.8µs
NTSC format video signal;
APL variable. Vertical signal is
interlaced at 60 Hz.
1.5µs
4.7µs
Vy
SG. D
0.286V
1.5µs 5.8µs
NTSC format monochrome video signal.
In the SG.C signal, the burst and chroma
part frequency and amplitude can be changed.
Vertical signal is interlaced at 60 Hz.
SG. E
Typical state:
Veb=0.286V,
Vec=0.572V
f eb=f ec=3.579545MHz
4.7µs
V eb
V ec
0.286V
feb
fec
5.8µs
1.5µs
Fast blanking signal; synchronized with
video input signal.
2.0V
0V
20µs
SG. F
24µs
Fast blanking signal;
synchronized with video input signal.
V osd
0V
20µs
Rev.1.0, Sep.23.2003, page 22 of 49
24µs
M61250BFP
2. Video/Chroma/RGB/DEF Block (cont)
SG No.
SG. G
Signal description (75Ω termination)
NTSC format rainbow color bar video signal.
Vertical signal is interlaced at 60 Hz.
Duty 90%, variable frequency, variable level. (Typical: 1 Vp-p)
SG. H
1V p-p
Duty variable (typical 95%), frequency variable, level variable
(Typical: 1 Vp-p)
SG. I
1V p-p
NTSC format typical color bar
video signal;
vertical signal is interlaced at 60 Hz.
4.7µs
0.714V
SG. J
0.286V
1.5µs 5.8µs
SG. K
NTSC format, typical 8-step wave signal;
vertical signal is interlaced at 60 Hz.
Rev.1.0, Sep.23.2003, page 23 of 49
M61250BFP
Setup instruction for evaluation PCB
1. Horizontal blanking pulse adjustment
The horizontal blanking pulse timing and pulse width are adjusted using the variable resistances of a one-shot
multivibrator, as shown below.
Pin 11 (H OUT)
8µs
Horizontal
blanking pulse
12µs
The timing is adjusted to 8 µs using the pin 15 variable resistance of the M74LS221P TTL IC. Also, the pulse width is
adjusted to 12 µs using the pin 7 variable resistance.
2. VIF VOC adjustment
Before carrying out the M61250BFP measurements, the VIF VCO should be adjusted using the following procedure.
(1) Input the I2C bus data for the VIF frequency (01H D6) based on the IF frequency. (45.75 MHz: 0, 58.75 MHz: 1)
(2) Input the I2C bus data for VIF Defeat ON (07H D7 = 1).
(3) Adjust the I2C bus data for the VCO control (01H D0 – D5) so that the voltage of Pin 2 (AFT OUT) is closest to
2.5 V.
(4) Input the I2C bus data for VIF Defeat OFF (07H D7 = 0).
Voltage
2.5V
45.75MHz
(or 58.75MHz)
Frequency
3. H VCO adjustment
Prior to measurement of the M61250BFP, the following method is used for H VCO adjustment.
(1) The H VCO control I2C bus data (1 CH D0-D3) is adjusted, and the pin 11 (H OUT) frequency is set to approx.
15.734 kHz.
Rev.1.0, Sep.23.2003, page 24 of 49
Max
mA
Unit
Notes
Rev.1.0, Sep.23.2003, page 25 of 49
8.7 VREG output voltage 2
5.7 VREG output voltage 1
V47L
V49
V32H1
-
-
-
ACK current
SCL/SDA VTH(L)
SCL/SDA VTH(H)
Clock frequency
I ACK
VIL
VIH
FSCL
-
-
-
-
-
IIC typical conditions
Maximum reset output
voltage
Minimum reset output
voltage
Reset threshold voltage
Reset typical conditions
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
IIC
TH32
V30L
V30H
Reset
V32H2
MCU 5.7 VREG
output voltage 1
MCU 5.7 VREG
output voltage 2
8.7 VREG output voltage 1
V47H
Vth28
ICC42
Power
Pin 12 current drawn
by the circuit
Pin 44 current drawn
by the circuit
Pin 42 current drawn
by the circuit
Power supply circuit
typical conditions
Power on control
threshold voltage
ICC44
ICC12
ICC8V
8V current drawn by the
circuit
Pins 3 and 4 current
drawn by the circuit
Pins 39 and 40 current
ICC3940
drawn by the circuit
ICC34
-
27
26,27
26,27
-
32
30
30
32
32
49
47
47
28
42
44
12
12,44
39,40
3,4
-
3.5
0.0
-
-
4
-
4.5
5.4
5.4
5.5
-
8.3
2.6
4
-
-
32
-
-
95
-
4.25
0.75
1
-
4.2
0
5
5.65
5.65
5.75
0
8.7
3
6
17
25
42
57
57
115
100
5.0
1.5
-
-
4.4
0.5
5.5
5.9
5.9
6.0
0.3
9.1
3.4
8
-
-
52
-
-
135
kHz
V
V
mA
-
V
V
V
V
V
V
V
V
V
mA
mA
mA
mA
mA
mA
Reference data
Pin 28=5V, pin 25=5V
Pin 28=0 V
Pin 28=5 V
Pin 28=5 V
Pin 28=0 V
Pin 28=5 V
Pin 28=5 V, pin 25=0 V, pin 24=0 V
8.7 VREG Vcc
Reference data
Deflection Vcc
Reference data
RGB Drive 8V Vcc
Deflection/RGB Drive 8V Vcc
Reference data
VIF/SIF/Vcc
Reference data
VIDEO/Chroma Vcc
VIF/SIF/VIDEO/Chroma Vcc
Typ.
Limits
Pin 28=5 V, pin 25=5 V, pin 24=0 V
3,4,39,4
0
Min.
5V current drawn by the
circuit (pins 3, 4, 39, 40)
SG
Test
point
Typical conditions
Pin
Input signal
ICC5V
Item
ICC
Symbol
Subaddress
20
02
40 adj 02
40 adj 02
40 adj 02
40
00
00
00
00
20
20
20
20
40
40
40
40
80
80
80
80
40
40
40
40
40
40
40
40
00
00
00
00
80
80
80
80
40
40
40
40
40
40
40
40
80
80
80
80
80
80
80
80
80
80
80
80
24
24
24
24
20
20
20
20
00
00
00
00
10
10
10
10
00
00
00
00
00
00
00
00
88
88
88
88
40
40
40
40
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0AH 0BH 0CH 0DH 0EH 0FH 10H 11H 12H 13H 14H 15H 16H 17H 18H 19H 1AH 1BH 1CH
M61250BFP
Electrical Characteristics
(Ta = 25°C)
58
Rev.1.0, Sep.23.2003, page 26 of 49
-
AFT minimum voltage
AFT DETEAT function
V60H
V60L
V60D
IM
VCT58
VCL58
VCU58
VCT45
VCL45
VCU45
AFT maximum voltage
µAFT
Inter modulation
Capture range
(45.75MHz upper)
Capture range
(45.75MHz lower)
Capture range
(45.75MHz total)
Capture range
(58.75MHz upper)
Capture range
(58.75MHz lower)
Capture range
(58.75MHz total)
63,64
AFT-detection-waveform
sensitivity
SG9
SG1
SG8
SG7
-
-
SG6
SG5
SG4
SG3
SG2
SG1
-
63,64 SG13
58
58
58
63,64 SG12
58
58
58
2
58
-
SG9
SG9
-
2
2
2
58
62
62
62
-
58
58
58
58
58
58
63,64 SG12
-
63,64
63,64
-
63,64 SG11
63,64 SG10
63,64
63,64
IF AGC minimum voltage
VIF DETEAT function
63,64
Vdefeat
IF AGC voltage (80 dBµ)
V63T
V63L
IF AGC maximum voltage
V63H
63,64
Vin max Maximum allowable input
-
63,64
Input sensitivity
Vin min
AG control range
63,64
Video frequency
characteristics
GR
63,64
Video S/N
Vf
Video-detection-waveform
63,64
output (45.75 MHz)
Video-detection-waveform
63,64
output (48.75 MHz)
P/N
Vo5875
Vo4575
-
2.6
-
1.5
2.6
-
1.5
2.0
-
4.2
7
0
1.3
2.3
3.8
50
100
-
4
43
0.8
0.8
2.2
42
4.0
-1.8
2.2
4.0
-1.8
2.2
2.5
0.3
4.7
10
0.1
1.8
2.8
4.3
-
108
45
5.4
50
1.2
1.2
2.7
-
-
-1.1
-
-
-1.1
-
3.0
0.8
-
13
0.2
2.3
3.3
4.8
-
-
50
-
-
1.5
1.5
3.2
Max.
V
Unit
Notes
Vo max - Vo min
dB
Reference data
MHz VCU58-VCL58
MHz Center frequency=58.75MHz
MHz Center frequency=58.75MHz
MHz VCU45-VCL45
MHz Center frequency=45.75MHz
MHz Center frequency=45.75MHz
V
V
V
mV/kHz
Vpp
V
V
V
dB
dBµ
dBµ
MHz
dB
Vpp
Vpp
Pin 62=0 V
-
Typ.
Limits
Pin 28=5 V, pin 25=5 V, pin 24=0 V
-
Min.
IF typical conditions
SG
Test
point
Video-detection-waveform
output direct current voltage
Pin
Input signal
Vdc
Item
VIF
Symbol
Subaddress
+40
+40
+40
40 adj 02
00
20
40
80
80
80
40
40
00
80
40
40
80
80
80
24
20
00
10
00
00
88
40
00
00
00
00
00
00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0AH 0BH 0CH 0DH 0EH 0FH 10H 11H 12H 13H 14H 15H 16H 17H 18H 19H 1AH 1BH 1CH
M61250BFP
RF AG minimum voltage
V62L
AF direct output DC voltage
AF direct output voltage
VAF
VoAF
Rev.1.0, Sep.23.2003, page 27 of 49
EXT Audio gain
GEAu
SCFU
SIF capture range
(upper)
SIF capture range
SCFL
(lower)
VOLAudio output maximum
max
amplitude
Audio output maximum
VOL-min
attenuation
AMR
AF S/N
AFSN
-
SG21
SG21
SG17
SG17
48
48
48
SG20
SG19
SG18
SG17
SG17
SG17
48
53
48
48
Input limit sensitivity
LIM
AMR
48
48
THD AF AF distortion rate output
48
SIF typical conditions
-
SG5
SG5
63,64 SG14
Sync rate
SIF
-
63,64
63,64
63,64 SG16
63,64 SG15
63,64 SG14
63,64 SG14
Pin
SG
Input signal
SPN
DLP
DLPL
DLPH
RF AG maximum voltage
V62H
RF AG delay maximum
point
RF AG delay minimum
point
RF AG delay point
adjustment range
DG
DP
DP
Item
DG
Symbol
51
51
54
54
51
51
54
54
54
54
54
58
-
59
59
59
59
58
58
Test
point
-
280
-
5.5
-4.1
49
48
-
-
280
2.2
25
33
-
95
-
4.3
-
-
Min.
-80
400
3
7.5
-2.1
55
54
46
0.5
400
3.0
28
43
58
108
0.2
4.8
3
3
Typ.
Limits
-69
550
4.0
-
-0.1
-
-
58
3
520
3.8
33
-
71
-
0.7
-
-
-
Max.
Reference data
Reference data
Pin 28=5 V, pin 25=5 V, pin 24=0 V
Notes
dB
mVrms
MHz Variable input frequency
MHz Variable input frequency
dB
dB
dB
dBµ
%
mVrms
V
%
dBµ DLPH-DLPL
dBµ
dBµ
V
V
deg
%
Unit
Subaddress
40
40 adj 02
007F
7F
00
7F
7F
7F
80
00
20
40
80
40
40
00
80
40
40
80
80
80
24
20
00
10
00
00
88
40
00
00
00
00
00
00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0AH 0BH 0CH 0DH 0EH 0FH 10H 11H 12H 13H 14H 15H 16H 17H 18H 19H 1AH 1BH 1CH
M61250BFP
Rev.1.0, Sep.23.2003, page 28 of 49
38
Chroma trap maximum
attenuation
YDL time 1
YDL time 2
YDL time 3
CRF1
TRF
YDL1
YDL2
YDL3
VMF
BLS
GT5M
GT2M
GTmin
GTmax
GTnor
Video mute function
Video tone control
characteristic 1
Video tone control
characteristic 2
Video tone control
characteristic 3
Video tone control
characteristic 4
Video tone control
characteristic 5
Black expansion
characteristic
YDL time 4
38
Chroma trap attenuation 1
FBY
YDL4
38
Video frequency
characteristic
38
SG.A
SG.K
SG. B
38
38
SG. B
38
SG. B
SG. B
38
38
SG. B
SG. A
38
38
SG. A
SG. A
SG. A
SG.C
SG.C
SG.B
SG.A
SG.A
SG.A
SG.A
-
SG
38
38
38
38
Video gain
GY
38
38
41
-
Pin
Input signal
Maximum video output
Video SW output level
(TV input)
Video SW output level
(External input)
Video typical conditions
Item
Ymax
2AGEV
2AGTV
VIDEO
Symbol
14,15,
16
14,15,
16
14,15,
16
14,15,
16
14,15,
16
14,15,
16
14,15,
16
14,15,
16
14,15,
16
14,15,
16
14,15,
16
14,15,
16
14,15,
16
14,15,
16
14,15,
16
14,15,
16
31
31
-
Test
point
0.03
-45
-
-5
2
0.01
-9
-1
-2
10
7
-6
1.4
200
200
200
260
-
-
-1
15
4.2
2.0
2.0
-
Typ.
Limits
1.0
120
120
120
190
-
-
-4
12
2.9
1.6
1.6
-
Min.
-35
0.05
-1
5
2
14
1.8
280
280
280
330
-20
-18
-
18
5.6
2.6
2.6
-
Max.
dB
V
dB
dB
dB
dB
V
nS
nS
nS
nS
dB
dB
dB
dB
V
Vpp
Vpp
-
Unit
f=5MHz
f=2MHz
f=2.5MHz
f=2.5MHz
f=2.5MHz
YDL4=measured value -YDL3 measured value
YDL3=measured value -YDL2 measured value
YDL2=measured value -YDL1 measured value
At Trap fine adj. adjustment
f=5MHz, C-trap : OFF
Pin 28=5 V, pin 25=5 V, pin 24=0 V
Notes
Subaddress
80
10
40 adj 02
00
00
3F
20
8C
80
7F 8C
adj 8C
8C
8C
8C
8C
8C
8F
8E
8D
8C
8C
8C
7F 8C
7F 8C
7F 8C
40
40
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
40
00
adj
80
40
40
80
80
80
24
20
0003
02
00
10
80
00
00
88
40
00
00
00
00
00
00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0AH 0BH 0CH 0DH 0EH 0FH 10H 11H 12H 13H 14H 15H 16H 17H 18H 19H 1AH 1BH 1CH
M61250BFP
Item
Rev.1.0, Sep.23.2003, page 29 of 49
APC pull-in range (lower)
Demodulation ratio
APCL
R/BN
38
SG.E
fsc output amplitude 1
Vfsc
fsc output frequency
Ffscfree
in fsc free mode
fsc output amplitude 1
Vfsc
in fsc free mode
fsc output frequency
Ffsc
TC2
TC1
SG.C
SG.C
38
SG. C
38
38
SG.C
SG. E
29
29
1.4
3.5790
1.4
3.5793
29
29
30
30
73
59
59
59
SG. E
SG. E
59
SG. E
86
-
38
38
38
38
Demodulation angle 2
R-YN2
TINT control
characteristic 1
TINT control
characteristic 2
38
Demodulation angle 1
-
-
15,16
15,16
-
0.40
300
-
-
-
14,15
59
59
59
59
59
-3
-4.5
14,15
SG.J
38
59
59
-3
640
390
-
Min.
SG.J
SG.J
38
38
SG.J
SG.E
SG.E
38
38
38
SG.E
38
38
SG.E
SG.E
38
38
SG.E
59
59
SG.C
SG. E
38
38
59
SG.C
-
SG
Test
point
38
Pin
Input signal
R-YN1
G/BJ
R/BJ
G/BU
R/BU
KillP
Demodulation ratio
(US mode)
Demodulation ratio
(US mode)
Demodulation ratio
(JPN mode)
Demodulation ratio
(JPN mode)
APC pull-in range (upper)
APCU
OV
VikN
ACC characteristic 2
ACC2
Chroma overload
characteristic
Killer operation input
level
Color remaining on
colorkilling
ACC characteristic 1
ACC1
CHROM Chroma typical c
A
onditions
Chroma typical output
CnorR
(R-Y)
Chroma typical output
CnorB
(B-Y)
Symbol
2
3.5795
2
3.5796
45
45
90
103
0.47
1.31
0.43
1.33
0.57
600
-600
-45
-43
2
0
0
920
560
-
Typ.
Limits
2.6
3.5810
2.6
3.5799
60
60
107
120
-
-
-
-
0.80
-
-300
-30
-35
5
1.5
3
1290
790
-
Max.
Vpp
MHz
Vpp
MHz
deg
deg
deg
deg
-
-
-
-
-
Hz
Hz
dB
dB
dB
dB
dB
mV
mV
-
Unit
20
20
40
88
88
88
88
88
80
88 00
88
88
88
88
88 F7
88
88
88
88
88
feb=fec+50kHz
20
20
20
40
feb=fec+50kHz
fec=feb+50kHz
fec=feb+50kHz
Reference data
Reference data
Reference data
88
fec=feb+50kHz
Reference data
88
88
feb=fec: variable
88
88
00
Veb = 0mV
40 adj 02
88
feb=fec: variable
Subaddress
40
20
20
00
FF
FF
FF
FF
80
40
40
80
80
80
24
20
00
10
00
02
06
06
08
08
00
88
40
00
80
80
C0/
80
C0/
80
C0/
80
C0/
80
C0/
80
C0/
80
C0/
80
80
80
80
80
80
80
80
80
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
C0 40
00
00
00
00
00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0AH 0BH 0CH 0DH 0EH 0FH 10H 11H 12H 13H 14H 15H 16H 17H 18H 19H 1AH 1BH 1CH
Veb, Vec: variable
V = 800 mV
Veb, Vec: typical input level -20 dB
Veb, Vec: typical input level +6 dB
Pin 28=5 V, pin 25=5 V, pin 24=0 V
Notes
M61250BFP
Rev.1.0, Sep.23.2003, page 30 of 49
EXA(B)
EXA(G)
EXA(R)
EXD1(BR)
EXD1(GB)
EXD1(RG)
EXD2(B)
EXD2(G)
EXD2(R)
EXD1(B)
EXD1(G)
EXD1(R)
D(B)2
D(R)2
D(B)1
D(R)1
Lum min
Lum max
Lum nor
GYEclip
GYEmin
GYEnor
GYmin
GYtyp
Contrast control
characteristic 1
Contrast control
characteristic 2
Contrast control
characteristic 3
Contrast control
characteristic 4
Contrast control
characteristic 5
Brightness control
characteristic 1
Brightness control
characteristic 2
Brightness control
characteristic 3
R driving control
characteristic 1
B driving control
characteristic 1
R driving control
characteristic 2
B driving control
characteristic 3
Digital OSD (R)
I/O characteristic 1
Digital OSD (G)
I/O characteristic 1
Digital OSD (B)
I/O characteristic 1
Digital OSD (R)
I/O characteristic 2
Digital OSD (G)
I/O characteristic 2
Digital OSD (B)
I/O characteristic 2
Digital OSD (R-G)
amplitude difference
Digital OSD (G-B)
amplitude difference
Digital OSD (B-R)
amplitude difference
Analog OSD (R)
I/O characteristic
Analog OSD (G)
I/O characteristic
Analog OSD (B)
I/O characteristic
RGB typical conditions
Output blanking voltage
RGB
Item
VBLK
Symbol
SG.A
SG.F,
SG.A
SG.F,
SG.A
SG.F,
SG.A
23,24,
38
22,24,
38
21,24,
38
-
-
-
-
-
200
200
200
14
15
16
16
15
14
-
-
1.2
1.2
1.2
-350
-350
-350
1.0
16
-
1.0
15
SG.F,
SG.A
SG.F,
SG.A
SG.F,
SG.A
SG.F,
SG.A
SG.F,
SG.A
SG.F,
SG.A
23,24,
38
22,24,
38
21,24,
38
23,24,
38
22,24,
38
21,24,
38
-5.0
-5.0
1.0
16
2.0
2.0
-
2.3
1.7
0.50
-
2.2
-
2.2
0
-
Min.
14
14
SG.A
16
14
SG.A
SG.A
SG.A
SG.D
SG.D
SG.D
14,15,
16
14,15,
16
14,15,
16
14,15,
16
14,15,
16
14,15,
16
14,15,
16
14,15,
16
14,15,
16
-
Test
point
38
38
38
38
38
38
38
21,22,
SG.F
23
SG.A
38
38
SG.B
SG.B
SG.A
-
SG
38
38
38
-
Pin
Input signal
2.1
2.1
2.1
0
0
0
300
300
300
1.5
1.5
1.5
-3.0
-3.0
4.0
4.0
1.3
3
2.1
0.65
100
2.8
200
2.8
0.1
-
Typ.
Limits
3.0
3.0
3.0
350
350
350
400
400
400
2.0
2.0
2.0
-1.0
-1.0
6.0
6.0
2
-
2.5
0.80
200
3.3
300
3.3
0.3
-
Max.
Vpp
Vpp
Vpp
mV
mV
mV
mV
mV
mV
Vpp
Vpp
Vpp
dB
dB
dB
dB
V
V
V
V
mV
V
mV
Vpp
V
-
Unit
20
00
00
40
88
88
88
88
88
Vosd = 1.0V, SW22=ON
Vosd = 1.0V, SW21=ON
40
40
Vosd = 0.7V
Vosd = 0.7V
40
Vosd = 0.7V
88
88
88
88
88
88
88
88
88
88
Vosd = 1.0V, SW23=ON
88
88
88
88
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
88
00
00
40
88
40
88
88
80
88
00
88
40 adj 02
Vy = 0.0V
Vosd = 1.0V, SW23=ON
EXD2(R)=Measured value- EXD1(R)
Vosd = 1.0V, SW22=ON
EXD2(G)=Measured value- EXD1(G)
Vosd = 1.0V, SW21=ON
EXD2(B)=Measured value - EXD1(B)
Subaddress
00
00
00
00
00
00
FF
80
00
7F
40
00
7F
40
80
80
80
24
20
00
10
00
10
10
10
20
20
20
00
88
40
00
00
00
00
00
00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0AH 0BH 0CH 0DH 0EH 0FH 10H 11H 12H 13H 14H 15H 16H 17H 18H 19H 1AH 1BH 1CH
Vy = 0.0V
Vy = 0.0V
Pin 24 =2.5 V
Pin 33 =0.0 V
Pin 33 =2.9 V
f=100kHz
f=100kHz
Pin 28=5 V, pin 25=5 V, pin 24=0 V
Notes
M61250BFP
Item
Rev.1.0, Sep.23.2003, page 31 of 49
WB
BB(B)
BB(G)
BB(R)
AOSD2
AOSD1
DOSD2
White raster function
SG.A
38
38
SG.A
SG.A
SG.A
38
38
SG.F,
SG.A
SG.F,
SG.A
SG.F,
SG.A
SG.F,
SG.A
23,24,
38
23,24,
38
23,24,
38
23,24,
38
2.7
2.7
16
1.7
1.7
-
-
-
-
0.29
0.81
-
-
2
1.1
1.1
1.1
2.6
2.6
2.6
-100
-100
-350
-350
-350
Min.
14,15,
16
15
14
14
14
14
14
SG.G 15,16
Digital OSD switching
characteristic 1
Digital OSD switching
characteristic 2
Analog OSD switching
characteristic 1
Analog OSD switching
characteristic 2
Blue background
function (R)
Blue background
function (G)
Blue background
function (B)
38
DOSD1
MTXGB Matrix ratio G/B
SG. C
SG.G 14,16
38
38
16
15
14,15,
16
14,15,
SG. C
16
14,15,
SG. C
16
SG. D
38
38
SG. D
38
14
16
SG. D
SG. D
15
14
15,16
SG. D
SG. D
SG.D
38
38
38
38
38
14,15
_
_
_
Test
point
38
R cutoff control
characteristic 2
G cutoff control
characteristic 2
B cutoff control
characteristic 2
Color control
characteristic 1
Color control
characteristic 2
Color control
characteristic 3
_
_
SG.D
_
38
_
_
SG
_
Pin
Input signal
MTXRB Matrix ratio R/B
Ccon 3
Ccon 2
Ccon 1
C(B)2
C(G)1
C(R)1
C(B)1
C(G)1
C(R)1
Offset voltage (B-G)
OFBG
R cutoff control
characteristic 1
G cutoff control
characteristic 1
B cutoff control
characteristic 1
Offset voltage (R-G)
OFRG
EXA(R-G)
Analog OSD (R-G)
amplitude difference
Analog OSD (G-B)
EXA(G-B)
amplitude difference
Analog OSD (B-R)
EXA(B-R)
amplitude difference
Symbol
3.7
3.7
2.1
2.1
0.05
0.05
0.05
0.05
0.37
0.98
-40
-15
5
1.4
1.4
1.4
2.9
2.9
2.9
0
0
0
0
0
Typ.
Limits
4.7
4.7
2.5
2.5
0.13
0.13
0.13
0.13
0.45
1.08
-35
-10
8
1.7
1.7
1.7
3.2
3.2
3.2
100
100
350
350
350
Max.
V
V
V
V
us
us
us
us
-
-
dB
dB
dB
V
V
V
V
V
V
mV
mV
mV
mV
mV
Unit
Vy = 0.0V
80
7F
7F
7F
Vosd = 1.0V
7F
Vosd = 1.0V
80
80
Vosd = 1.0V, SW23=ON
Vosd = 1.0V, SW23=ON
Vy = 0.0V
88
88
88
88
88
88
88
88
88
88
88
88
88
88
88
88
88
Vy = 0.0V
Vy = 0.0V
88
Vy = 0.0V
88
88
Vy = 0.0V
88
88
88
88
Vy = 0.0V
Subaddress
80
80
80
00
01
7F
00
00
00
00
00
00
00
00
00
FF
00
FF
00
FF
A0
10
10
10
10
10
00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0AH 0BH 0CH 0DH 0EH 0FH 10H 11H 12H 13H 14H 15H 16H 17H 18H 19H 1AH 1BH 1CH
Vy = 0.0V
Notes
M61250BFP
Rev.1.0, Sep.23.2003, page 32 of 49
Horizontal pulse width
HPTW
VRpo 2
VRpo 1
VRsc 2
VRsc 1
VRsi 1
FPVL
FPVU
SVC
Vfree
fV
AFCG
HSTA
Vertical ramp size
control range 1
Vertical ramp size
control range 2
Vertical ramp position
control range 1
Vertical ramp position
control range 2
Vertical ramp size
Vertical pull-in frequency
(upper)
Vertical pull-in frequency
(lower)
Service mode operation
Vertical free-running
frequency
Forced vertical
free-running operation
AFC gain operation
Horizontal pulse
amplitude
Horizontal pulse start
operation
Horizontal pulse timing 2
HPT2
VH
Horizontal pulse timing 1
Deflection system
typical conditions
Horizontal free-running
frequency 1
Horizontal free-running
frequency 2
Horizontal free-running
frequency 3
Forced horizontal
free-running operation
Horizontal pull-in range
(upper)
Horizontal pull-in range
(lower)
Item
HPT1
FPHL
FPHU
Hfree
fH3
fH2
fH1
DEF
Symbol
38
38
38
38
38
38
38
-
38
-
38
-
-
-
38
38
38
38
38
-
-
-
-
Pin
5
5
5
SG.A
SG.A
5
5
5
5
5
5
5
7
11
11
11
11
11
11
11
11
11
11
11
-
Test
point
SG.A
SG.A
SG.A
SG.H
SG.H
-
SG.A
-
SG.A
-
-
-
SG. A
SG. A
SG.H
SG.H
SG.A
-
-
-
-
SG
Input signal
840
18
0.8
2.0
1.6
-
63
1.0
55
55
2.0
-
4.7
21
2.5
12.0
-
250
15.3
15.8
14.7
15.3
-
Min.
860
38
1.2
2.4
2.0
55
67
1.5
60
60
3.0
0.0
5.4
25
4.0
13.5
-500
500
15.7
16.2
15.1
15.7
-
Typ.
Limits
880
58
1.6
2.8
2.4
57
-
2
65
65
10.0
0.5
-
29
5.5
15.0
-250
-
16.1
16.6
15.5
16.1
-
Max.
20
40
88
88
88
80
88
88
µs
µs
88
88
88
88
Measured value - VRpo 1
Variable input frequency
88
88
88
Vpp
Vpp
Vpp
Hz
Hz
V
Hz
Hz
dB
V
V
Variable input frequency
00
88
40 adj 02
88
µs
Subaddress
40
40
00
80
40
40
80
80
80
64
26
20
24
00
30
20
00
17
18
00
90
10
00
80
80
80
00
9F
80
88
40
00
00
00
00
00
00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0AH 0BH 0CH 0DH 0EH 0FH 10H 11H 12H 13H 14H 15H 16H 17H 18H 19H 1AH 1BH 1CH
µs
Variable input frequency
Variable input frequency
Pin 28=5 V, pin 25=5 V, pin 24=0 V
Notes
µs
Hz
Hz
kHz
kHz
kHz
kHz
-
Unit
M61250BFP
Vertical pulse width
Item
Vertical blanking width
WVSS
Rev.1.0, Sep.23.2003, page 33 of 49
MONI1-C
MONI16
MONI15
MONI14
MONI13
MONI12
MONI11
MONI10
MONI9
MONI8
MONI7
MONI6
MONI3-2
MONI3-1
MONI2
MONI1
Intelligent monitor I-C
(Sync ratio at H free mode)
Intelligent monitor 1
(composite sync)
Intelligent monitor 2
(AFT)
Intelligent monitor 3-1
(RF AGC1)
Intelligent monitor 3-2
(RF AGC2)
Intelligent monitor 6
(video SW output)
Intelligent monitor 7
(G out)
Intelligent monitor 8
(R out)
Intelligent monitor 9
(B out)
Intelligent monitor 10
(ACL)
Intelligent monitor 11
(V sync)
Intelligent monitor 12
(H out)
Intelligent monitor 13
(VIF Vcc)
Intelligent monitor 14
(Start-up Vcc)
Intelligent monitor 15
(video/chroma Vcc)
Intelligent monitor 16
(Hi Vcc)
MONIT Intelligent monitor
ORING system typical conditions
Vertical blanking width
VSHIFT1
Vertical blanking width
VSHIFT2
Vertical blanking width
VSHIFT3
VBLKW
VS1
VBLKW
VS2
VBLKW
VS3
VBLKW Vertical blanking width
VW
Symbol
SG.A
-
SG.I
SG.A
-
41
-
-
-
-
41
41
-
41
41
41
41
SG.A
-
-
-
-
SG.A
SG.A
-
SG.A
SG.A
SG.A
SG.A
63,64 SG.7
-
20
Test
point
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
-
5
14,15,
16
14,15,
SG.A
16
14,15,
SG.A
16
14,15,
SG.A
16
SG.A
SG
63,64 SG.7
41
-
38
38
38
38
38
38
Pin
Input signal
50
2.55
2.30
2.55
2.30
3.6
3.5
3.5
1.5
1.5
1.5
0.76
0.88
4.0
2.0
4.0
-
14
2.11
1.73
1.35
1.32
0.35
Min.
100
2.70
2.50
2.70
2.50
4.0
4.0
4.0
2.0
2.0
2.0
0.95
0.93
4.3
2.5
4.9
-
-
2.26
1.88
1.50
1.47
0.53
Typ.
Limits
-
2.85
2.70
2.85
2.70
4.4
4.5
4.5
2.5
2.5
2.5
1.24
0.98
4.6
3.0
5.0
-
-
2.41
2.03
1.65
1.62
0.65
Max.
Pin 18 voltage/pin 59 voltage
At RF AGC voltage high
Note: This LSI cannot operate correctly
if MONI1 is used while the H-free bus bit (13H-D7) is set to 1.
Pin 28=5 V, pin 25=5 V, pin 24=0 V
Variable input signal duty
Notes
%
V
V
V
V
Vpp
Vpp
V
Input SYNC ratio measured at H free mode
Vpp Amplitude measured from blanking level
Vpp Amplitude measured from blanking level
Vpp Amplitude measured from blanking level
Vpp
-
V
V
Vpp
-
us
ms
ms
ms
ms
ms
Unit
Subaddress
40 adj 02
00
20
40
80
88
88
88
88
88
88
40
00
00
00
40
00
00
00
00
00
80
40
40
80
80
80
24
20
00
F0
E0
D0
C0
B0
A0
90
80
70
60
50
20
20
10
00
00
90
10
00
00
88
40
00
00
00
00
00
0F
0C
08
00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0AH 0BH 0CH 0DH 0EH 0FH 10H 11H 12H 13H 14H 15H 16H 17H 18H 19H 1AH 1BH 1CH
M61250BFP
M61250BFP
Method of Measurement of Electrical Characteristics
VIF block
• P/N: Video S/N
1. Input SG3, and measure the rms value (noise value) for the signal output from pin 58.
2. The P/N is defined as follows.
3
P/N = 20 log V0 measured value (Vp-p) x 10 x 0.7
Noise measured value (mVrms)
•
1.
2.
3.
(dB)
Vf: Video frequency characteristic
Input SG4, and adjust the f2 frequency so that the 1 MHz beat component is output to pin 58.
Adjust the voltage applied to pin 62 so that the 1 MHz beat component at pin 62 is 100 dBµ.
Gradually reduce the f2 frequency, and measure the frequency at which the beat component is 3 dB lower than the
level at 1 MHz.
• Vin min: Input sensitivity
1. Lower the level of SG5 so that the input level is 3 dB lower than the value measured under video-detection-wave
output” for the V0 item.
• Vin max: Maximum allowable input
1. Input SG6 at 90 dBµ.
2. The output level of Pin 58 at this point should be VA. Increase the amplitude of SG6 so that the input level indicates
an output level for Pin 58 that is 3 dB lower than VA.
• µAFT: AFT detection sensitivity
V2H: AFT maximum voltage
V2L: AFT minimum voltage
µAFT is defined as follows.
µAFT =
(3.0 - 10.) x 103 mV
df KHz
Rev.1.0, Sep.23.2003, page 34 of 49
(mV/KHz)
M61250BFP
•
1.
2.
3.
IM: Inter-modulation
Input SG13 to Pins 63 and 64.
Measure the 0.92 MHz component and 3.58 MHz component of the pin 58 output.
IM is defined as follows.
IM = 20 log 0.92 MHz component
3.58 MHz component
•
•
1.
2.
(dB)
DLPH: RF AGC delay maximum point
DLPL: RF AGC delay minimum point
Input SG5 to pins 63 and 64.
Change the amplitude of SG5 and measure the level at which the voltage of pin 59 is 2.5 V.
SIF block
• LIM: Input limiting sensitivity
Gradually decrease the input level of SG17, and measure the input level at the point when the 400 Hz component of
Pin 58 is 3 dB lower than VoAF.
• AMR: AMR
1. Measure the 400 Hz component for Pin 54 and set it as Vam.
2. AMR is defined as follows.
AMR = 20 log
VoAF (mVrms)
Vam (mVrms)
(dB)
• AFSN: AF S/N
1. Measure the noise (20 Hz to 100 kHz) of the Pin 51 output.
2. AF S/N is defined as follows.
AF S/N = 20 log
VoAF max
Measured value (dB)
Video clock
• 2AGTV: Video SW output level (TV input)
• 2AGEV: Video SW output level (External input)
1. Input SG.A to pin 41 (2AGTV) or pin 38 (2AGEV).
2. The amplitude (p-p) at pin 31 is measured.
*In order to select TV or external input, use the subaddress 06H.
• Ymax: Maximum video output
1. Input SG.A to pin 38.
2. Measure the amplitude (p-p) other than the blanking part of the output of pins 14, 15, 16.
Rev.1.0, Sep.23.2003, page 35 of 49
M61250BFP
• FBY: Video frequency characteristic
1. Input SG.B (5 MHz, 0.4 Vp-p) to pin 38.
2. Measure the amplitude (p-p) other than the blanking part of the output of pins 14, 15, 16, take the result to
be YB.
3. FYB is defined as follows.
FYB = 20 log
YB (Vp-p)
GY (Vp-p)
(dB)
• CRF1: Chroma trap attenuation 1 (normal R/G/B output)
TRF maximum chroma trap attenuation
1. Input SG.C to pin 38, measure the 3.58 MHz frequency level with TRAP ON/OFF (02H D4) DATA 1, take this to
be N0.
2. Also measure the level with TRAP ON/OFF (02H D4) DATA 0.
3. CRF1 is defined as follows.
CRF1 = 20 log Measured value (mVp-p)
N0 (mVp-p)
(dB)
4. Take the minimum value of CRF1 when the I2C BUS data of the TRAP fine ADJ (12H D0/D1) is adjusted to be
TRF.
• YDL1: YDL time 1
1. Input SG.A to pin 38.
2. Measure the delay time relative to the input signal of pins 14, 15, 16.
The delay time at 50% rise level is measured.
•
1.
2.
3.
YDL2, 3, 4: YDL time 2, 3, 4
Input SG.A to pin 38.
Measure the delay time of the input signal and the pin 14, 15, 16 output signals.
YDL2, YDL3, YDL4 are defined as follows.
YDL2 = measured value (ns) - YDL1 (measured value)
YDL3 = measured value (ns) - YDL2 (measured value)
YDL4 = measured value (ns) - YDL3 (measured value)
•
1.
2.
3.
4.
GTmax: Video tone control characteristic 2
Input SG.B (f = 2.5 MHz) to pin 38.
The output amplitude of pins 14, 15, 16 when the video tone data is at the center (20 H) is taken to be GTnor.
The output amplitude of pins 14, 15, 16 when the video tone data is maximum is measured.
GTmax is defined as follows.
GTmax = 20 log Measured value (Vp-p)
GTnor (mVp-p)
Rev.1.0, Sep.23.2003, page 36 of 49
(dB)
M61250BFP
•
1.
2.
3.
4.
GTmin: video tone control characteristic 3
Input SG.B (f=2.5 MHz) to pin 38.
The output amplitude of pins 14, 15, 16 when the video tone data is at the center (20 H) is taken to be GTnor.
The output amplitude of pins 14, 15, 16 when the video tone data is minimum is measured.
GTmin is defined as follows.
GTmin = 20 log Measured value (Vp-p)
GTnor (mVp-p)
•
1.
2.
3.
4.
GT2M: Video tone control characteristic 4
Take pin 14, 15, 16 output amplitude when input signal frequency is 2.5 MHz to be GTnor.
Input SG.B (f = 2 MHz) to pin 38.
Measure pin 14, 15, 16 output amplitude.
GT2M is defined as follows.
GT2M = 20 log Measured value (Vp-p)
GTnor (mVp-p)
•
1.
2.
3.
4.
(dB)
(dB)
GT5M: Video tone control characteristic 5
Take pin 14, 15, 16 output amplitude when input signal frequency is 2.5 MHz to be GTnor.
Input SG.B (f = 2 MHz) to pin 38.
Measure pin 14, 15, 16 output amplitude.
GT5M is defined as follows.
GT5M = 20 log Measured value (Vp-p)
GTnor (mVp-p)
(dB)
• BLS: black stretch characteristic
1. Input SG.K to pin 38.
2. With black stretch off (02H D1 = 1), adjust the contrast (05H) and brightness (0AH), and set the pin 14, 15, 16
output level of the first stage (lowest stage) to 2.0 V, and the output level of the eighth stage (highest stage) to 4.6
V.
3. Change black stretch to on (02H D1 = 0), and measure the pin 14, 15, 16 first stage output level.
4. BLS is defined as follows.
BLS = 2.0 - measured value (V)
•
1.
2.
3.
VMF: Video mute function
Input SG.A to pin 38.
With the mute switch (02H D7) on "VMFon", off "VMFoff", measure the output amplitude.
VMF is defined as follows.
VMF = 20 log
VMFon (Vp-p)
VMFoff (Vp-p)
Rev.1.0, Sep.23.2003, page 37 of 49
(dB)
M61250BFP
Chroma block
• CnorR: Chroma typical output (R-Y)
• CnorB: Chroma typical output (B-Y)
1. Input SG.C to pin 38.
2. When "test mode" I2C data is 18H D6=1, 18H D7=1 and 19H D6=1 and when "test mode" I2C data is 18H
D6=0, 18H D7=1 and 19H D6=1, take the pin 59 output amplitude to be the chroma typical output (R-Y)
and chroma typical output (B-Y), respectively.
•
1.
2.
3.
ACC1: ACC characteristic 1
Input SG.E (eb=570 mV: level + 6 dB) to pin 38.
Measure the pin 59 output amplitude.
ACC1 is defined as follows.
ACC1 = 20 log
measured value
(mVp-p)
chroma typical output 1 (mVp-p)
(dB)
• ACC2: ACC characteristic 2
1. Input SG.E (input level: -18 dB) to pin 38.
2. Measure the pin 59 output amplitude.
3. ACC2 is defined as follows.
ACC2 = 20 log
•
1.
2.
3.
measured value
(mVp-p)
chroma typical output 1 (mVp-p)
(dB)
OV: Chroma overload characteristic
Input SG.E (eb=800 mVp-p) to pin 38.
Measure the pin 59 output amplitude.
OV is defined as follows.
OV = 20 log
measured value
(mVp-p)
chroma typical output 1 (mVp-p)
(dB)
• VikN: Killer operation input level
1. Input SG.E (variable level) at input level 0 dB to pin 38.
2. While monitoring the pin 59 output amplitude, lower the input level, and measure the input level when the output
amplitude vanishes.
• KillP: Hue remaining with killer
1. Input SG.E (level: -40 dB) to pin 38.
2. Measure the pin 59 output amplitude.
•
•
1.
2.
APCU: APC pull-in range (upper)
APCL: APC pull-in range (lower)
Input SG.E (feb-fec-3.579545 MHz) to pin 38.
After raising the frequency until the output from pin 59 vanishes, lower the frequency, and take the point at which
an output appears to be fu.
3. After lowering the frequency until the output from pin 59 vanishes, raise the frequency, and take the
point at which an output appears to be fl.
4. APCU and APCL are defined as follows.
APCU = fu – 3579545 Hz
APCL = fl – 3579545 Hz
Rev.1.0, Sep.23.2003, page 38 of 49
M61250BFP
•
1.
2.
3.
4.
R/BN: Demodulation ratio R-Y/B-Y
Input SG.E (eb = single chroma = ec + 50 kHz) to pin 38.
Take the pin 59 output amplitude when "test mode" I2C data is 18H D6=1, D7=1 to be VRY.
Take the pin 59 output amplitude when "test mode" I2C data is 18H D6=0, D7=1 to be VBY.
R/BN is defined as follows.
R/BN =
VRY (mVp-p)
VBY (Vp-p)
(dB)
•
•
1.
2.
R/BU, G/BU: Demodulation ratio
R/BJ, G/BJ: Demodulation ratio
Input SG.J to pin 38.
Take the pins 14, 15, 16 output amplitude when video mute on ( 02H D7 = 1, D7 = 1) and US mode (15H D3 = 1)
are specified to be URY, UGY, and UBY, respectively.
3. Take the pins 14, 15, 16 output amplitude when video mute on ( 02H D7 = 1, D7 = 1) and JPN mode (15H D1 = 1,
D2=1) are specified to be JRY, JGY, and JBY, respectively.
4. R/BU, G/BU, R/BJ, and G/BJ are defined as follows.
•
1.
2.
3.
4.
R-YN: Demodulation angle
Input SG.E (eb = single chroma = ec + 5 kHz) to pin 38.
Take the pin 59 output amplitude when "test mode" I2C data is 18H D6=1, D7=1 to be VRY.
Take the pin 59 output amplitude when "test mode" I2C data is 18H D6=0, D7=1 to be VBY.
R/YN is defined as follows.
*The vector is determined taking the demodulator gain into account.
• TC1: TINT control characteristic 1
• TC2: TINT control characteristic 2
1. Input SG.C (see figure below) to pin 38. Measure the absolute angle with reference to the pin 59 output voltage,
referring to the figure below.
2. Take the TINT data center part (07H data 40H) to be reference angle "TC", determine the TINT DATA maximum
and minimum values. TC1 and TC2 are defined as follows.
TC = TCmax – TC(deg)
TC = TC – TCmin (deg)
Rev.1.0, Sep.23.2003, page 39 of 49
M61250BFP
RGB interface block
• VBKL: Output blanking voltage
1. Input SG.A to pin 38.
2. Measure the voltage of the pin 14, 15, 16 pedestal and blanking parts.
•
•
1.
2.
GYmax: Contrast control characteristic 1
GYmin: Contrast control characteristic 2
Input SG.B (f=100 kHz) to pin 38.
Measure the pin 14, 15, 16 output amplitude.
•
•
1.
2.
GYEnor: Contrast control characteristic 3
GYEmin: Contrast control characteristic 4
Input SG.A to pin 38.
Measure the pin 14, 15, 16 output amplitude when applying 2.9 V and 0 V to pin 33.
• GYEclip: Contrast control characteristic 5
1. Input SG.F to pins 21, 22, 23, 24.
2. Minimize the contrast control data, and measure the output amplitude at and above the pedestal part of pins 14, 15,
16.
The amplitude of the blanking part is not measured.
•
•
•
1.
2.
Lum nor: Brightness control characteristic 1
Lum max: Brightness control characteristic 2
Lum min: Brightness control characteristic 3
Input SG.D (Vy=0 V) to pin 38.
Measure the DC voltage other than the blanking part of the output of pins 14, 15, 16.
• D(R)1: R drive control characteristic 1
1. Input SG.A to pin 38.
2. Measure the pin 14 output amplitude when the drive control data is at center and is maximum, take the
results to be DRnor and DRmax respectively.
3. D(R)1 is defined as follows.
• D(B)1: B drive control characteristic 1
1. Input SG.A to pin 38.
2. Measure the pin 16 output amplitude when the drive control data is at center and is maximum, take the results to be
DBnor and DBmax respectively.
3. D(B)1 is defined as follows.
Rev.1.0, Sep.23.2003, page 40 of 49
M61250BFP
• D(R)2: R drive control characteristic 2
1. Input SG.A to pin 38.
2. Measure the pin 14 output amplitude when the drive control data is at center and is minimum, take the results to be
DRnor and DRmin respectively.
3. D(R)2 is defined as follows.
• D(B)2: R drive control characteristic 2
1. Input SG.A to pin 38.
2. Measure the pin 16 output amplitude when the drive control data is at center and is minimum, take the results to be
DBnor and DBmin respectively.
3. D(B)2 is defined as follows.
•
•
•
1.
2.
EXD(R): Digital OSD(R) input/output characteristic
EXD(G): Digital OSD(G) input/output characteristic
EXD(B): Digital OSD(B) input/output characteristic
Input SG.F (Vosd=1.0 V) to pins 21, 22, 23, 14.
Measure the output amplitude at and above the pedestal part in pins 14, 15, 16. The amplitude of the blanking part
is not measured.
•
•
•
1.
EXD(R-G): Digital OSD (R-G) amplitude difference
EXD(G-B): Digital OSD (G-B) amplitude difference
EXD(B-R): Digital OSD (B-R) amplitude difference
EXD(R-G), EXD(G-B) and EXD(B-R) are defined as follows.
EXD(R–G) = EXD(R)–EXD(G)
EXD(G–B) = EXD(G)–EXD(B)
EXD(B–R) = EXD(B)–EXD(R)
Rev.1.0, Sep.23.2003, page 41 of 49
M61250BFP
•
•
•
1.
2.
EXA(R): Analog OSD(R) input/output characteristic
EXA(G): Analog OSD(G) input/output characteristic
EXA(B): Analog OSD(B) input/output characteristic
Input SG.F (Vosd=1.0 V) to pins 21, 22, 23, 14.
Measure the output amplitude at and above the pedestal part in pins 14, 15, 16. The amplitude of the blanking part
is not measured.
•
•
•
1.
EXA(R-G): Analog OSD (R-G) amplitude difference
EXA(G-B): Analog OSD (G-B) amplitude difference
EXA(B-R): Analog OSD (B-R) amplitude difference
EXA(R-G), EXA(G-B) and EXA(B-R) are defined as follows.
EXA(R–G) = EXA(R)–EXA(G)
EXA(G–B) = EXA(G)–EXA(B)
EXA(B–R) = EXA(B)–EXA(R)
•
•
•
•
•
•
1.
2.
C(R)1: R cutoff characteristic 1
C(G)1: G cutoff characteristic 1
C(B)1: B cutoff characteristic 1
C(R)2: R cutoff characteristic 2
C(G)2: G cutoff characteristic 2
C(B)2: B cutoff characteristic 2
Input SG.D (Vy=0 V) to pin 38.
Measure the DC voltage of other than the blanking part in the outputs of pins 14, 15, 16.
•
•
•
1.
2.
3.
4.
Ccon1: color control characteristic 1
Ccon2: color control characteristic 2
Ccon3: color control characteristic 3
Input SG.C to pin 38.
Measure the output amplitudes of pins 14, 15, 16 when IIC DATA 08H=40h, take this to be Ccon0.
Measure the output amplitudes of pins 14, 15, 16 under each set of conditions.
Ccon1, Ccon2, Ccon3 are defined as follows.
Ccon1, Ccon2, Ccon3 = 20 log
Rev.1.0, Sep.23.2003, page 42 of 49
measured value (Vp-p)
Ccon0 (Vp-p)
(dB)
M61250BFP
•
•
1.
2.
3.
MTXRB: Matrix ratio R/B
MTXGB: Matrix ratio G/B
Input SG.G (rainbow color bar) to pin 38.
Measure the output amplitude when pins 14, 15, 16 are respectively VR, VG, VB.
MTXRB, MTXGB are defined as follows.
•
•
1.
2.
DOSD1: Digital OSD switching characteristic 1
DOSD2: Digital OSD switching characteristic 2
Input SG.F (Vosd=1.0 V) to pins 21, 22, 23, 24.
Measure the rise time and fall time of the output signals of pins 14, 15, 16 at and above pedestal level. The blanking
part is not measured.
•
•
1.
2.
AOSD1: Analog OSD switching characteristic 1
AOSD2: Analog OSD switching characteristic 2
Input SG.F (Vosd=1.0 V) to pins 21, 22, 23, 24.
Measure the rise time and fall time of the output signals of pins 14, 15, 16 at and above pedestal level. The blanking
part is not measured.
•
•
•
1.
2.
BB(R): Blue back function (R)
BB(G): Blue back function (G)
BB(B): Blue back function (B)
Input SG.A to pin 38.
Measure the output amplitude (p-p) of pins 14, 15, 16 other than the blanking part.
Rev.1.0, Sep.23.2003, page 43 of 49
M61250BFP
• WB: White raster function
1. Input SG.A to pin 38.
2. Measure the output amplitude (p-p) of pins 14, 15, 16 other than the blanking part.
Deflection block
• fH1: Horizontal free-running frequency 1
• fH2: Horizontal free-running frequency 2
• fH3: Horizontal free-running frequency 3
Measure the frequency of pin 11 with no input.
• Hfree: Forced horizontal free-running operation
1. Input SG.A to pin 38.
2. Set H-FREE CONTROL DATA to on, measure the frequency at pin 11.
• FPHU: Horizontal pull-in range (upper)
• FPHL: Horizontal pull-in range (lower)
1. Input SG.H to pin 38.
2. Change the frequency of SG.H, measure the frequency range for which the pin 11 output signal and pin 38 input
signal are pulled in, with respect to the video signal horizontal frequency.
• HPT1: Horizontal pulse timing 1
• HPT2: Horizontal pulse timing 2
1. Measure the horizontal pulse timing using the method for HPT1.
2. Typical
HPT2 = (measured value) - HPT1
• HPTW: Horizontal pulse width
• VH: Horizontal pulse amplitude
Rev.1.0, Sep.23.2003, page 44 of 49
M61250BFP
• HSTA: Horizontal pulse stop operation
Confirm that when H.START SW OFF (0FH:D7=0), the horizontal output goes low.
• AFCG: AFC gain operation
1. Measure the pin 7 output amplitude during AFC switching, taking the result during SW ON to be AFCon, and
during SW OFF to be AFCoff.
2. AFCG is defined as follows.
• fV: Vertical free-running frequency
Measure the pin 5 output frequency with no input.
• Vfree: Forced vertical free-running operation
1. Input SG.A to pin 38.
2. Set V-FREE CONTROL DATA to on, measure the pin 5 output amplitude.
• SCV: Service mode operation
Measure the pin 5 output DC voltage with the service switch on.
• FPVU: Vertical pull-in frequency (upper)
• FVPL: Vertical pull-in frequency (lower)
Change the SG.H vertical frequency, and measure the frequency when the pin 5 output waveform is pulled in.
• VRsi: Vertical ramp size
• VRsc1: Vertical ramp size control range 1
• VRsc2: Vertical ramp size control range 2
• VRpo1: Vertical ramp position control range 1
• VRpo2: Vertical ramp position control range 2
1. Measure the vertical ramp timing using the same method as for VRpo1.
2. VRpo2 is defined as follows.
VRpo2 = (measured value) –VRpo1
Rev.1.0, Sep.23.2003, page 45 of 49
M61250BFP
• VW: Vertical pulse width
• VBLKW: Vertical BLK width
• WVSS: Minimum width at minimum sync operation
Reduce the width of the SG.I signal, and measure the input signal width when the pin 5 output waveform pull-in is lost.
Rev.1.0, Sep.23.2003, page 46 of 49
M61250BFP
The following function is added to the M61250BFP (VBLKWVS1 to VBLKWVS3)
The vertical blanking width can be specified independently of VSHIFT.
Note, however, that it operates in the same way as conventional products in the initial state.
The following bits are added to the I2C register.
• VBLK SHIFT ON (1CH D3) Initial value = 0
0: Shifts the VBLK based on the conventional SHIFT
1: Shifts the VBLK based on the VBLK SHIFT.
• VBLK SHIFT (1CH D2 to 1CH D0) Initial value = 4
0: VBLK period is 260 H to 21 H.
1: VBLK period is 260 H to 21 H.
2: VBLK period is 260 H to 23 H.
3: VBLK period is 260 H to 25 H.
4: VBLK period is 260 H to 27 H.
5: VBLK period is 260 H to 29 H.
6: VBLK period is 260 H to 31 H.
7: VBLK period is 260 H to 33 H.
Imaging
period
523
Equivalent
pulse
Vertical
synchronization
Imaging period
Equivalent
pulse
524 525
1
2
3
4
5
6
7
8
9
10 11
12
20 21
23
25
27
29
31
33
35
VOUT(VSHIFT based shift)
VBLK
(VBLK
SHIFT=0)
(VBLK
SHIFT=1)
(VBLK
SHIFT=2)
(VBLK
SHIFT=3)
(VBLK
SHIFT=4)
(VBLK
SHIFT=5)
(VBLK
SHIFT=6)
(VBLK
SHIFT=7)
• An image may be output during the V blanking period according to the VSHIFT value.
In this case, the VBLK should be shifted in order not to output the image during the blanking period. Carefully
consider this because the output condition changes according to the circuit connected externally.
Rev.1.0, Sep.23.2003, page 47 of 49
M61250BFP
Important Information
• Each application should be thoroughly studied and evaluated before making a decision.
• 47 mF and higher electrolytic capacitors and 0.01 mF and higher ceramic capacitors should be connected in parallel
between each of the power supply pins (3, 4, 12, 39, 42, 44) and ground pin. In addition, it is recommended that the
connectors be made as close to the IC power supply pins as possible.
• The C-SYNC output operation of the intelligent monitor (18 pins) cannot be guaranteed at Hfree (13H: D7 = 1) .
• When purchasing I2C bus components, a license to use these components within a 12C bus system is provided
under the 12C patent rights of Philips Corp.
However, the bus system must conform to the 12C specifications stipulated by Philips.
Rev.1.0, Sep.23.2003, page 48 of 49
16
1
17
64
e
y
D
HD
b
JEDEC Code
—
x
32
49
48
Weight(g)
M
33
F
HE
EIAJ Package Code
LQFP64-P-1414-0.8
Detail F
Lp
Lead Material
Cu Alloy
L
L1
A
b2
I2
MD
ME
x
y
A3
A
A1
A2
b
c
D
E
e
HD
HE
L
L1
Lp
Symbol
Dimension in Millimeters
Min
Nom
Max
—
—
1.7
0.1
0.2
0
—
—
1.4
0.32
0.37
0.45
0.105
0.125
0.175
13.9
14.1
14.0
13.9
14.1
14.0
0.8
—
—
16.0
15.8
16.2
15.8
16.2
16.0
0.3
0.5
0.7
1.0
—
—
0.45
0.6
0.75
—
0.25
—
—
—
0.2
0.1
—
—
0˚
8˚
—
0.5
—
—
—
—
0.95
—
14.4
—
—
—
14.4
Recommended Mount Pad
l2
MD
Plastic 64pin 14 14mm body LQFP
e
b2
MMP
E
Rev.1.0, Sep.23.2003, page 49 of 49
A2
A1
ME
64P6U-A
M61250BFP
Package Dimensions
c
A3
Sales Strategic Planning Div.
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
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may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage.
Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary
circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap.
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