AT91SAM7L-STK Rev. A Starter Kit .................................................................................................................... User Guide 6409A–ATARM–30-Jun-08 1-2 6409A–ATARM–30-Jun-08 AT91SAM7L-STK Rev. A Starter Kit User Guide Table of Contents Section 1 Overview .................................................................................................................... 1-1 1.1 Scope................................................................................................................................. 1-1 1.2 Deliverables ...................................................................................................................... 1-1 1.3 The AT91SAM7L-STK Rev. A Starter Board ..................................................................... 1-1 Section 2 Setting Up the AT91SAM7L-STK Rev. A Board......................................................... 2-1 2.1 Electrostatic Warning ......................................................................................................... 2-1 2.2 Requirements..................................................................................................................... 2-1 2.3 Layout ................................................................................................................................ 2-2 2.4 Powering Up the Board...................................................................................................... 2-2 2.5 Getting Started................................................................................................................... 2-2 2.6 AT91SAM7L-STK Rev. A Block Diagram .......................................................................... 2-3 Section 3 Board Description....................................................................................................... 3-1 3.1 AT91SAM7L64/128 Microcontroller ................................................................................... 3-1 3.2 AT91SAM7L64/128 Block Diagram ................................................................................... 3-3 3.3 Memory .............................................................................................................................. 3-4 3.4 Clock Circuitry.................................................................................................................... 3-4 3.5 Reset Circuitry ................................................................................................................... 3-4 3.6 Shut Down controller.......................................................................................................... 3-4 3.7 Power Supply Circuitry....................................................................................................... 3-4 3.8 User Interface .................................................................................................................... 3-4 3.9 Debug Interface ................................................................................................................. 3-4 3.10 Expansion Slot ................................................................................................................... 3-4 3.11 PIO Usage ......................................................................................................................... 3-5 Section 4 Configuration .............................................................................................................. 4-1 4.1 Configuration Straps .......................................................................................................... 4-1 Section 5 Schematics................................................................................................................. 5-1 Section 6 Errata.......................................................................................................................... 6-1 AT91SAM7L-STK Rev. A Starter Kit User Guide i 6409A–ATARM–30-Jun-08 Table of Contents (Continued) 6.1 Q1 Footprint Incorrect ........................................................................................................ 6-1 6.2 MAX3318 Control Pull-ups................................................................................................. 6-2 Section 7 Revision History ......................................................................................................... 7-1 ii 6409A–ATARM–30-Jun-08 AT91SAM7L-STK Rev. A Starter Kit User Guide Section 1 Overview 1.1 Scope The AT91SAM7L-STK rev.A starter kit enables evaluation capabilities and code development of applications running on an AT91SAM7L64/128. This guide focuses on the AT91SAM7L-STK rev.A board as an evaluation platform. 1.2 Deliverables The AT91SAM7L-STK rev.A package contains the following items: 1.3 An AT91SAM7L-STK rev.A board Two AAA batteries The AT91SAM7L-STK Rev. A Starter Board The board is equipped with an AT91SAM7L128 (128-lead LQFP package) together with the following: One DBGU serial communication port One ZIGBEE extension connector One JTAG/ICE debug interface Five user- input push buttons One WakeUP input push button One Reset Push Button One Battery Socket for two AAA batteries One 400 segments dot matrix LCD AT91SAM7L-STK Rev. A Starter Kit User Guide 1-1 6409A–ATARM–30-Jun-08 Section 2 Setting Up the AT91SAM7L-STK Rev. A Board 2.1 Electrostatic Warning The AT91SAM7L-STK rev.A starter board is shipped in a protective anti-static package. The board must not be subjected to high electrostatic potentials. A grounding strap or similar protective device should be worn when handling the board. Avoid touching the component pins or any other metallic element. 2.2 Requirements In order to set up the AT91SAM7L-STK rev.A starter board, the following items are needed: The AT91SAM7L-STK rev.A starter board Two AAA batteries AT91SAM7L-STK Rev. A Starter Kit User Guide 2-1 6409A–ATARM–30-Jun-08 Setting Up the AT91SAM7L-STK Rev. A Board 2.3 Layout Figure 2-1. 2.4 AT91SAM7L-STK Rev. A Board Layout Powering Up the Board The AT91SAM7L-STK rev.A requires 3.0V (2.2V-3.6V) DC input. The power is supplied to the board via 2 AAA batteries or 3.0V VCC pads. 2.5 Getting Started Please refer to the AT91SAM product pages on the Atmel web site, for the most up-to-date information on getting started with the AT91SAM7L-STK rev.A. 2-2 6409A–ATARM–30-Jun-08 AT91SAM7L-STK Rev. A Starter Kit User Guide Setting Up the AT91SAM7L-STK Rev. A Board AT91SAM7L-STK Rev. A Block Diagram Figure 2-2. AT91SAM7L-STK Block Diagram Interfaces SHEET 2 '%*8 PC[0..29] 56 2.6 =,*%(( PC[0..29] Interfaces Processor AD[0..3] PA[0..25] PB[0..23] PC[0..29] SHEET 4 AD[0..3] PA[0..25] PB[0..23] PC[0..29] ERASE Processor LCD, KBD AD[0..3] PA[0..25] PB[0..23] PC[0..29] SHEET 3 AD[0..3] PA[0..25] PB[0..23] PC[0..29] ERASE LCD, KBD AT91SAM7L-STK Rev. A Starter Kit User Guide 2-3 6409A–ATARM–30-Jun-08 Section 3 Board Description 3.1 AT91SAM7L64/128 Microcontroller • Incorporates the ARM7TDMI® ARM® Thumb® Processor • • • • • • • • • – High-performance 32-bit RISC Architecture – High-density 16-bit Instruction Set – Leader in MIPS/Watt – EmbeddedICE™ In-circuit Emulation, Debug Communication Channel Support Internal High-speed Flash – 128 Kbytes (AT91SAM7L128), Organized in 512 Pages of 256 Bytes Single Plane – 64 Kbytes (AT91SAM7L64), Organized In 256 Pages of 256 Bytes Single Plane – Single Cycle Access at Up to 15 MHz in Worst Case Conditions – 128-bit Read Access – Page Programming Time: 4.6 ms, Including Page Auto Erase, Full Erase Time: 10 ms – 10,000 Write Cycles, 10-year Data Retention Capability, Sector Lock Capabilities, Flash Security Bit – Fast Flash Programming Interface for High Volume Production Enhanced Embedded Flash Controller (EEFC) – Interface of the Flash Block with the 32-bit Internal Bus – Increases Performance in ARM and Thumb Mode with 128-bit Wide Memory Interface Internal High-speed SRAM, Single-cycle Access at Maximum Speed – 6 kbytes • 2 Kbytes Directly on Main Supply that Can Be Used as Backup SRAM • 4 Kbytes in the Core Memory Controller (MC) – Enhanced Embedded Flash Controller, Abort Status and Misalignment Detection Reset Controller (RSTC) – Based on Brownout Reset and Low-power Factory-calibrated Brownout Detector – Provides External Reset Signal Shaping and Reset Source Status Clock Generator (CKGR) – Low-power 32 kHz RC Oscillator, 32 kHz On-chip Oscillator, 2 MHz Fast RC Oscillator and one PLL Supply Controller (SUPC) – Minimizes Device Power Consumption – Manages the Different Supplies On Chip – Supports Multiple Wake-up Sources Power Management Controller (PMC) – Software Power Optimization Capabilities, Including Slow Clock Mode (Down to 500 Hz) and Idle Mode – Three Programmable External Clock Signals – Handles Fast Start Up Advanced Interrupt Controller (AIC) – Individually Maskable, Eight-level Priority, Vectored Interrupt Sources – Two External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt Protected AT91SAM7L-STK Rev. A Starter Kit User Guide 3-1 6409A–ATARM–30-Jun-08 Board Description • Debug Unit (DBGU) • • • • • • • • • • • • • • • • • • 3-2 6409A–ATARM–30-Jun-08 – Two-wire UART and Support for Debug Communication Channel interrupt, Programmable ICE Access Prevention Periodic Interval Timer (PIT) – 20-bit Programmable Counter plus 12-bit Interval Counter Windowed Watchdog (WDT) – 12-bit Key-protected Programmable Counter – Provides Reset or Interrupt Signals to the System – Counter may be Stopped While the Processor is in Debug State or in Idle Mode Real-time Clock (RTC) – Two Hundred Year Calendar with Alarm – Runs Off the Internal RC or Crystal Oscillator Three Parallel Input/Output Controllers (PIOA, PIOB, PIOC) – Eighty Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os – Input Change Interrupt Capability on Each I/O Line – Individually Programmable Open-drain, Pull-up resistor and Synchronous Output Eleven Peripheral DMA Controller (PDC) Channels One Segmented LCD Controller – Display Capacity of Forty Segments and Ten Common Terminals – Software Selectable LCD Output Voltage (Contrast) Two Universal Synchronous/Asynchronous Receiver Transmitters (USART) – Individual Baud Rate Generator, IrDA® Infrared Modulation/Demodulation – Support for ISO7816 T0/T1 Smart Card, Hardware Handshaking, RS485 Support – Manchester Encoder/Decoder – Full Modem Line Support on USART1 One Master/Slave Serial Peripheral Interface (SPI) – 8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects One Three-channel 16-bit Timer/Counter (TC) – Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel – Double PWM Generation, Capture/Waveform Mode, Up/Down Capability One Four-channel 16-bit PWM Controller (PWMC) One Two-wire Interface (TWI) – Master, Multi-Master and Slave Mode Support, All Atmel® Two-wire EEPROMs and I2C compatible Devices Supported – General Call Supported in Slave Mode One 4-channel 10-bit Analog-to-Digital Converter, Four Channels Multiplexed with Digital I/Os SAM-BA® Boot Assistant – Default Boot Program – Interface with SAM-BA Graphic User Interface – In Application Programming Function (IAP) IEEE® 1149.1 JTAG Boundary Scan on All Digital Pins I/Os, including Four High-current Drive I/O lines, Up to 4 mA Each Power Supplies – Embedded 1.8V Regulator, Drawing up to 60 mA for the Core with Programmable Output Voltage – Single Supply 1.8V - 3.6V – Zero-power Power-on Reset and Brownout Detector, Fully Programmable Fully Static Operation: Up to 36 MHz at 85°C Available in a 128-lead LQFP Green and a 144-ball LFBGA Green Package AT91SAM7L-STK Rev. A Starter Kit User Guide Board Description 3.2 AT91SAM7L64/128 Block Diagram Figure 3-1. AT91SAM7L64/128 Block Diagram TDI TDO TMS TCK ICE JTAG SCAN Charge Pump ARM7TDMI Processor JTAGSEL LCD Voltage Regulator System Controller 2 MHz RCOSC TST CAPP1 CAPM1 CAPP2 CAPM2 VDDINLCD VDD3V6 VDDLCD VDDIO2 IRQ0-IRQ1 PIO FIQ 1.8 V Voltage Regulator AIC PCK0-PCK2 VDDCORE CLKIN PLL XIN XOUT VDDIO1 VDDIO2 Memory Controller PLLRC VDDIO1 VDDIO1 GND VDDOUT PMC SRAM OSC Embedded Flash Controller Address Decoder 32k RCOSC Abort Status Misalignment Detection 2 Kbytes( Back-up) 4 Kbytes (Core) VDDCORE Flash BOD POR ERASE 64/128 Kbytes Supply Controller Peripheral Bridge NRST ROM (12 Kbytes) Peripheral Data Controller 11 Channels RSTB Fast Flash Programming Interface FWUP VDDIO1 APB PGMRDY PGMNVALID PGMNOE PGMCK PGMM0-PGMM3 PGMD0-PGMD15 PGMNCMD PGMEN0-PGMEN2 SAM-BA RTC PIT PIO WDT DRXD DTXD DBGU PWM0 PWM1 PWM2 PWM3 TCLK0 TCLK1 TCLK2 TIOA0 TIOB0 TIOA1 TIOB1 TIOA2 TIOB2 PWMC PDC PDC Timer Counter PIOA (26 IOs) TC0 PIOB (24 IOs) TC1 PDC SEG00-SEG39 COM0-COM9 LCD Controller TWI PDC PDC SPI PDC USART0 PDC PDC PIO RXD0 TXD0 SCK0 RTS0 CTS0 RXD1 TXD1 SCK1 RTS1 CTS1 DCD1 DSR1 DTR1 RI1 AT91SAM7L-STK Rev. A Starter Kit User Guide PDC PDC ADC USART1 PIO TC2 PIOC (30 IOs) TWD TWCK NPCS0 NPCS1 NPCS2 NPCS3 MISO MOSI SPCK ADTRG AD0 AD1 AD2 AD3 ADVREF PDC 3-3 6409A–ATARM–30-Jun-08 Board Description 3.3 3.4 Memory 6 Kbytes of Internal single-cycle access High-speed SRAM 64/128 Kbytes of Internal single-cycle access High-speed Flash Clock Circuitry 3.5 3.6 3.7 3.8 Reset Circuitry Internal reset controller with a bi-directional reset pin External reset push button Shut Down controller Programmable shutdown and Wake-Up Wake-up push button. Power Supply Circuitry For dynamic power consumption, the AT91SAM7L64/128 consumes a maximum of 30 mA on VCC at full speed 36MHz On board 2 AAA batteries or 3V DC input power pad directly supplied to VCC User Interface 3.9 3.10 32.768 KHz standard crystal for the oscillator Five user- input push buttons, four direction buttons and one ok button Debug Interface 20-pin JTAG/ICE interface connector One Serial interface (DBGU COM Port) via RS-232 DB9 male socket Expansion Slot One ZIGBEE expansion connector for Atmel AT86RF230 adaptor All PIOC signals of the AT91SAM7L64/128 are routed to peripheral extension connector (J6). This allows the developer to add external hardware components or boards. 3-4 6409A–ATARM–30-Jun-08 AT91SAM7L-STK Rev. A Starter Kit User Guide Board Description 3.11 PIO Usage Table 3-1. PIO Controller A I/O Line Peripheral A Peripheral B Peripheral Usage Powered by PA0 Segment LCD PANEL COM0 VDDIO2 PA1 Segment LCD PANEL COM1 VDDIO2 PA2 Segment LCD PANEL COM2 VDDIO2 PA3 Segment LCD PANEL COM3 VDDIO2 PA4 Segment LCD PANEL COM4 VDDIO2 PA5 Segment LCD PANEL COM5 VDDIO2 PA6 Segment LCD PANEL SEG0 VDDIO2 PA7 Segment LCD PANEL SEG1 VDDIO2 PA8 Segment LCD PANEL SEG2 VDDIO2 PA9 Segment LCD PANEL SEG3 VDDIO2 PA10 Segment LCD PANEL SEG4 VDDIO2 PA11 Segment LCD PANEL SEG5 VDDIO2 PA12 Segment LCD PANEL SEG6 VDDIO2 PA13 Segment LCD PANEL SEG7 VDDIO2 PA14 Segment LCD PANEL SEG8 VDDIO2 PA15 Segment LCD PANEL SEG9 VDDIO2 PA16 Segment LCD PANEL SEG10 VDDIO2 PA17 Segment LCD PANEL SEG11 VDDIO2 PA18 Segment LCD PANEL SEG12 VDDIO2 PA19 Segment LCD PANEL SEG13 VDDIO2 PA20 Segment LCD PANEL SEG14 VDDIO2 PA21 Segment LCD PANEL SEG15 VDDIO2 PA22 Segment LCD PANEL SEG16 VDDIO2 PA23 Segment LCD PANEL SEG17 VDDIO2 PA24 Segment LCD PANEL SEG18 VDDIO2 PA25 Segment LCD PANEL SEG19 VDDIO2 AT91SAM7L-STK Rev. A Starter Kit User Guide 3-5 6409A–ATARM–30-Jun-08 Board Description Table 3-2. PIO Controller B I/O Line Peripheral A Peripheral B Peripheral Usage Powered by PB0 Segment LCD PANEL SEG20 VDDIO2 PB1 Segment LCD PANEL SEG21 VDDIO2 PB2 Segment LCD PANEL SEG22 VDDIO2 PB3 Segment LCD PANEL SEG23 VDDIO2 PB4 Segment LCD PANEL SEG24 VDDIO2 PB5 Segment LCD PANEL SEG25 VDDIO2 PB6 Segment LCD PANEL SEG26 VDDIO2 PB7 Segment LCD PANEL SEG27 VDDIO2 PB8 Segment LCD PANEL SEG28 VDDIO2 PB9 Segment LCD PANEL SEG29 VDDIO2 PB10 Segment LCD PANEL SEG30 VDDIO2 PB11 Segment LCD PANEL SEG31 VDDIO2 PB12 NPCS3 Segment LCD PANEL SEG32 VDDIO2 PB13 NPCS2 Segment LCD PANEL SEG33 VDDIO2 PB14 NPCS1 Segment LCD PANEL SEG34 VDDIO2 PB15 RTS1 Segment LCD PANEL SEG35 VDDIO2 PB16 RTS0 Segment LCD PANEL SEG36 VDDIO2 PB17 DTR1 Segment LCD PANEL SEG37 VDDIO2 PB18 PWM0 Segment LCD PANEL SEG38 VDDIO2 PB19 PWM1 Segment LCD PANEL SEG39 VDDIO2 PB20 PWM2 Segment LCD PANEL COM6 VDDIO2 PB21 PWM3 Segment LCD PANEL COM7 VDDIO2 PB22 NPCS1 PCK1 Segment LCD PANEL COM8 VDDIO2 PB23 PCK0 NPCS3 Segment LCD PANEL COM9 VDDIO2 3-6 6409A–ATARM–30-Jun-08 AT91SAM7L-STK Rev. A Starter Kit User Guide Board Description Table 3-3. PIO Controller C I/O Line Peripheral A Peripheral B PC0 CTS1 PWM2 User’s Input Buttons OK VDDIO1 PC1 DCD1 TIOA2 User’s Input Buttons UP VDDIO1 PC2 DTR1 TIOB2 User’s Input Buttons RIGHT VDDIO1 PC3 DSR1 TCLK1 User’s Input Buttons DOWN VDDIO1 PC4 RI1 TCLK2 User’s Input Buttons LEFT VDDIO1 PC5 IRQ1 NPCS2 ZIGBEE IRQ1 VDDIO1 PC6 NPCS1 PCK2 ZIGBEE NPCS1 VDDIO1 PC7 PWM0 TIOA0 MAX3318E FORCEOFF VDDIO1 PC8 PWM1 TIOB0 ZIGBEE RSIN VDDIO1 PC9 PWM2 SCK0 ZIGBEE SLP_IR VDDIO1 PC10 TWD NPCS3 VDDIO1 PC11 TWCK TCLK0 VDDIO1 PC12 RXD0 NPCS3 MAX3318E FORCEON VDDIO1 PC13 TXD0 PCK0 MAX3318E INVALID VDDIO1 PC14 RTS0 ADTRG MAX3318E READY VDDIO1 PC15 CTS0 PWM3 VCC/VBAT MONITOR ENABLE VDDIO1 PC16 DRXD NPCS1 MAX3318E DRXD VDDIO1 PC17 DTXD NPCS2 MAX3318E DTXD VDDIO1 PC18 NPCS0 PWM0 PC19 MISO PWM1 ZIGBEE MISO VDDIO1 PC20 MOSI PWM2 ZIGBEE MOSI VDDIO1 PC21 SPCK PWM3 ZIGBEE SPCK VDDIO1 PC22 NPCS3 TIOA1 VDDIO1 PC23 PCK0 TIOB1 VDDIO1 PC24 RXD1 PCK1 VDDIO1 PC25 TXD1 PCK2 VDDIO1 PC26 RTS0 FIQ VDDIO1 PC27 NPCS2 IRQ0 VDDIO1 PC28 SCK1 PWM0 VDDIO1 PC29 RTS1 PWM1 VDDIO1 AT91SAM7L-STK Rev. A Starter Kit User Guide Peripheral Usage Powered by VDDIO1 3-7 6409A–ATARM–30-Jun-08 Section 4 Configuration 4.1 Configuration Straps Table 4-1 gives details of configuration straps on the AT91SAM7L-STK rev. A starter board and their default settings. Table 4-1. Designation Default Setting Feature J6 pins 39-40 Opened Closed for internal flash erase(1) J8 Closed VCC jumper(2) SD1 Opened Disables VDDIO2 to VDDLCD connection SD2 2-3 Selects VCC or VDD3V6 to VDDLCD SD3 Closed Enables VDDOUT applying to VDDCORE SD4 2-3 Selects VDDINLCD input R20 IN Enables the ICE NRST input TP1 N.A RX TP2 N.A TX TP3 N.A CLKIN TP4 N.A FWUP TP5 N.A ADREF TP6 N.A XOUT TP7 N.A NRSTB TP8 N.A VDDIO2 TP9 N.A VDD3V6 TP10 N.A VDDOUT Notes: 1. This jumper is used to erase and reinitialize the internal flash content and some of the NVM bits. 2. This jumper is provided for power consumption measurement. By default, it is closed. To use this feature, the user has to open the strap and insert an ammeter. AT91SAM7L-STK Rev. A Starter Kit User Guide 4-1 6409A–ATARM–30-Jun-08 Section 5 Schematics This section contains the following schematics: Top Level Interfaces LCD, KBD Processor AT91SAM7L-STK Rev. A Starter Kit User Guide 5-1 6409A–ATARM–30-Jun-08 5 4 3 Interfaces 2 1 SHEET 2 D D PC[0..29] PC[0..29] C C Interfaces Processor AD[0..3] PA[0..25] PB[0..23] PC[0..29] SHEET 4 AD[0..3] PA[0..25] PB[0..23] PC[0..29] ERASE Processor B LCD, KBD AD[0..3] PA[0..25] PB[0..23] PC[0..29] SHEET 3 B AD[0..3] PA[0..25] PB[0..23] PC[0..29] ERASE LCD, KBD A A A REV AT91SAM7L-STK INIT EDIT MODIF. SCALE PP DES. 17MAR08 DATE 1/1 Top level This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings. XXX XX-XXX-XX VER. DATE REV. SHEET A 1 4 5 4 3 2 1 J1 PC[0..29] J2 1 AAA PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PC8 PC9 PC10 PC11 PC12 PC13 PC14 PC15 PC16 PC17 PC18 PC19 PC20 PC21 PC22 PC23 PC24 PC25 PC26 PC27 PC28 PC29 1 Pad GND AAA J3 D 1 1 Pad VCC VCC C1 100NF SERIAL DEBUG PORT U1 VCC 19 VCC C1+ 2 18 GND C1C2+ 4 5 C2- 6 GND 3 C 7 C5 100NF C4 100NF V+ GND TX TP2 TESTPOINT R3 100K R2 100K 11 PC13 PC7 READY 1 PC14 PC12 V- TP1 TESTPOINT R1 100K C3 100NF INVALID J4 1 6 2 7 3 8 4 9 5 C2 100NF FORCEOFF 20 FORCEON 14 17 D1OUT D1IN 13 8 D2OUT D2IN 12 D C R4 NOT POPULATED GND DTXD PC17 DRXD PC16 10 11 GND RX D09P24A4GX00 R5 16 R1IN R1OUT 15 9 R2IN R2OUT 10 0R GND GND MAX3318E ZIGBEE INTERFACE B Note: Pin 1 on Zigbee board RZ502 matches pin 2 on this connector B R6 VCC 0R J5 PC9 PC20 PC6 SLP_TR MOSI NPSC1 PC5 IRQ1 VCC R7 10K Only for AT86RF230Rev.A connexion not required for Rev.B on U2 VCC VCC RSTN MISO SPCK PC8 PC21 3 D 1 CP 6 C 5 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 VCC 5 Q 4 GND 2 VCC U3 2 PC19 4 NC7SZ125P5X GND 3 1 VCC 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 NC7SZ175P6X VCC VCC GND C6 NOT POPULATED GND C7 NOT POPULATED GND A A GND A REV AT91SAM7L-STK INIT EDIT MODIF. SCALE PP DES. 17MAR08 DATE 1/1 Interfaces This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings. XXX XX-XXX-XX VER. DATE REV. SHEET A 2 4 5 4 3 2 1 BP1 PC[0..29] PB[0..23] 3-1437565-0 PC1 UP PC0 OK PC2 RIGHT PC4 LEFT PC3 DOWN PA[0..25] BP2 D BP3 3-1437565-0 BP4 3-1437565-0 D 3-1437565-0 BP5 PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 PB15 PB16 PB17 PB18 PB19 PB20 PB21 PB22 PB23 SEG20 SEG21 SEG22 SEG23 SEG24 SEG25 SEG26 SEG27 SEG28 SEG29 SEG30 SEG31 SEG32 SEG33 SEG34 SEG35 SEG36 SEG37 SEG38 SEG39 COM6 COM7 COM8 COM9 PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PC8 PC9 PC10 PC11 PC12 PC13 PC14 PC15 PC16 PC17 PC18 PC19 PC20 PC21 PC22 PC23 PC24 PC25 PC26 PC27 PC28 PC29 NPCS3 NPCS2 NPCS1 RTS1 RTS0 DTR1 PWM0 PWM1 PWM2 PWM3 NPSC1/PCK1 PCK0/NPCS3 AD3 AD2 AD1 AD0 OK UP RIGHT DOWN LEFT 3-1437565-0 VCC GND GND GND VCC/VBAT MONITOR VCC Q1 FDV304P 1 2 C COM0 COM1 COM2 COM3 COM4 COM5 SEG0 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 SEG16 SEG17 SEG18 SEG19 AD[0..3] C PC15 3 PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PA8 PA9 PA10 PA11 PA12 PA13 PA14 PA15 PA16 PA17 PA18 PA19 PA20 PA21 PA22 PA23 PA24 PA25 R8 AD[0..3] 10K AD3 R9 SEG38 SEG36 SEG34 SEG32 SEG30 SEG28 SEG26 SEG24 SEG22 SEG20 SEG18 SEG16 SEG14 SEG12 SEG10 SEG8 SEG6 SEG4 SEG2 SEG0 COM0 COM1 COM2 COM3 COM4 10K VCC VCC 26 SEG39 SEG37 27 28 SEG35 SEG33 29 30 SEG31 SEG29 31 32 SEG27 33 SEG25 34 SEG23 35 SEG21 36 SEG19 37 SEG17 38 SEG15 39 SEG13 40 SEG11 41 SEG9 42 SEG7 43 SEG5 SEG3 44 45 SEG1 COM1 46 47 COM2 COM3 48 49 COM4 B COM5 50 GND SEG40 SEG38 B J6 PC1 PC3 PC5 PC7 PC9 PC11 PC13 PC15 PC17 PC19 PC21 PC23 PC25 PC27 PC29 DCD1/TIOA2_WKUP1 DSR1/TCLK1_WKUP3 IRQ1/NPCS2_WKUP5 PWM0/TIOA0 PWM2/SCK0 TWCK/TCLK0_WKUP7 TXD0/PCK0_WKUP9 CTS0/PWM3_WKUP11 /DTXD/MPCS2 MISO/PWM1 SPCK/PWM3 PCK0/TIOB1 TXD1/PCK2 NPCS2/IRQ0_WKUP13 RTS1/PWM1_WKUP15 AD1 AD3 25 SEG39 24 SEG37 SEG34 SEG36 23 SEG35 22 SEG33 SEG30 SEG32 21 SEG31 20 SEG29 SEG28 19 SEG27 SEG26 18 SEG25 SEG24 17 SEG23 SEG22 16 SEG21 SEG20 15 SEG19 SEG18 14 SEG17 SEG16 13 SEG15 SEG14 12 SEG13 SEG12 11 SEG11 SEG10 10 SEG9 SEG8 9 SEG7 SEG4 SEG6 8 SEG5 7 SEG3 COM10 SEG2 6 SEG1 5 COM9 COM8 COM9 4 COM8 3 COM7 COM7 COM6 1 2 COM6 R11 NOT POPULATED LCD1 LCD_GS08001AA COM5 GND R10 NOT POPULATED VCC 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 PC0 PC2 PC4 PC6 PC8 PC10 PC12 PC14 PC16 PC18 PC20 PC22 PC24 PC26 PC28 CTS1/PWM2_WKUP0 DTR1/TIOB2_WKUP2 RI1/TCLK2_WKUP4 NPCS1/PCK2_WKUP6 PWM1/TIOB0 TWD/NPCS3 RXD0/NPCS3_WKUP8 RTS0/ADTRG_WKUP10 DRXD/NPCS1 NPCS0/PWM0 MOSI/PWM2 MPCS3/TIOA1 RXD1/PCK1 RTS0/FIQ_WKUP12 SCK1/PWM0_WKUP14 AD0 AD2 ERASE ERASE GND JS1 GND A A A REV AT91SAM7L-STK INIT EDIT MODIF. SCALE PP DES. 17MAR08 DATE 1/1 LCD, KBD This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings. XXX XX-XXX-XX VER. DATE REV. SHEET A 3 4 5 4 3 2 1 PC[0..29] U4 PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 PB15 PB16 PB17 PB18 PB19 PB20 PB21 PB22 PB23 R12 100K R13 100K FWKUP GND TP4 TESTPOINT C8 NOT POPULATED GND ICE INTERFACE PB0_SEG20 PB1_SEG21 PB2_SEG22 PB3_SEG23 PB4_SEG24 PB5_SEG25 PB6_SEG26 PB7_SEG27 PB8_SEG28 PB9_SEG29 PB10_SEG30 PB11_SEG31 PB12/NPCS3_SEG32 PB13/NPCS2_SEG33 PB14/NPCS1_SEG34 PB15/RTS1_SEG35 PB16/RTS0_SEG36 PB17/DTR1_SEG37 PB18/PWM0_SEG38 PB19/PWM1_SEG39 PB20/PWM2_COM6 PB21/PWM3_COM7 PB22/NPSC1/PCK1_COM8 PB23/PCK0/NPCS3_COM9 PA0_COM0 PA1_COM1 PA2_COM2 PA3_COM3 PA4_COM4 PA5_COM5 PA6_SEG0 PA7_SEG1 PA8_SEG2 PA9_SEG3 PA10_SEG4 PA11_SEG5 PA12_SEG6 PA13_SEG7 PA14_SEG8 PA15_SEG9 PA16_SEG10 PA17_SEG11 PA18_SEG12 PA19_SEG13 PA20_SEG14 PA21_SEG15 PA22_SEG16 PA23_SEG17 PA24_SEG18 PA25_SEG19 VCC VCC R16 100K R17 100K R18 100K R19 NOT POPULATED J7 JTAG_TDI JTAG_TMS JTAG_TCK JTAG_TDO JTAG_RST R20 0R FWUP 116 82 81 117 79 TDI TMS TCK TDO NRST R14 180R C AT91SAM7L-LQFP128 TESTPOINT C9 100NF ADVREF 69 AD3 AD2 AD1 AD0 70 71 72 73 AD3 AD2 AD1 AD0 GND R21 NOT POPULATED 10K CM415-32.768KDZFB-F 32.768 kHz XC1 PLLRCGND 128 127 XOUT XIN/PGMCK R23 TST NRSTB 2 33 34 GND VDDIO2 VDDIO2 VDDIO2 B GNDPLL 15 32 55 123 VDDIO1 VDDIO1 VDDIO1 C13 18PF VDDINLCD C12 18PF 1 GND NOT POPULATED 126 VCC TP7 TESTPOINT 75 85 119 TP6 TESTPOINT 1 122 39 2.2NF PLLRC GND GND GND GND GND GND GND C11 AD[0..3] JTAGSEL 121 14 40 56 68 76 86 120 22NF 83 VCC R22 VDDOUT VDDCORE VDDCORE VDDCORE VDDCORE VDDCORE VDDCORE C10 GND 118 VDDOUT TP5 74 2 28 62 84 100 124 1 3 5 7 9 11 13 15 17 19 CLKIN CAPM2 CAPP2 CAPM1 CAPP1 2 4 6 8 10 12 14 16 18 20 125 VDDLCD VDD3V6 R15 100K 35 36 37 38 C D PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PA8 PA9 PA10 PA11 PA12 PA13 PA14 PA15 PA16 PA17 PA18 PA19 PA20 PA21 PA22 PA23 PA24 PA25 3 4 5 6 7 8 9 10 11 12 13 16 17 18 19 20 21 22 23 24 25 26 27 29 30 31 C14 10NF RESET ERASE BP6 3-1437565-0 41 42 43 44 45 46 47 48 49 50 51 52 53 54 57 58 59 60 61 63 64 65 66 67 PA[0..25] AT91SAM7L128-AU BP7 3-1437565-0 ERASE C29 10µF 6V3 C30 100NF C15 220NF B NRSTB 80 D 87 88 89 90 91 92 93 94 95 96 97 98 99 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 77 78 TP3 TESTPOINT VCC PC0/CTS1/PWM2_WKUP0 PC1/DCD1/TIOA2_WKUP1 PC2/DTR1/TIOB2_WKUP2 PC3/DSR1/TCLK1_WKUP3 PC4/RI1/TCLK2_WKUP4 PC5/IRQ1/NPCS2_WKUP5 PC6/NPCS1/PCK2_WKUP6 PC7/PWM0/TIOA0 PC8/PWM1/TIOB0 PC9/PWM2/SCK0 PC10/TWD/NPCS3 PC11/TWCK/TCLK0_WKUP7 PC12/RXD0/NPCS3_WKUP8 PC13/TXD0/PCK0_WKUP9 PC14/RTS0/ADTRG_WKUP10 PC15/CTS0/PWM3_WKUP11 PC16/DRXD/NPCS1 PC17/DTXD/MPCS2 PC18/NPCS0/PWM0 PC19/MISO/PWM1 PC20/MOSI/PWM2 PC21/SPCK/PWM3 PC22/MPCS3/TIOA1 PC23/PCK0/TIOB1 PC24/RXD1/PCK1 PC25/TXD1/PCK2 PC26/RTS0/FIQ_WKUP12 PC27/NPCS2/IRQ0_WKUP13 PC28/SCK1/PWM0_WKUP14 PC29/RTS1/PWM1_WKUP15 FORCE WAKE-UP PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PC8 PC9 PC10 PC11 PC12 PC13 PC14 PC15 PC16 PC17 PC18 PC19 PC20 PC21 PC22 PC23 PC24 PC25 PC26 PC27 PC28 PC29 PB[0..23] C16 220NF R24 10R C33 ERASE TP8 GND 3 C34 10µF 6V3 1 GND C21 100NF C32 100NF C28 100NF TESTPOINT VCC C25 100NF C26 100NF C20 100NF C2710µF 6V3 2 12 SD1 1 SOLDER DROP 2 pins open C17 2.2µF C18 100NF C22 100NF C31 100NF C19 100NF C23 100NF C24 100NF TESTPOINT TP9 10µF 6V3 SAM7L Current measurement 2 SD2 JS2 TESTPOINT A J8 VCC 2 SD3 1 12 2 SOLDER DROP 2 pins closed SOLDER DROP 3 pins SD4 3 A REV 1 TP10 VDDOUT SOLDER DROP 3 pins A AT91SAM7L-STK GND INIT EDIT MODIF. SCALE PP DES. 17MAR08 DATE 1/1 Processor This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings. XXX XX-XXX-XX VER. DATE REV. SHEET A 4 4 Section 6 Errata 6.1 Q1 Footprint Incorrect Transistor Q1 is incorrectly connected. The schematic is right but the PCB connections of pins S and D are swapped => the protection diode is polarized forward (permanent current flow across the bridge) and the MOS is not operating properly (non accurate battery level measurement). Problem Fix/Workaround Remove Q1 in order to avoid the parasitic 150 µA battery drain. If battery measurement is really mandatory for some applications, Q1 has to be removed and soldered bottom up, taking care to apply the correct polarity. Additionally, a 100 KΩ pull-up resistor is needed across gate and source. 6.2 MAX3318 Control Pull-ups The default configuration of the MAX3318 is ON. This leads to extra power consumption discharging the batteries when the AT91SAM7L128 enters OFF mode (or does not even drive PC7 and PC12 to put the MAX3318 in OFF mode). Problem Fix/Workaround Remove R1, R2 and R3 and add a 10M Ω pull-down resistor on PC7. This allows to Force OFF the MAX3318 when the AT91SAM7L128 enters OFF mode and to turn it on when the AT91SAM7L128 wakes up. The user can save power consumption by driving PC7 connected to the FORCEOFF pin of the MAX3318. AT91SAM7L-STK Rev. A Starter Kit User Guide 6-1 6409A–ATARM–30-Jun-08 Section 7 Revision History Doc Rev 6409A Comments Change Request Ref. First issue. AT91SAM7L-STK Rev. A Starter Kit User Guide 7-1 6409A–ATARM–30-Jun-08 Headquarters International Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Atmel Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel: (852) 2721-9778 Fax: (852) 2722-1369 Atmel Europe Le Krebs 8, Rue Jean-Pierre Timbaud BP 309 78054 Saint-Quentin-enYvelines Cedex France Tel: (33) 1-30-60-70-00 Fax: (33) 1-30-60-71-11 Atmel Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel: (81) 3-3523-3551 Fax: (81) 3-3523-7581 Technical Support AT91SAM Support Atmel techincal support Sales Contacts www.atmel.com/contacts/ Product Contact Web Site www.atmel.com www.atmel.com/AT91SAM Literature Requests www.atmel.com/literature Disclaimer: The information in this document is provided in connection with Atmel products. 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