PSS05S92F6-AG PSS05S92E6-AG

< Dual-In-Line Package Intelligent Power Module >
PSS05S92F6-AG
PSS05S92E6-AG
TRANSFER MOLDING TYPE
INSULATED TYPE
OUTLINE
MAIN FUNCTION AND RATINGS
 3 phase DC/AC inverter
 600V / 5A (CSTBT)
 N-side IGBT open emitter
 Built-in bootstrap diodes with current limiting resistor
APPLICATION
 AC 100~240Vrms(DC voltage:400V or below) class
low power motor control
TYPE NAME
PSS05S92F6-AG
PSS05S92E6-AG
With temperature output function
With OT protection function
INTEGRATED DRIVE, PROTECTION AND SYSTEM CONTROL FUNCTIONS
● For P-side
: Drive circuit, High voltage high-speed level shifting, Control supply under-voltage (UV) protection
● For N-side
: Drive circuit, Control supply under-voltage protection (UV), Short circuit protection (SC),
Over temperature protection (OT, PSS05S92E6-AG only)
● Fault signaling : Corresponding to SC fault (N-side IGBT), UV fault (N-side supply) and OT fault
● Temperature output : Outputting LVIC temperature by analog signal (PSS05S92F6-AG only)
● Input interface : 3, 5V line, Schmitt trigger receiver circuit (High Active)
● UL Recognized : UL1557 File E323585
INTERNAL CIRCUIT
P(24)
IGBT1
VUFB(2)
Di1
VVFB(3)
U(23)
IGBT2
VWFB(4)
Di2
HVIC
UP(5)
V(22)
VP(6)
IGBT3
Di3
IGBT4
Di4
W P(7)
VP1(8)
W(21)
VNC(9)
UN(10)
NU(20)
VN(11)
IGBT5
W N(12)
Di5
VN1(13)
NV(19)
FO(14)
LVIC
IGBT6
Di6
CIN(15)
VNC(16)
NW(18)
VOT(17)
·Built-in temperature output type: VOT
(PSS**S92F6-AG)
·Built-in OT type: NC (No Connection)
(PSS**S92E6-AG)
Publication Date : March 2014
1
< Dual-In-Line Package Intelligent Power Module >
PSS05S92F6-AG, PSS05S92E6-AG
TRANSFER MOLDING TYPE
INSULATED TYPE
MAXIMUM RATINGS (Tj = 25°C, unless otherwise noted)
INVERTER PART
Symbol
VCC
VCC(surge)
VCES
±IC
±ICP
PC
Tj
Parameter
Supply voltage
Supply voltage (surge)
Collector-emitter voltage
Each IGBT collector current
Each IGBT collector current (peak)
Collector dissipation
Junction temperature
Condition
Applied between P-NU,NV,NW
Applied between P-NU,NV,NW
TC= 25°C
TC= 25°C, less than 1ms
TC= 25°C, per 1 chip
(Note 1)
(Note 2)
Ratings
450
500
600
5
10
20.0
-30~+150
Unit
V
V
V
A
A
W
°C
Note1: Pulse width and period are limited due to junction temperature.
Note2: The maximum junction temperature rating of built-in power chips is 150°C(@Tc≤100°C).However, to ensure safe operation of DIPIPM, the average
junction temperature should be limited to Tj(Ave)≤125°C (@Tc≤100°C).
CONTROL (PROTECTION) PART
Symbol
VD
VDB
VIN
VFO
IFO
VSC
Parameter
Control supply voltage
Control supply voltage
Input voltage
Fault output supply voltage
Fault output current
Current sensing input voltage
Condition
Applied between VP1-VNC, VN1-VNC
Applied between VUFB-U, VVFB-V, VWFB-W
Applied between UP, VP, WP, UN, VN, WN-VNC
Applied between FO-VNC
Sink current at FO terminal
Applied between CIN-VNC
Ratings
20
20
-0.5~VD+0.5
-0.5~VD+0.5
1
-0.5~VD+0.5
Unit
V
V
V
V
mA
V
Condition
VD = 13.5~16.5V, Inverter Part
Tj = 125°C, non-repetitive, less than 2μs
Measurement point of Tc is provided in Fig.1
Ratings
Unit
400
V
-30~+100
-40~+125
°C
°C
1500
Vrms
TOTAL SYSTEM
Symbol
TC
Tstg
Parameter
Self protection supply voltage limit
(Short circuit protection capability)
Module case operation temperature
Storage temperature
Viso
Isolation voltage
VCC(PROT)
60Hz, Sinusoidal, AC 1min, between connected all pins
and heat sink plate
Fig. 1: TC MEASUREMENT POINT
Control terminals
DIPIPM
11.6mm
3mm
IGBT chip position
Tc point
Heat sink side
Power terminals
THERMAL RESISTANCE
Symbol
Rth(j-c)Q
Rth(j-c)F
Parameter
Junction to case thermal
resistance
(Note 3)
Condition
Inverter IGBT part (per 1/6 module)
Inverter FWDi part (per 1/6 module)
Min.
-
Limits
Typ.
-
Max.
5.0
5.7
Unit
K/W
K/W
Note 3: Grease with good thermal conductivity and long-term endurance should be applied evenly with about +100μm~+200μm on the contacting surface of
DIPIPM and heat sink. The contacting thermal resistance between DIPIPM case and heat sink Rth(c-f) is determined by the thickness and the thermal
conductivity of the applied grease. For reference, Rth(c-f) is about 0.3K/W (per 1/6 module, grease thickness: 20μm, thermal conductivity: 1.0W/m•K).
Publication Date : March 2014
2
< Dual-In-Line Package Intelligent Power Module >
PSS05S92F6-AG, PSS05S92E6-AG
TRANSFER MOLDING TYPE
INSULATED TYPE
ELECTRICAL CHARACTERISTICS (Tj = 25°C, unless otherwise noted)
INVERTER PART
Symbol
VCE(sat)
VEC
ton
tC(on)
toff
tC(off)
trr
ICES
Parameter
Condition
IC= 5A, Tj= 25°C
IC= 5A, Tj= 125°C
IC=0.5A, Tj= 25°C
Collector-emitter saturation
voltage
VD=VDB = 15V, VIN= 5V
FWDi forward voltage
VIN= 0V, -IC= 5A
Switching times
VCC= 300V, VD= VDB= 15V
IC= 5A, Tj= 125°C, VIN= 0↔5V
Inductive Load (upper-lower arm)
Collector-emitter cut-off
current
VCE=VCES
Tj= 25°C
Tj= 125°C
Min.
0.65
-
Limits
Typ.
1.60
1.80
0.90
2.30
1.05
0.35
1.15
0.15
0.30
-
Max.
1.95
2.15
1.10
2.75
1.45
0.60
1.60
0.30
1
10
Min.
0.455
7.0
7.0
10.3
10.8
2.63
0.88
100
4.9
20
0.70
0.80
Limits
Typ.
0.480
10.0
10.0
2.77
1.13
120
10
1.00
2.10
1.30
Max.
2.80
2.80
0.10
0.10
0.505
12.0
12.0
12.5
13.0
2.91
1.39
140
0.95
1.50
2.60
-
0.35
0.65
-
1.1
80
1.7
100
2.3
120
Unit
V
V
μs
μs
μs
μs
μs
mA
CONTROL (PROTECTION) PART
Symbol
Parameter
ID
VD=15V, VIN=0V
VD=15V, VIN=5V
VD=VDB=15V, VIN=0V
VD=VDB=15V, VIN=5V
Total of VP1-VNC, VN1-VNC
Circuit current
IDB
VSC(ref)
UVDBt
UVDBr
UVDt
UVDr
VOT
OTt
OTrh
VFOH
VFOL
tFO
IIN
Vth(on)
Vth(off)
Vth(hys)
VF
R
Condition
Short circuit trip level
P-side Control supply
under-voltage protection(UV)
N-side Control supply
under-voltage protection(UV)
Temperature Output
(PSS**S92F6-AG)
Over temperature protection
(OT, PSS**S92E6-AG) (Note6)
Fault output voltage
Each part of VUFB-U,
VVFB-V, VWFB-W
VD = 15V
(Note 4)
Trip level
Reset level
Trip level
Reset level
Tj ≤125°C
LVIC Temperature=90°C
LVIC Temperature=25°C
VD = 15V
Trip level
Detect LVIC temperature
Hysteresis of trip-reset
VSC = 0V, FO terminal pulled up to 5V by 10kΩ
VSC = 1V, IFO = 1mA
Pull down R=5kΩ (Note 5)
Fault output pulse width
Input current
ON threshold voltage
OFF threshold voltage
ON/OFF threshold
hysteresis voltage
Bootstrap Di forward voltage
IF=10mA including voltage drop by limiting resistor
Built-in limiting resistance
Included in bootstrap Di
(Note 7)
VIN = 5V
Applied between UP, VP, WP, UN, VN, WN-VNC
(Note 8)
Unit
mA
V
V
V
V
V
V
V
°C
°C
V
V
μs
mA
V
V
Ω
Note 4 : SC protection works only for N-side IGBT. Please select the external shunt resistance such that the SC trip-level is less than 1.7 times of the current rating.
5 : DIPIPM don't shutdown IGBTs and output fault signal automatically when temperature rises excessively. When temperature exceeds the protective level that
user defined, controller (MCU) should stop the DIPIPM. Temperature of LVIC vs. VOT output characteristics is described in Fig. 3.
6 : When the LVIC temperature exceeds OT trip temperature level(OTt), OT protection works and Fo outputs. In that case if the heat sink dropped off or fixed
loosely, don't reuse that DIPIPM. (There is a possibility that junction temperature of power chips exceeded maximum Tj(150°C).
7 : Fault signal Fo outputs when SC, UV or OT protection works. Fo pulse width is different for each protection modes. At SC failure, Fo pulse width is a fixed
width (=minimum 20μs), but at UV or OT failure, Fo outputs continuously until recovering from UV or OT state. (But minimum Fo pulse width is 20μs.)
8 : The characteristics of bootstrap Di is described in Fig.2.
Fig. 2 Characteristics of bootstrap Di VF-IF curve (@Ta=25°C) including voltage drop by limiting resistor (Right chart is enlarged chart.)
160
140
120
100
80
60
40
20
0
30
IF [mA]
IF [mA]
25
20
15
10
5
0
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
V F [V]
0.0
Publication Date : March 2014
3
0.5
1.0
1.5
2.0
V F [V]
2.5
3.0
3.5
< Dual-In-Line Package Intelligent Power Module >
PSS05S92F6-AG, PSS05S92E6-AG
TRANSFER MOLDING TYPE
INSULATED TYPE
Fig. 3 Temperature of LVIC vs. VOT output characteristics
4.0
3.8
Max.
3.6
Typ.
3.4
Min.
3.2
V OT output (V) _
3.0
2.91
2.8
2.77
2.63
2.6
2.4
2.2
2.0
1.8
1.6
60
70
80
90
100
110
120
LVIC temperature (°C)
Fig. 4 VOT output circuit
Inside LVIC
of DIPIPM
Temperature
Signal
VOT
Ref
VNC
MCU
5kΩ
(1) It is recommended to insert 5kΩ (5.1kΩ is recommended) pull down resistor for getting linear output characteristics at low temperature
below room temperature. When the pull down resistor is inserted between VOT and VNC(control GND), the extra circuit current, which is
calculated approximately by VOT output voltage divided by pull down resistance, flows as LVIC circuit current continuously. In the case of
using VOT for detecting high temperature over room temperature only, it is unnecessary to insert the pull down resistor.
(2) In the case of using VOT with low voltage controller like 3.3V MCU, VOT output might exceed control supply voltage 3.3V when
temperature rises excessively. If system uses low voltage controller, it is recommended to insert a clamp Di between control supply of
the controller and VOT output for preventing over voltage destruction.
(3) In the case of not using VOT, leave VOT output NC (No Connection).
Refer the application note for Super Mini DIPIPM Ver.6 series about the usage of VOT.
Publication Date : March 2014
4
< Dual-In-Line Package Intelligent Power Module >
PSS05S92F6-AG, PSS05S92E6-AG
TRANSFER MOLDING TYPE
INSULATED TYPE
MECHANICAL CHARACTERISTICS AND RATINGS
Parameter
Min.
0.59
Limits
Typ.
0.69
Max.
0.78
N·m
EIAJ-ED-4701
10
-
-
s
EIAJ-ED-4701
2
-
-
times
-50
8.5
-
100
g
μm
Condition
Mounting torque
Terminal pulling strength
Terminal bending strength
Mounting screw : M3 (Note 9)
Control terminal: Load 4.9N
Power terminal: Load 9.8N
Control terminal: Load 2.45N
Power terminal: Load 4.9N
90deg. bend
Recommended 0.69N·m
Weight
Heat-sink flatness
(Note 10)
Unit
Note 9: Plain washers (ISO 7089~7094) are recommended.
Note 10: Measurement point of heat sink flatness
4.6mm
Measurement position
+ -
17.5mm
Heat sink side
+
Heat sink side
RECOMMENDED OPERATION CONDITIONS
Symbol
Parameter
VCC
VD
VDB
ΔVD, ΔVDB
tdead
fPWM
Supply voltage
Control supply voltage
Control supply voltage
Control supply variation
Arm shoot-through blocking time
PWM input frequency
IO
Allowable r.m.s. current
PWIN(on)
PWIN(off)
VNC
Tj
Min.
0
13.5
13.0
-1
1.0
-
Limits
Typ.
300
15.0
15.0
-
Max.
400
16.5
18.5
+1
20
fPWM= 5kHz
-
-
2.0
fPWM= 15kHz
-
-
1.0
0.7
0.7
-5.0
-20
-
+5.0
+125
Condition
Applied between P-NU, NV, NW
Applied between VP1-VNC, VN1-VNC
Applied between VUFB-U, VVFB-V, VWFB-W
For each input signal
TC ≤ 100°C, Tj ≤ 125°C
VCC = 300V, VD = 15V, P.F = 0.8,
Sinusoidal PWM
TC ≤ 100°C, Tj ≤ 125°C
(Note11)
(Note 12)
Between VNC-NU, NV, NW (including surge)
Note 11: Allowable r.m.s. current depends on the actual application conditions.
12: DIPIPM might not make response if the input signal pulse width is less than PWIN(on), PWIN(off).
Publication Date : March 2014
5
V
V
V
V/μs
μs
kHz
Arms
Minimum input pulse width
VNC variation
Junction temperature
Unit
μs
V
°C
< Dual-In-Line Package Intelligent Power Module >
PSS05S92F6-AG, PSS05S92E6-AG
TRANSFER MOLDING TYPE
INSULATED TYPE
Fig. 5 Timing Charts of The DIPIPM Protective Functions
[A] Short-Circuit Protection (N-side only with the external shunt resistor and RC filter)
a1. Normal operation: IGBT ON and outputs current.
a2. Short circuit current detection (SC trigger)
(It is recommended to set RC time constant 1.5~2.0μs so that IGBT shut down within 2.0μs when SC.)
a3. All N-side IGBT's gates are hard interrupted.
a4. All N-side IGBTs turn OFF.
a5. FO outputs for tFo=minimum 20μs.
a6. Input = “L”: IGBT OFF
a7. Fo finishes output, but IGBTs don't turn on until inputting next ON signal (LH).
(IGBT of each phase can return to normal state by inputting ON signal to each phase.)
a8. Normal operation: IGBT ON and outputs current.
Lower-side control
input
a6
SET
RESET
Protection circuit state
a3
Internal IGBT gate
a4
SC trip current level
a8
Output current Ic
a1
a7
a2
SC reference voltage
Sense voltage of
the shunt resistor
Delay by RC filtering
Error output Fo
a5
[B] Under-Voltage Protection (N-side, UVD)
b1. Control supply voltage V D exceeds under voltage reset level (UVDr), but IGBT turns ON by next ON signal (LH).
(IGBT of each phase can return to normal state by inputting ON signal to each phase.)
b2. Normal operation: IGBT ON and outputs current.
b3. VD level drops to under voltage trip level. (UVDt).
b4. All N-side IGBTs turn OFF in spite of control input condition.
b5. Fo outputs for tFo=minimum 20μs, but output is extended during VD keeps below UVDr.
b6. VD level reaches UVDr.
b7. Normal operation: IGBT ON and outputs current.
Control input
RESET
Protection circuit state
Control supply voltage VD
UVDr
SET
b1
UVDt
b2
b3
b4
Output current Ic
Error output Fo
b5
Publication Date : March 2014
6
RESET
b6
b7
< Dual-In-Line Package Intelligent Power Module >
PSS05S92F6-AG, PSS05S92E6-AG
TRANSFER MOLDING TYPE
INSULATED TYPE
[C] Under-Voltage Protection (P-side, UVDB)
c1. Control supply voltage VDB rises. After the voltage reaches under voltage reset level UVDBr, IGBT turns on by next ON signal (LH).
c2. Normal operation: IGBT ON and outputs current.
c3. VDB level drops to under voltage trip level (UVDBt).
c4. IGBT of the correspond phase only turns OFF in spite of control input signal level, but there is no FO signal output.
c5. VDB level reaches UVDBr.
c6. Normal operation: IGBT ON and outputs current.
Control input
RESET
SET
c1
UVDBt
RESET
Protection circuit state
UVDBr
Control supply voltage VDB
c3
c2
c5
c6
c4
Output current Ic
Error output Fo
Keep High-level (no fault output)
[D] Over Temperature Protection (N-side, Detecting LVIC temperature)
d1. Normal operation: IGBT ON and outputs current.
d2. LVIC temperature exceeds over temperature trip level(OTt).
d3. All N-side IGBTs turn OFF in spite of control input condition.
d4. Fo outputs for tFo=minimum 20μs, but output is extended during LVIC temperature keeps over OTt.
d5. LVIC temperature drops to over temperature reset level.
d6. Normal operation: IGBT turns on by next ON signal (LH).
(IGBT of each phase can return to normal state by inputting ON signal to each phase.)
Control input
SET
Protection circuit state
OTt
RESET
d2
d5
Temperature of LVIC
OTt - OTrh
d1
d3
Output current Ic
d4
Error output Fo
Publication Date : March 2014
7
d6
< Dual-In-Line Package Intelligent Power Module >
PSS05S92F6-AG, PSS05S92E6-AG
TRANSFER MOLDING TYPE
INSULATED TYPE
Fig. 6 Example of Application Circuit
Bootstrap negative electrodes
should be connected to U,V,W
terminals directly and separated
from the main output wires
P(24)
IGBT1
C1 D1 C2 VUFB(2)
+
Di1
VVFB(3)
U(23)
+
IGBT2
Di2
VWFB(4)
+
HVIC
UP(5)
V(22)
M
VP(6)
IGBT3
Di3
W P(7)
VP1(8)
W(21)
C2
+
MCU
VNC(9)
IGBT4
UN(10)
C3
Di4
VN(11)
NU(20)
W N(12)
IGBT5
5V
Fo(14)
Di5
LVIC
NV(19)
VOT(17)
IGBT6
Di6
5kΩ
Built-in temperature
output type only
(PSS**S92F6-AG)
15V VD
C1 + D1
VN1(13)
C2
Long wiring here might cause SC
level fluctuation and malfunction.
CIN(15)
B
Long GND wiring here might
generate noise to input signal and
cause IGBT malfunction.
C4
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(10)
(11)
(12)
(13)
C
D
R1
Shunt
resistor
A
Control GND wiring
(1)
Long wiring here might
cause short circuit failure
NW(18)
VNC(16)
N1
Power GND wiring
If control GND is connected with power GND by common broad pattern, it may cause malfunction by power GND fluctuation.
It is recommended to connect control GND and power GND at only a point N1 (near the terminal of shunt resistor).
It is recommended to insert a Zener diode D1(24V/1W) between each pair of control supply terminals to prevent surge destruction.
To prevent surge destruction, the wiring between the smoothing capacitor and the P, N1 terminals should be as short as possible.
Generally a 0.1-0.22μF snubber capacitor C3 between the P-N1 terminals is recommended.
R1, C4 of RC filter for preventing protection circuit malfunction is recommended to select tight tolerance, temp-compensated type.
The time constant R1C4 should be set so that SC current is shut down within 2μs. (1.5μs~2μs is general value.) SC interrupting time
might vary with the wiring pattern, so the enough evaluation on the real system is necessary.
To prevent malfunction, the wiring of A, B, C should be as short as possible.
The point D at which the wiring to CIN filter is divided should be near the terminal of shunt resistor. NU, NV, NW terminals should be
connected at near NU, NV, NW terminals.
All capacitors should be mounted as close to the terminals as possible. (C1: good temperature, frequency characteristic electrolytic
type and C2:0.22μ-2μF, good temperature, frequency and DC bias characteristic ceramic type are recommended.)
Input drive is High-active type. There is a minimum 3.3kΩ pull-down resistor in the input circuit of IC. To prevent malfunction, the
wiring of each input should be as short as possible. When using RC coupling circuit, make sure the input signal level meet the turn-on
and turn-off threshold voltage.
Fo output is open drain type. It should be pulled up to MCU or control power supply (e.g. 5V,15V) by a resistor that makes IFo up to
1mA. (IFO is estimated roughly by the formula of control power supply voltage divided by pull-up resistance. In the case of pulled up to
5V, 10kΩ (5kΩ or more) is recommended.)
Thanks to built-in HVIC, direct coupling to MCU without any opto-coupler or transformer isolation is possible.
Two VNC terminals (9 & 16 pin) are connected inside DIPIPM, please connect either one to the 15V power supply GND outside and
leave another one open.
If high frequency noise superimposed to the control supply line, IC malfunction might happen and cause DIPIPM erroneous operation.
To avoid such problem, line ripple voltage should meet dV/dt ≤+/-1V/μs, Vripple≤2Vp-p.
For DIPIPM, it isn't recommended to drive same load by parallel connection with other phase IGBT or other DIPIPM.
Publication Date : March 2014
8
< Dual-In-Line Package Intelligent Power Module >
PSS05S92F6-AG, PSS05S92E6-AG
TRANSFER MOLDING TYPE
INSULATED TYPE
Fig. 7 MCU I/O Interface Circuit
5V line
10kΩ
Note)
Design for input RC filter depends on PWM control scheme used
in the application and wiring impedance of the printed circuit board.
DIPIPM input signal interface integrates a minimum 3.3kΩ
pull-down resistor. Therefore, when inserting RC filter, it is
necessary to satisfy turn-on threshold voltage requirement.
Fo output is open drain type. It should be pulled up to control
power supply (e.g. 5V, 15V) with a resistor that makes Fo sink
current IFo 1mA or less. In the case of pulled up to 5V supply, 10kΩ
（5kΩ or more） is recommended.
DIPIPM
UP,VP,W P,UN,VN,W N
MCU
3.3kΩ(min)
Fo
VNC(Logic)
Fig. 8 Pattern Wiring Around the Shunt Resistor
NU, NV, NW should be connected
each other at near terminals.
DIPIPM
DIPIPM
Wiring Inductance should be less than 10nH.
Each wiring Inductance should be less than 10nH.
Inductance of a copper pattern with
length=17mm, width=3mm is about 10nH.
NU
NV
NW
VNC
Inductance of a copper pattern with
length=17mm, width=3mm is about 10nH.
N1
Shunt
resistor
NU
NV
NW
VNC
GND wiring from VNC should
be connected close to the
terminal of shunt resistor.
N1
Shunt
resistors
GND wiring from VNC should
be connected close to the
terminal of shunt resistor.
Low inductance shunt resistor like surface mounted (SMD) type is recommended.
Fig. 9 Pattern Wiring Around the Shunt Resistor (for the case of open emitter)
When DIPIPM is operated with three shunt resistors, voltage of each shunt resistor cannot be input to CIN terminal directly. In that case, it is necessary to use
the external protection circuit as below.
DIPIPM
Drive circuit
P
P-side IGBT
U
V
W
External protection circuit
Comparators
(Open collector output type)
N-side IGBT
Rf
C
Drive circuit
VNC
NW
NV
NU
Protection circuit
CIN
Cf
B
-
Vref
+
Vref
+
Vref
+
5V
D
Shunt
resistors
A
OR output
-
N1
(1) It is necessary to set the time constant RfCf of external comparator input so that IGBT stops within 2μs when short circuit occurs.
SC interrupting time might vary with the wiring pattern, comparator speed and so on.
(2) It is recommended for the threshold voltage Vref to set to the same rating of short circuit trip level (Vsc(ref): typ. 0.48V).
(3) Select the external shunt resistance so that SC trip-level is less than specified value (=1.7 times of rating current).
(4) To avoid malfunction, the wiring A, B, C should be as short as possible.
(5) The point D at which the wiring to comparator is divided should be close to the terminal of shunt resistor.
(6) OR output high level when protection works should be over 0.505V (=maximum Vsc(ref) rating).
Publication Date : March 2014
9
< Dual-In-Line Package Intelligent Power Module >
PSS05S92F6-AG, PSS05S92E6-AG
TRANSFER MOLDING TYPE
INSULATED TYPE
Fig. 10 Package Outlines
PSS**S92F6-AG, PSS**S92E6-AG
Dimensions in mm
TERMINAL CODE
1-A
1-B
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
NC(VNC)
NC(VP1)
VUFB
VVFB
VWFB
UP
VP
WP
VP1
VNC *1
UN
VN
WN
VN1
Fo
CIN
VNC *1
NC / VOT *2
NW
NV
NU
W
V
U
P
NC
1) 9 & 16 pins (VNC) are connected inside DIPIPM, please connect either one to the control power supply GND outside and leave another one open.
2) No.17 is VOT for built-in temperature output function type (PSS**S92F6-AG) and NC (No Connection) for built-in OT protection function type (PSS**S92E6-AG).
QR Code is registered trademark of DENSO WAVE INCORPORATED in JAPAN and other countries.
Publication Date : March 2014
10
< Dual-In-Line Package Intelligent Power Module >
PSS05S92F6-AG, PSS05S92E6-AG
TRANSFER MOLDING TYPE
INSULATED TYPE
Revision Record
Rev.
Date
Page
Revised contents
1
28/ 2/2014
-
New
2
15/ 3/2014
2
Add Note 1
Publication Date : March 2014
11
< Dual-In-Line Package Intelligent Power Module >
PSS05S92F6-AG, PSS05S92E6-AG
TRANSFER MOLDING TYPE
INSULATED TYPE
Keep safety first in your circuit designs!
Mitsubishi Electric Corporation puts the maximum effort into making semiconductor products better and more
reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors
may lead to personal injury, fire or property damage. Remember to give due consideration to safety when
making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary
circuits, (ii) use of non-flammable material or (iii) prevention against any malfunction or mishap.
Notes regarding these materials
•These materials are intended as a reference to assist our customers in the selection of the Mitsubishi
semiconductor product best suited to the customer’s application; they do not convey any license under any
intellectual property rights, or any other rights, belonging to Mitsubishi Electric Corporation or a third party.
•Mitsubishi Electric Corporation assumes no responsibility for any damage, or infringement of any
third-party’s rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or
circuit application examples contained in these materials.
•All information contained in these materials, including product data, diagrams, charts, programs and
algorithms represents information on products at the time of publication of these materials, and are subject
to change by Mitsubishi Electric Corporation without notice due to product improvements or other reasons. It
is therefore recommended that customers contact Mitsubishi Electric Corporation or an authorized
Mitsubishi Semiconductor product distributor for the latest product information before purchasing a product
listed herein.
The information described here may contain technical inaccuracies or typographical errors. Mitsubishi
Electric Corporation assumes no responsibility for any damage, liability, or other loss rising from these
inaccuracies or errors.
Please also pay attention to information published by Mitsubishi Electric Corporation by various means,
including the Mitsubishi Semiconductor home page (http://www.MitsubishiElectric.com/).
•When using any or all of the information contained in these materials, including product data, diagrams,
charts, programs, and algorithms, please be sure to evaluate all information as a total system before making
a final decision on the applicability of the information and products. Mitsubishi Electric Corporation assumes
no responsibility for any damage, liability or other loss resulting from the information contained herein.
•Mitsubishi Electric Corporation semiconductors are not designed or manufactured for use in a device or
system that is used under circumstances in which human life is potentially at stake. Please contact
Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor when
considering the use of a product contained herein for any specific purposes, such as apparatus or systems
for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use.
•The prior written approval of Mitsubishi Electric Corporation is necessary to reprint or reproduce in whole or
in part these materials.
•If these products or technologies are subject to the Japanese export control restrictions, they must be
exported under a license from the Japanese government and cannot be imported into a country other than
the approved destination.
Any diversion or re-export contrary to the export control laws and regulations of Japan and/or the country of
destination is prohibited.
•Please contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor
for further details on these materials or the products contained therein.
© 2014 MITSUBISHI ELECTRIC CORPORATION. ALL RIGHTS RESERVED.
DIPIPM and CSTBT are registered trademarks of MITSUBISHI ELECTRIC CORPORATION.
Publication Date : March 2014
12