DES-011 SERIAL DIGITAL TO PARALLEL TTL MODULE • • • • • Auto 144,177,270, 360 mb/s Operation • Automatic Cable equalisation • + 5V DC power Small compact design for pcb mounting Composite or Component digital inputs 8 or 10 bit data Reclocked SD outputs available. This interface card accepts multistandard serial digital signals and converts these to a 10 bit parallel data stream with a word rate clock. In addition outputs indicating the presence of TRS and EAV timing reference signals are provided to allow easy decoding of the parallel data stream. Input Requirements Input data format Input data rates Input Impedance Equalisation SMPTE 259M 360 Mb/s serial 4:2:2 widescreen component 270 Mb/s serial 4:2:2 component 144,177 Mb/s serial NTSC/PAL 75 ohm terminating Automatic up to 40 dB at 200 MHz (Typically 300m of Belden 8281 at 270mb/s) Output Characteristics Parallel Output SD Outputs EAV Output Other parameters ORDERING CODES DES-011A DES-011B One parallel word at 14.4, 17.7, 27 or 36Mb/s TTL/CMOS levels. 2 reclocked serial outputs, SMPTE 259M End of active video flag. For component video, a logic low is output for one cycle of the parallel clock every time an EAV timing reference signal is detected. The pulse is aligned with the fourth word of the timing reference (the XYZ word.) For composite video, this line is always asserted high. TRS Output Timing reference flag. A logic low is output for the duration of the TRS. Power Operating Temperature Package +5V ± 0.25V ( 300 mA max) 00C to 400C DR00174A Reclocked o/p’s x √ © Faraday Technology. As part of continual product improvement the specifications, details and dimensions shown in this publication are subject to change without notice FARA078.DOC Page 1 of 2 Jun-99(A) PACKAGE DETAIL Faraday Technology Ltd. Croft Road Industrial Estate, Newcastle, Staffordshire ST5 0QZ. England. FARA078.DOC Tel: Fax: Email: Web site: Page 2 of 2 + 44 (0)1782 661501 + 44 (0)1782 630101 [email protected] http://www.faradaytech.co.uk Jun-99(A)