QorIQ P5040 / P5021 Rev 2.0/2.1 Silicon Qualification Report 37.5 x 37.5 FCPBGA, 1295 pins Part Number Rev 2.0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 P5021NSE12QB P5021NSE1VNB P5021NSE1TMB P5021NSN12QB P5021NSN1VNB P5021NSN1TMB P5021NXE1TMB P5021NXN1TMB P5040NSE12QB P5040NSE1VNB P5040NSE1TMB P5040NSN12QB P5040NSN1VNB P5040NSN1TMB P5040NXE1TMB P5040NXN1TMB Part Number Rev 2.1 Pb-free Bump P5021NSE72QC P5021NSE7VNC P5021NSE7TMC P5021NSN72QC P5021NSN7VNC P5021NSN7TMC P5021NXE7TMC P5021NXN7TMC P5040NSE72QC P5040NSE7VNC P5040NSE7TMC P5040NSN72QC P5040NSN7VNC P5040NSN7TMC P5040NXE7TMC P5040NXN7TMC Core Speed Platform Speed DDR Speed Encryption Temperature Platform/ Core Voltage 2200 MHz 2000 MHz 1800 MHz 2200 MHz 2000 MHz 1800 MHz 1800 MHz 1800 MHz 2200 MHz 2000 MHz 1800 MHz 2200 MHz 2000 MHz 1800 MHz 1800 MHz 1800 MHz 800 MHz 700 MHz 600 MHz 800 MHz 700 MHz 600 MHz 600 MHz 600 MHz 800 MHz 700 MHz 600 MHz 800 MHz 700 MHz 600 MHz 600 MHz 600 MHz 1600 MHz 1333 MHz 1200 MHz 1600 MHz 1333 MHz 1200 MHz 1200 MHz 1200 MHz 1600 MHz 1333 MHz 1200 MHz 1600 MHz 1333 MHz 1200 MHz 1200 MHz 1200 MHz Encrypted Encrypted Encrypted Not Encrypted Not Encrypted Not Encrypted Encrypted Not Encrypted Encrypted Encrypted Encrypted Not Encrypted Not Encrypted Not Encrypted Encrypted Not Encrypted 0-90C 0-105C 0-105C 0-90C 0-105C 0-105C -40-105C -40-105C 0-90C 0-105C 0-105C 0-90C 0-105C 0-105C 40-105C 40-105C 1.0 V / 1.2V 1.0 V / 1.1V 1.0 V / 1.1V 1.0 V / 1.2V 1.0 V / 1.1V 1.0 V / 1.1V 1.0 V / 1.1V 1.0 V / 1.1V 1.0 V / 1.2V 1.0 V / 1.1V 1.0 V / 1.1V 1.0 V / 1.2V 1.0 V / 1.1V 1.0 V / 1.1V 1.0 V / 1.1V 1.0 V / 1.1V Dev No./Rev.: P5040/P5021 - Rev 2.1 Description: QorIQ P5040/P5021 Technology: C45SOI, GF Package: 37.5 x 37.5 FCPBGA, 1295 pins Report Revision: B Rev date: Nov 12, 2013 Page 1 of 9 Product Information Product / Technology / Fab / Package Description Package 1295 pins 37.5 x 37.5 mm FC-PBGA with footed Lid Device P5040 / P5021 (1295 FC-PBGA) Mask Set N45F Rev 2.1 Die Coating(s) HD4004 Product Specs 1.0V Platform, 1.1/1.2V Core, 105C max Memory 32KB L1 D-cache (Per Core), 32KB I-cache (Per Core) + 512KB L2/core with ECC (Per Core) + 2MB platform cache with ECC Name/Location of Die Fab Facility Global Foundry Fab7 / Singapore Process Technology CMOS45SOI Silicon Orientation / Transistor <110> Poly / Metal layers 1/10 Gox Thickness 11.2Å C4 Bump Site Amkor T5 / Taiwan C4 Bump Composition Pb 95%, Sn 5% or Sn (98.2%) Ag (1.8%) Assembly Location Amkor T3 / Taiwan Final Test Location FSL KLM, FSL ATX C5 Size and Sphere Composition SAC305 - 0.5mm Sn(96.5%), Ag(3.0%), Cu(0.5%) Underfill Supplier and Part No. Amkor Proprietary (NAU-14 Pb bump) or (NAU-27 Pb-free bump) Substrate Supplier Supplier M and Supplier H Moisture Sensitivity Level MSL3 / 250°C Reflow Purpose NPI Rev 2.1 Qualification Dev No./Rev.: P5040/P5021 - Rev 2.1 Description: QorIQ P5040/P5021 Technology: C45SOI, GF Package: 37.5 x 37.5 FCPBGA, 1295 pins Report Revision: B Rev date: Nov 12, 2013 Page 2 of 9 QorIQ P5040 / P5021 Reliability Data Summary Moisture Sensitivity Level Characterization Product Wafer Lot Trace Code Rev P5040 MD14058 14058QL1 1.0 0/22 P5040 MD14058 14058QL2 1.0 0/22 P5040 MD14089 14089QL3 1.0 0/22 Totals MSL3/250°C Fail/Sample Size 0/66 Pb-Free Assy Rework CZ @ MSL6 / 260°C Product Wafer Lot Trace Code Rev P5040 MD14058 14058QL2 1.0 0/11 P5040 MD14089 14089QL3 1.0 0/11 Totals MSL6/260°C Fail/Sample Size 0/22 Temperature Cycle / -55ºC to 125ºC Air to Air with Preconditioning @ MSL3 / 250ºC Convection Reflow Product Wafer Lot Trace Code Rev P5040 MD14058 14058QL1 1.0 0/25 0/25 0/25 0/25 P5040 MD14058 14058QL2 1.0 0/25 0/25 0/25 0/25 P5040 MD14089 14089QL3 1.0 0/25 0/25 0/25 0/25 0/75 0/75 0/75 0/75 Totals MSL3/250°C Fail/Sample Size 400 Cycles Fail/Sample Size 700 Cycles Fail/Sample Size 1000 Cycles Fail/Sample Size Unbiased HAST / 110°C, 85% RH, 17.7 psia with Preconditioning @ MSL3 / 250ºC Convection Reflow Product Wafer Lot Trace Code Rev P5040 MD14089 14089QL3 1.0 Totals MSL3/250°C Fail/Sample Size 264 Hours Fail/Sample Size 0/120 0/120 0/120 0/120 High Temperature Bake / 150°C Product Wafer Lot Trace Code Rev P5040 MD14559 YEAFUYA 2.0 Totals 504 Hours Fail/Sample Size 1008 Hours Fail/Sample Size 0/120 0/120 0/120 0/120 High Temperature Bake (HTB) data requirements are partially met using P3060 HTB data: High Temperature Bake / 150°C P3060 Data (37.5 x 37.5 FCPBGA, 1295 pins package assembled in Amkor T5): Product Wafer Lot Trace Code Rev P3060 MD13651 VNACUYA 1.0 0/80 P3060 MD13677 VNADUYA 1.0 0/80 P3060 MD13717 VFBGCWA 1.0 0/80 Totals 1008 Hours Fail/Sample Size 0/240 Dev No./Rev.: P5040/P5021 - Rev 2.1 Description: QorIQ P5040/P5021 Technology: C45SOI, GF Package: 37.5 x 37.5 FCPBGA, 1295 pins Report Revision: B Rev date: Nov 12, 2013 Page 3 of 9 Temperature Humidity Bias (THB) requirements are met using P3060 THB data. Temperature Humidity Bias / 85ºC, 85%R.H., 2.0v with Preconditioning @ MSL3 / 250ºC Convection Reflow P3060 Data (37.5 x 37.5 FCPBGA, 1295 pins package assembled in Amkor T5): Product Wafer Lot Trace Code Rev MSL3/250°C Fail/Sample Size P3060 MD13787 WGALUYA 1.0 0/27 0/27 0/27 P3060 MD13786 WJAKUYD 1.0 0/27 0/27 0/27 P3060 MD13913 WJAMUYA 1.0 0/27 0/27 0/27 0/81 0/81 0/81 Totals 504 Hours Fail/Sample Size 1008 Hours Fail/Sample Size High Temperature Operating Life Test (HTOL) – Tj=130°C, Platform = 1.21V Rev 1.0 / 1.29V Rev 2.0, Core = 1.31V, 3.3V I/O=3.72V, 1.5V I/O=1.71V. Product Wafer Lot Trace Code Rev P5040 MD14058 14058QL1 1.0 1.35V 0/65 0/65 0/65 0/65 P5040 MD14058 14058QL2 1.0 1.35V 0/64 0/64 0/64 0/64 P5040 MD14559 YEAFUYA 2.0 1.35V P5040 MD14924 TQ1335U120 2.1 1.35V 0/129 0/129 0/129 0/129 Stress Voltage 303 hrs Fail/Sample Size 385 hrs Fail/Sample Size 545 hrs Fail/Sample Size 937 hrs Fail/Sample Size 1008 hrs Fail/Sample Size 0/122 0/125 Totals A 0/247 A Chain failure with ruptured thick gate oxide. Acceleration calculations for this TDDB mechanism indicate this would fail well beyond the product lifetime in field use (>93 yrs). High Temperature Operating Life (HTOL) data requirements are partially met using P3060 HTOL data: High Temperature Operating Life Test (HTOL) – Tj=130°C, 3.3V I/O=3.72V, 1.5V I/O=1.71V. P3060 Data (37.5 x 37.5 FCPBGA, 1295 pins package assembled in Amkor T5): Product Wafer Lot Trace Code Rev Stress Voltage 327 hrs Fail/Sample Size P3060 MD13651 VNACUYA 1.0 1.234V P3060 MD13677 VNADUYA 1.0 1.234V 0/90 0/90 P3060 MD13717 VFBGCWA 1.0 1.234V 0/89 0/88 0/89 0/269 0/267 Totals B 566 hrs Fail/Sample Size 0/90 B HTOL study had two units damaged by Automated Test Equipment (ATE) handler with 8D corrective action completed. AC Drift Characterization Product Wafer Lot P5040 MD14058 14058QL1 1.0 0/65 0/65 P5040 MD14058 14058QL2 1.0 0/64 0/64 0/129 0/129 Totals Assembly Lot Rev -40°C Tj Fail/Sample Size 105°C Tj Fail/Sample Size Dev No./Rev.: P5040/P5021 - Rev 2.1 Description: QorIQ P5040/P5021 Technology: C45SOI, GF Package: 37.5 x 37.5 FCPBGA, 1295 pins Report Revision: B Rev date: Nov 12, 2013 Page 4 of 9 1008 hrs Fail/Sample Size 0/90 0/88 0/89 0/267 NBTI Shift Characterization Product Wafer Lot Assembly Lot P5040 MD14058 14058QL1 1.0 P5040 MD14058 14058QL2 1.0 10 Yr NBTI – 905 hrs Fail/Sample Size Rev 0/65 0/64 Totals 0/129 Electrical Characterization -40C, 105C Product Wafer Lot Rev P5040 MD14508 1.0 5/15/5 units for FF/NN/SS -40C, 105C P5040 MD14559 2.0 10 units NN P5040 MD14924 2.1 15 units Totals Electrostatic Discharge (ESD) Product Wafer Lot Trace Code Rev 2KV HBM Fail/Sample Size 500V CDM Fail/Sample Size P5040 MD14089 14089QL3 1.0 P5040 MD14058 14058QL1 1.0 P5040 MD14559 YEAFUYA 2.0 0/3 0/3 P5040 MD14924 TQ1335U120 2.1 0/3 0/3 0/3 100V MM Fail/Sample Size 0/3 0/3 0/3 Totals 0/9 0/9 0/6 The Freescale standard for 45nm devices: All Speed Critical pins (Lynx, SerDes, CLKIN, etc) meet CDM Class II JESD22-C101E 250V, all other pins meet CDM Class III JESD22-C101E 500V. All Speed Critical pins (Lynx, SerDes, CLKIN, etc) meet HBM Class 1C JESD22-A114B 1.5kV, all other pins meet HBM Class 2 JESD22-A114B 2kV. Pb-free Wafer Bump Qualification: Qualification using P5040 Pb-free Wafer Bump in 1295 pin 37.5 mm2 FC-PBGA with Lid (substrate supplier M): Moisture Sensitivity Level Characterization Product Wafer Lot Trace Code Rev P5040 MD14718 YTABUYA 2.0 0/22 P5040 MD14718 YTABUYB 2.0 0/22 P5040 MD14718 YTABUYC 2.0 0/22 Totals MSL3/250°C Fail/Sample Size 0/66 Dev No./Rev.: P5040/P5021 - Rev 2.1 Description: QorIQ P5040/P5021 Technology: C45SOI, GF Package: 37.5 x 37.5 FCPBGA, 1295 pins Report Revision: B Rev date: Nov 12, 2013 Page 5 of 9 Pb-Free Assy Rework CZ Product Wafer Lot Assembly Lot Rev MSL6/260°C Fail/Sample Size P5040 MD14718 YTABUYA 2.0 0/11 P5040 MD14718 YTABUYB 2.0 0/11 Totals Temperature Cycle / -55ºC to 125ºC Air to Air with Preconditioning @ MSL3 / 250ºC Convection Reflow Product Wafer Lot Trace Code Rev P5040 MD14718 YTABUYA 2.0 0 / 25 0 / 25 P5040 MD14718 YTABUYB 2.0 0 / 25 0 / 25 P5040 MD14718 YTABUYC 2.0 0 / 25 0 / 25 0 / 75 0 / 75 Totals 400 Cycles Fail/Sample Size 700 Cycles Fail/Sample Size Qualification by Similarity using QorIQ P3060 / P308B Pb-free Wafer Bump in 1295 Pin 37.5mm2 FCPBGA (substrate supplier H): Moisture Sensitivity Level Characterization Product Wafer Lot Trace Code Rev P3060 MD14044 0/22 MD14043 XHADUYC XHAEUYB 1.0 P3060 1.0 0/22 P3060 MD14074 XHAFUYB 1.0 0/22 Totals MSL3/250°C Fail/Sample Size 0/66 Temperature Cycle / -55ºC to 125ºC Air to Air with Preconditioning @ MSL3 / 250ºC Convection Reflow Product Wafer Lot Trace Code Rev P3060 MD14044 0 / 77 0 / 77 0 / 77 0 / 77 MD14043 XHADUYC XHAEUYB 1.0 P3060 1.0 0 / 77 0 / 77 0 / 77 0 / 77 P3060 MD14074 XHAFUYB 1.0 0 / 77 0 / 77 0 / 77 0 / 77 0 / 241 0 / 241 0 / 241 0 / 241 1300 Cycles Fail/Sample Size 1700 Cycles Fail/Sample Size Totals 400 Cycles Fail/Sample Size 700 Cycles Fail/Sample Size 1000 Cycles Fail/Sample Size 1400 Cycles Fail/Sample Size Temperature Cycle / -40ºC to 125ºC Air to Air with Preconditioning @ MSL3 / 250ºC Convection Reflow Product Wafer Lot Trace Code Rev P3060 MD14044 na 0/80 0/79* 0/78* MD14043 XHADUYC XHAEUYB 1.0 P3060 1.0 na 0/80 0/79* 0/78* P3060 MD14074 XHAFUYB 1.0 na 0/80 0/79* 0/78* 0/240 0/237 0/234 Totals * 1 unit removed from each lot for construction analysis 500 Cycles Fail/Sample Size 850 Cycles Fail/Sample Size Dev No./Rev.: P5040/P5021 - Rev 2.1 Description: QorIQ P5040/P5021 Technology: C45SOI, GF Package: 37.5 x 37.5 FCPBGA, 1295 pins Report Revision: B Rev date: Nov 12, 2013 Page 6 of 9 Temperature Humidity Bias / 85ºC, 85%R.H., 1.0v with Preconditioning @ MSL3 / 250ºC Convection Reflow Product Wafer Lot Trace Code Rev MSL3/250°C Fail/Sample Size P3060 MD14044 XHADUYC 1.0 0/27 0/27 0/27 P3060 MD14043 XHAEUYB 1.0 0/27 0/27 0/27 P3060 MD14074 XHAFUYB 1.0 0/27 0/27 0/27 P3060 MD14044 1.0 0/27 0/27 0/27 P3060 MD14043 1.0 0/27 0/27 0/27 P3060 MD14074 1.0 Totals 504 Hours Fail/Sample Size 1008 Hours Fail/Sample Size 0/27 0/27 0/27 0/162 0/162 0/162 Unbiased HAST / 130°C, 85% RH, 17.7 psia with Preconditioning @ MSL3 / 250ºC Convection Reflow Product Wafer Lot Trace Code Rev MSL3/260°C Fail/Sample Size P3060 MD14044 0/80 0/80 MD14043 XHADUYC XHAEUYB 1.0 P3060 1.0 0/80 0/80 P3060 MD14074 XHAFUYB 1.0 Totals 264 Hours Fail/Sample Size 0/80 0/80 0/240 0/240 High Temperature Bake / 150°C Product Wafer Lot Trace Code Rev P3060 MD14044 MD14043 XHADUYC XHAEUYB 1.0 P3060 1.0 0/80 0/80* 0/80 0/80 P3060 MD14074 XHAFUYB 1.0 0/80* 0/80 0/240 0/240 Totals * test results at hot temp only 504 Hours Fail/Sample Size 1008 Hours Fail/Sample Size Qualified by Similarity using QorIQ P4080 Rev3 Pb-free Wafer Bump in 1295 Pin 37.5mm2 FC-PBGA: Moisture Sensitivity Level Characterization MSL requirements are partially met using Substrate Suppliers (H) and (M) data. 37.5 x 37.5 FCPBGA, 1295 pins Product Wafer Lot Trace Code Rev/Substrate Supplier P4080 MD14044 0/22 MD14043 XHADUYC XHAEUYB Rev 1.0 (H) P4080 Rev 1.0 (H) 0/22 P4080 MD14074 XHAFUYB Rev 1.0 (H) 0/22 P4080 MD14508 YDAAUYF Rev 3.0 (M) 0/22 Totals MSL3/250°C Fail/Sample Size 0/88 Temperature Cycle / -55ºC to 125ºC Air to Air with Preconditioning @ MSL3 / 250ºC Convection Reflow AATC requirements are partially met using Substrate Suppliers (H) and (M) data. 37.5 x 37.5 FCPBGA, 1295 pins Product Wafer Lot Trace Code P4080 MD14508 YDAAUYF Totals Rev/Substrate Supplier Rev 3.0 (M) 400 Cycles Fail/Sample Size 700 Cycles Fail/Sample Size 1000 Cycles Fail/Sample Size 1400 Cycles Fail/Sample Size 0/80 0/80 0/80 0/80 0/80 0/80 0/80 0/80 Dev No./Rev.: P5040/P5021 - Rev 2.1 Description: QorIQ P5040/P5021 Technology: C45SOI, GF Package: 37.5 x 37.5 FCPBGA, 1295 pins Report Revision: B Rev date: Nov 12, 2013 Page 7 of 9 QorIQ P5040 / P5021 Product FIT Rate Derated based on HTOL results 1.0V Nominal Platform (1.1/1.2V Nom Core) P5040 FIT Rate as a function of Junction Temperature for various Voltages (60% UCL) Failure Rate (FIT) 100.0 10.0 1.0 0.1 40 50 60 70 80 90 100 110 Junction Temperature (C) 1.2 1.1 1.25 P5040 MTTF as a function of Junction Temperature for various voltages (60% UCL) 10,000,000 MTTF (Years) 1,000,000 100,000 10,000 1,000 40 50 60 70 80 90 100 110 Junction Temperature (C) 1.2 1.1 Dev No./Rev.: P5040/P5021 - Rev 2.1 Description: QorIQ P5040/P5021 Technology: C45SOI, GF Package: 37.5 x 37.5 FCPBGA, 1295 pins 1.25 Report Revision: B Rev date: Nov 12, 2013 Page 8 of 9 Revision History Revision History Revision Date Comment Author Original Qualification Report Dean Dreier 22-May-2013 Corrected typos in the device table Dean Dreier 12-Nov-2013 Added qualification data for Rev 2.1, Amkor Pb-free bump and second source substrate supplier Dean Dreier Original 6-May-2013 A B Dev No./Rev.: P5040/P5021 - Rev 2.1 Description: QorIQ P5040/P5021 Technology: C45SOI, GF Package: 37.5 x 37.5 FCPBGA, 1295 pins Report Revision: B Rev date: Nov 12, 2013 Page 9 of 9