Available at Digi-Key www.digikey.com 2111 Comprehensive Drive Aurora, Illinois 60505 Phone: 630- 851- 4722 Fax: 630- 851- 5040 www.conwin.com US Headquarters: 630-851-4722 European Headquarters: +353-61-472221 5x7mm Precision TCXO Model DV75D Description: Features: The Connor-Winfield’s DV75D is a 5x7mm Surface Mount Temperature Compensated Crystal Controlled Oscillator (TCXO) with LVCMOS output. Through the use of Analog Temperature Compensation, the DV75D is capable of holding sub 1-ppm stabilities over the -40 to 85°C temperature range. • TCXO • 3.3 Vdc Operation • LVCMOS Output • Frequency Stability: ± 1.0 ppm • Temperature Range: -40 to 85°C • Low Jitter <1ps RMS • 5x7mm Surface Mount Package • Tape and Reel Packaging • RoHS Compliant / Pb Free DV 75 20 D 12 .0 MH 02 Z Applications: GR-253-CORE (SMC) ITU-T-G.813 Option 1 and 2 (SEC) Absolute Maximum Ratings Parameter Storage Temperature Supply Voltage (Vcc) Input Voltage Minimum Nominal Maximum Units -55 -0.5 -0.5 - - - 85 6.0 Vcc+0.5 °C Vdc Vdc Units Notes Operating Specifications Parameter Nominal Frequency (Fo) Frequency Calibration @ 25 °C Frequency Stability vs. Temperature Frequency vs. Load Stability Frequency vs. Voltage Stability Static Temperature Hysteresis Aging Operating Temperature Range: Supply Voltage (Vcc) Supply Current (Icc) Period Jitter Integrated Phase Jitter Typical Phase Noise Fo = 20.0 MHz SSB Phase Noise at 10Hz offset SSB Phase Noise at 100Hz offset SSB Phase Noise at 1KHz offset SSB Phase Noise at 10KHz offset SSB Phase Noise at 100KHz offset Start-up Time Minimum Nominal Maximum - -1.0 -1.0 -0.2 -0.2 - -1.0 -40 3.135 - - - 10.0, 12.8 or 20.0 - - - - - - - 3.3 - 3 0.5 - 1.0 1.0 0.2 0.2 0.4 1.0 85 3.465 6 5 1.0 - - - - - - -80 -110 -135 -150 -150 - - - - - - 10 Notes MHz ppm 1 ppm 2 ppm ±5% ppm ±5% ppm 3 ppm/year °C Vdc ±5% mA ps rms ps rms 4 dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz ms LVCMOS Output Characteristics Parameter Load Voltage (High) (Voh) (Low) (Vol) Duty Cycle at 50% of Vcc Rise / Fall Time 10% to 90% Minimum Nominal Maximum - 90%Vcc - 45 - 15 - - 50 - - - 10%Vcc 55 8 Units Notes pF Vdc Vdc % ns Package Characteristics Package Hermetically sealed crystal mounted on a ceramic package Vibration: Shock: Soldering Process; Vibration per Mil Std 883E Method 2007.3 Test Condition A Mechanical Shock per Mil Std 883E Method 2002.4 Test Condition B. RoHS compliant lead free. See soldering profile on page 2. Environmental Characteristics Ordering Information Bulletin Page Revision Date Tx356 1 of 2 03 03 Dec 2013 DV75D-010.0M, DV75D-012.8M or DV75D-020.0M Notes: 1. 2. 3. 4. 5. Initial calibration @ 25°C. Specifications at time of shipment after 48 hours of operation. Frequency stability vs. change in temperature. [±(Fmax - Fmin)/(2*Fo)]. Frequency change after reciprocal temperature ramped over the operating range. Frequency measured before and after at 25°C. BW = 12 KHz to 20 MHz. For best performance it is recommended that the circuit connected to this output should have an equivalent input capacitance of 15pF. 5 2111 Comprehensive Drive Aurora, Illinois 60505 Phone: 630- 851- 4722 Fax: 630- 851- 5040 www.conwin.com Package Layout 0.276 ±0.006 (7.0mm) (Top View) Suggested Pad Layout 0.079 Max. (2.0mm) 0.071 (1.8mm) 4 Places 4 N/C Ground Output (Fo) Supply Voltage (Vcc) 3 0.165 (4.2mm) Pad 1 0.034 (0.90mm) (4 Places) 1: 2: 3: 4: 0.197 ±0.006 (5.0mm) DV75C 1202 12.8 MHZ 1 Pad Connections 0.047 (1.2mm) 4 Places (Top View) 2 Dimensional Tolerance: ±.005 (.127mm) ±.02 (.508mm) (Bottom View) 1 0.224 (5.7mm) 2 Output Waveform Keep Out * Area 3 4 * Do not route any traces in the keep out area. It is recommended the next layer under the keep out area is to be ground plane. 0.055 (1.40mm) (4 Places) 1V/Div Design Recommendations Vcc, should have a large copper area for reduced inductance. Connect a 0.01uF bypass capacitor <0.1”(2.54mm) from the pad. 4 3 9 5 0.010”(0.254mm) Recommended clearance inductance for internal copper flood. 1 2 Top View Test Circuit Buffer Ground 4 10 50 Ohm trace <1”by design Vcc Ground, should have a large copper area for reduced inductance. OSC Vcc Supply Voltage Ground Top View 0.1 uF Bypass 50 Ohm Trace Without Output Vias Buffer 10 nF Bypass 4 Output 15 pF 1 TOP LAYER GROUND LAYER 3 2 ....... N/C BOTTOM LAYER Attention: To achieve optimal frequency stability, and in some cases to meet the specification stated on this data sheet, it is required that the circuit connected to this TCXO output must have the equivalent input capacitance that is specified by the nominal load capacitance. Deviations from the nominal load capacitance will have a graduated effect on the stability of approximately 20 ppb per pF load difference. Solder Profile Temperature 260°C 260°C Tape and Reel Dimensions 220°C PIN 1 180°C 150°C 120°C .69 (17.5mm) 8.46 DIA (216mm DIA) .08 (2.0mm) .31 .08 (7.9mm) (2.0mm) 0 .21 (5.4mm) 9.84 DIA (250mm DIA) .157 (4.0mm) .08 (2.0mm) 3.15 (80mm) .315 (8.0mm) Direction Of Feed (Customer) 10 s Up to 120 s 60 to 90 s Typical Typical .06 DIA (1.5mm DIA) Meets IPC/JEDEC J-STD-020C 1.00 DIA (25mm DIA) .295 (7.5mm) MEETS EIA-481A and EIAJ-1009B 2,000 PCS/REEL .07 (1.75mm) .83 (16.0mm) Revision History Revision 00 Revision 01 Revision 02 Revision 03 Data sheet released 01/11/12 Removed tri-state information from features and description. 11/26/12. Added "Applications" 04/15/13 Removed TR from Ordering Information. 12/03/13 Specifications subject to change without notification. See Connor-Winfield's website for latest revision. Not intended for life support applications. All dimensions in inches. © Copyright 2013 The Connor-Winfield Corporation Bulletin Page Revision Date Tx356 2 of 2 03 03 Dec 2013