ASIC ALTERED ITEM DRAWING FOR 5962

ASIC ALTERED ITEM DRAWING FOR 5962-96B02
AID No.
Version: A
Page: 1 of 5
Status:
1.0 SCOPE
1.1 Scope. This drawing defines specific requirements for DSCC Standard Military Drawing (SMD) 5962-96B02,
Custom Application Specific Integrated Circuit (ASIC).
1.2 Identification. Identification shall be as follows:
Purchaser
Part Number
Description
ASIC Custom Gate
Array
ASIC Custom Gate
Array
Proto
Commercial Space
Reduced Hi-Rel
SMD Part Number
5962R96B0208V4X
Manufacturer’s Generic
Part Number
UT100E/R
5962R96B0208Q4X
UT100E/R
NA
NA
NA
UT100E/R
UT100E/R
UT100E/R
2.0 Applicable Document
2.1 Government Documents. The following documents from a part of this drawing to the extent specified herein. Unless
otherwise specified, use the issue of these documents in effect at the start of processing.
DSCC SMD
5962-96B02
- Microcircuit, Digital, CMOS, Custom ASIC, Monolithic Silicon
2.2 Non-Government Publications
Controlled Test Media
XXXXX
- UTMC Design/Test CD-ROM
XXXXX
- UTMC Design/Test CD-ROM
XXXXX
- UTMC Design/Test CD-ROM
XXXXX
- UTMC Test Program Tape
30503/09
- UTMC Assembly and Test, Prototype Flowchart
30503/06
- UTMC Assembly and Test, Reduced Hi-Rel Flowchart
30503/03
- UTMC Assembly and Test, Commercial Space Flowchart
2.3 Order of Precedence. In the event of conflicts between documents, the requirements of this document shall take
precedence.
3.0 Altered Item Drawing Requirements.
3.1 Terminal Connections, Pin Assignments and Functional Descriptions.
PIN
FUNCTION
1
3
5
7
9
11
13
15
17
VDD
I/O
TYPE
IN
PIN
FUNCTION
I/O TYPE
2
4
6
8
10
12
14
16
18
VSS
IN
ASIC ALTERED ITEM DRAWING FOR 5962-96B02
AID No.
Version: A
PIN
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
FUNCTION
I/O TYPE
VSSQ
IN
VSS
IN
VDDQ
VDD
IN
IN
VSSQ
IN
VSS
IN
PIN
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
FUNCTION
Page: 2 of 5
Status:
VDDQ
I/O TYPE
OUT
IN
VDD
IN
VSSQ
VSS
IN
IN
VDDQ
IN
VDD
IN
ASIC ALTERED ITEM DRAWING FOR 5962-96B02
AID No.
Version: A
PIN
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
205
207
209
211
213
FUNCTION
I/O
TYPE
VDDQ
VDD
VSS
IN
IN
IN
VSSQ
IN
VSS
IN
VDDQ
VDD
IN
IN
PIN
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
208
210
212
214
Page: 3 of 5
Status:
FUNCTION
I/O TYPE
VSSQ
VSS
IN
IN
VDDQ
IN
VDD
IN
VSSQ
VSS
IN
IN
VDDQ
IN
ASIC ALTERED ITEM DRAWING FOR 5962-96B02
AID No.
Version: A
PIN
FUNCTION
215
217
219
221
223
225
227
229
231
233
235
237
239
241
243
245
247
249
251
253
255
VSSQ
I/O
TYPE
IN
VSS
IN
VDDQ
IN
PIN
216
218
220
222
224
226
228
230
232
234
236
238
240
242
244
246
248
250
252
254
256
Page: 4 of 5
Status:
FUNCTION
I/O TYPE
VDD
IN
VSSQ
IN
3.2 Package Type.
XXXX – Outline Letter 4, 256 -Pin Flatpack (Paragraph 1.2.4 of 5962-96B02).
3.3 Functional Block Diagram. The functional block diagram is considered proprietary by XXX and is not part of this
Altered Item Drawing.
3.4 Logic Diagram The logic diagram is defined in controlled CD-ROMs XXXXX-1, -2, and -3.
3.5 Pin Functional description. See 3.1
3.6 Design Document Name. The netlist is defined in controlled CD-ROMs XXXXX-1, -2, and -3.
3.7 Test Functional Tape. Test functional tape is in UTMC’s controlled test program 46-T505.
3.8 Switching Waveform. Switching waveforms are defined in Controlled CD-ROMs XXXXX-1,
-2, and -3.
3.9 Fault Coverage. Fault coverage is ___% as achieved by Scan/ATPG vectors
3.10 Device Electrical Performance Characteristics. DC parameters are defined in 5962-96B02. AC parameters are
defined in controlled CD-ROMs XXXXX-1, -2, and -3.
3.11 Maximum Power Dissipation. Maximum power dissipation is .803 Watts.
3.12 Burn-In Test Circuit. The burn-in test duration, test condition and test temperature, or approved alternatives shall be
as specified in UTMC’s QM plan in accordance with MIL- PRF-38535. For Dynamic burn-in, UTMC will use the
scan check test vector pattern defined by the Synopsys test compiler during ATPG. This scan pattern meets UTMC
requirements for waveform type and vector count.
ASIC ALTERED ITEM DRAWING FOR 5962-96B02
AID No.
Version: A
Page: 5 of 5
Status:
3.13 Radiation Hardness Assurance. RHA lever designator R (100,000 Rad (Si)).
3.14 Device Class. The device class is Q.