RQA0005AQS Silicon N-Channel MOS FET Preliminary Rev.1.0 Aug.10,2005 Features • High Output Power, High Gain, High Efficiency Po = +33 dBm, Linear Gain = 21 dB, PAE = 68% (f = 520 MHz) • Compact package capable of surface mounting Outline RENESAS Package code: PLZZ0004CA-A (Package Name: UPAK) 3 3 2 1 1. Gate 2. Source 3. Drain 4. Source 1 4 2 Note: Marking is “MX”. Absolute Maximum Ratings (Ta = 25°C) Item Symbol Ratings Unit Drain to source voltage VDSS 16 V Gate to source voltage VGSS ±5 V ID 0.8 A 9 W Drain current note Channel dissipation Pch Channel temperature Tch 150 °C Storage temperature Tstg –50 to +150 °C Note: Value at Tc = 25°C This Device is sensitive to Electro Static Discharge. An Adequate handling procedure is requested. Preliminary, Aug.10,2005, page 1of 6 RQA0005AQS Electrical Characteristics (Ta = 25°C) Symbol Min. Typ Max. Unit Zero gate voltage drain current Item IDSS — — 10 µA VDS = 16 V, VGS = 0 Test Conditions Gate to source leakage current IGSS — — ±2 µA VGS = ±5 V, VDS = 0 Gate to source cutoff voltage VGS(off) — 0.45 — V VDS = 6 V, ID = 1mA Forward Transfer Admittance |yfs| — 1.1 — S VDS = 6 V, ID = 600mA Input capacitance Ciss — 22 — pF VGS = 5 V, VDS = 0, f = 1 MHz Output capacitance Coss — 12 — pF VDS = 6 V, VGS = 0, f = 1 MHz Reverse transfer capacitance Crss — 2.6 — pF VDG = 6 V, VGS = 0, f = 1 MHz Output Power Pout — 33 — dBm — 2 — W VDS = 6V, IDQ = 200 mA f = 520 MHz, Pin = +20 dBm Power Added Efficiency PAE — 68 — % Characteristics Maximum Channel Power Dissipation Curve 3.0 6 4 2 0 3.5 V 2.5 8 Drain Current ID (A) Channel Power Dissipation Pch (W) 10 Typical Output Characteristics Pulse Test 3.0 V 2.0 2.5 V 1.5 2.0 V 1.0 1.5 V 0.5 0 50 100 Case Temperature 0.0 150 200 TC (°C) VGS = 1.0 V 0 Forward Transfer Admittance vs. Drain Current VDS = 6 V Pulse Test 1.0 0.8 |yfs| ID 0.6 0.4 0.2 0.0 0 0.4 0.8 1.2 1.6 2.0 Gate to Source Voltage VGS (V) Preliminary, Aug.10,2005, page 2 of 6 Forward Transfer Admittance |yfs| (S) Drain Current ID (A) Forward Transfer Admittance |yfs| (S) Typical Transfer Characterisitics 1.2 2 4 6 8 10 Darin to Source Voltage VDS (V) 10.0 1.0 0.1 0.1 1.0 Drain Current ID (A) 10.0 RQA0005AQS Output Capacitance vs. Drain to Source Voltage Input Capacitance vs. Gate to Source Voltage 100 Output Capacitance Coss (pF) Input Capacitance Ciss (pF) 30 25 20 15 10 VDS = 0 f = 1 MHz 5 -5 -4 -3 -2 -1 1 2 3 4 5 10 1 VGS = 0 f = 1 MHz 1 Drain to Gate Voltage VDG (V) Preliminary, Aug.10,2005, page 3 of 6 0.1 1 Drain to Sorce Voltage VDS (V) Reverse Transfer Capacitance vs. Gate to Source Voltage Reverse Transfer Capacitance Crss(pF) VGS = 0 f = 1MHz 1 0 Gate to Sorce Voltage VGS (V) 0.1 0.1 10 10 10 RQA0005AQS Evaluation Circuit (f = 520 MHz) C5 VG C4 C10 C11 VD R2 C3 C9 L1 R1 50 Ω C1 IN C2 C1, C8 C2 C3, C9 C4, C10 C5, C11 C6 C7 L1 L2 L3 R1 R2 68 pF Chip Capacitor 16 pF Chip Capacitor 100 pF Chip Capacitor 1000pF Chip Capacitor 2.2 µF Electrolysis Capacitor 4pF Chip Capacitor 11 pF Chip Capacitor 8 Turns D: 0.5 mm, φ 2.4 mm Enamel Wire 2.2 nH Chip Inductor 3.3 nH Chip Inductor 33 Ω Chip Resistor 2.7 kΩ Chip Resistor Preliminary, Aug.10,2005, page 4 of 6 C8 L3 L2 50 Ω OUT C6 C7 Micro strip line width = 2.2 mm / 50 Ω, εr 3.6 RQA0005AQS Output Power, Drain Current vs. Input Power Power Gain, Power Added Efficiency vs. Input Power 40 0.5 30 80 0.4 20 10 0.3 VDS = 6 V f = 520 MHz IDQ = 200 mA 0 0 Power Gain PG (dB) ID Drain Current ID (A) Output Power Po (dB) Po 30 0.2 25 5 10 15 20 Input Power Pin (dBm) PAE 40 20 PG 10 0 VDS = 6 V f = 520 MHz IDQ = 200 mA 0 5 10 15 20 Input Power Pin (dBm) Power Gain, Powe Added Efficiency vs. Frequency 20 PG 40 VDS = 6V IDQ = 200 mA Pin = 20 dBm 0 450 470 490 510 530 Frequency f (MHz) 20 Input Return Loss RL(dB) 60 5 -5 -10 -15 70 PG 0 3 60 f = 520 MHz IDQ = 200 mA Pin = 20 dBm 4 5 6 7 Drain to Source Voltage VDS (V) Preliminary, Aug.10,2005, page 5 of 6 50 40 8 Power Gain PG (dB) PAE 10 5 20 80 Power Added Efficiency PAE (%) Power Gain PG (dB) 15 VDS = 6 V IDQ = 200 mA Pin = 20 dBm -20 450 0 550 Power Gain, Power Added Efficiency vs. Drain to Source Voltage 20 0 25 0 Power Added Efficiency PAE (%) Power Gain PG (dB) PAE 10 20 Input Return Loss vs. Frequency 80 15 60 Power Added Efficiency PAE (%) 0.6 470 490 510 530 Frequency f (MHz) 550 Power Gain, Power Added Efficiency vs. Idling Current 80 15 PG 75 10 PAE 70 5 0 0 VDS = 6 V f = 520 MHz Pin = 20 dBm 0.1 0.2 0.3 0.4 Idling Current IDQ (A) 65 60 0.5 Power Added Efficiency PAE (%) 40 RQA0005AQS Package Dimensions RENESAS Code Package Name MASS[Typ.] PLZZ0004CA-A UPAK / UPAKV 0.050g 1.5 1.5 3.0 Preliminary, Aug.10,2005, page 6 of 6 1.5 ± 0.1 0.44 Max 2.5 ± 0.1 4.25 Max (1.5) 0.44 Max (0.2) 0.53 Max 0.48 Max 0.8 Min φ1 0.4 4.5 ± 0.1 1.8 Max Unit: mm (2.5) SC-62 (0.4) JEITA Package Code